in the pre-change behavior, if the CPU frequency is raised, it will stay up
for 5 cycles minimum (with one cycle being run every 100ms).
With this change, the time to keep the frequency raised is incremented at
each cycle up to 5. This mean short load need triggering the frequency
increase will last less than the current minimum of 500ms.
this only affect the automatic mode when on battery, extending the battery
life for most interactive use scenarios and idling loads.
tested by many with good results
ok ketennis@
-/* $OpenBSD: sched_bsd.c,v 1.70 2021/10/30 23:24:48 deraadt Exp $ */
+/* $OpenBSD: sched_bsd.c,v 1.71 2022/05/10 22:18:06 solene Exp $ */
/* $NetBSD: kern_synch.c,v 1.37 1996/04/22 01:38:37 christos Exp $ */
/*-
}
if (allidle < alltotal / 2)
speedup = 1;
- if (speedup)
- downbeats = 5;
+ if (speedup && downbeats < 5)
+ downbeats++;
if (speedup && perflevel != 100) {
faster: