disable ppgtt on cherryview/braswell

With ppgtt enabled the contents of struct gen6_ppgtt are overwritten
leading to unexpected values for vma pointer such as 0 and 1.

Multiple people have reported problems with 6.9 on cherryview/braswell
with traces along the lines of

uvm_fault(0xffffffff8214ea68, 0xb8, 0, 1) -> e
kernel: page fault trap, code=0
Stopped at      i915_ggtt_pin+0x29:     movq    0xb8(%rdi),%r12
i915_ggtt_pin(0,10000,20) at i915_ggtt_pin+0x29
gen6_ppgtt_pin(ffff800000cb9400) at gen6_ppgtt_pin+0x7c
__intel_context_do_pin(fffffd817dc8ad80) at __intel_context_do_pin+0xca
intel_engines_init(ffff800000104c38) at intel_engines_init+0x4b5
intel_gt_init(ffff800000104c38) at intel_gt_init+0x130
i915_gem_init(ffff800000100000) at i915_gem_init+0xa3
i915_driver_probe(ffff800000100000,ffffffff81fc6e90) at i915_driver_probe+0x7ed

The "use drm_mm from linux 5.7.y" commit made last October is
implicated in the change in behaviour but does not itself have any
cherryview/braswell specific changes. There is at least one report on
misc@ which suggests this occurred in some situations with 6.8 which
lacks that change.

Thanks to the people who reported this in particular Matthias Pressfreund
who tested many patches.

diff --git a/sys/dev/pci/drm/i915/i915_pci.c b/sys/dev/pci/drm/i915/i915_pci.c
index 97b3504..0ef48b3 100644 (file)
--- a/sys/dev/pci/drm/i915/i915_pci.c
+++ b/sys/dev/pci/drm/i915/i915_pci.c
@@ -598,7 +598,15 @@ static const struct intel_device_info chv_info = {
        .has_logical_ring_contexts = 0,
 #endif
        .display.has_gmch = 1,
+#ifdef __linux__
        .ppgtt_type = INTEL_PPGTT_ALIASING,
+#else
+       /*
+        * Enabling aliasing ppgtt results in struct gen6_ppgtt
+        * being overwritten.
+        */
+       .ppgtt_type = INTEL_PPGTT_NONE,
+#endif
        .ppgtt_size = 32,
        .has_reset_engine = 1,
        .has_snoop = true,