Fiv the value written to dwqe(4) MAC_1US_TIC_CTR register.

The calculation of this value is supposed to involve a clock frequency
but we were using a clock ID in the range 0-7 instead.

ok kettenis, patrick

diff --git a/sys/dev/fdt/if_dwqe_fdt.c b/sys/dev/fdt/if_dwqe_fdt.c
index 7a43333..7e6afab 100644 (file)
--- a/sys/dev/fdt/if_dwqe_fdt.c
+++ b/sys/dev/fdt/if_dwqe_fdt.c
@@ -1,4 +1,4 @@
-/*     $OpenBSD: if_dwqe_fdt.c,v 1.16 2023/10/09 14:25:00 stsp Exp $   */
+/*     $OpenBSD: if_dwqe_fdt.c,v 1.17 2023/10/10 07:11:50 stsp Exp $   */
 /*
  * Copyright (c) 2008, 2019 Mark Kettenis <kettenis@openbsd.org>
  * Copyright (c) 2017, 2022 Patrick Wildt <patrick@blueri.se>
@@ -193,18 +193,18 @@ dwqe_fdt_attach(struct device *parent, struct device *self, void *aux)
                    LINK_STATE_FULL_DUPLEX : LINK_STATE_HALF_DUPLEX;
        }
 
-       sc->sc_clk = clock_get_frequency(faa->fa_node, "stmmaceth");
-       if (sc->sc_clk > 500000000)
+       sc->sc_clkrate = clock_get_frequency(faa->fa_node, "stmmaceth");
+       if (sc->sc_clkrate > 500000000)
                sc->sc_clk = GMAC_MAC_MDIO_ADDR_CR_500_800;
-       else if (sc->sc_clk > 300000000)
+       else if (sc->sc_clkrate > 300000000)
                sc->sc_clk = GMAC_MAC_MDIO_ADDR_CR_300_500;
-       else if (sc->sc_clk > 150000000)
+       else if (sc->sc_clkrate > 150000000)
                sc->sc_clk = GMAC_MAC_MDIO_ADDR_CR_150_250;
-       else if (sc->sc_clk > 100000000)
+       else if (sc->sc_clkrate > 100000000)
                sc->sc_clk = GMAC_MAC_MDIO_ADDR_CR_100_150;
-       else if (sc->sc_clk > 60000000)
+       else if (sc->sc_clkrate > 60000000)
                sc->sc_clk = GMAC_MAC_MDIO_ADDR_CR_60_100;
-       else if (sc->sc_clk > 35000000)
+       else if (sc->sc_clkrate > 35000000)
                sc->sc_clk = GMAC_MAC_MDIO_ADDR_CR_35_60;
        else
                sc->sc_clk = GMAC_MAC_MDIO_ADDR_CR_20_35;

diff --git a/sys/dev/ic/dwqe.c b/sys/dev/ic/dwqe.c
index 9880d5e..7d260ef 100644 (file)
--- a/sys/dev/ic/dwqe.c
+++ b/sys/dev/ic/dwqe.c
@@ -1,4 +1,4 @@
-/*     $OpenBSD: dwqe.c,v 1.12 2023/10/09 14:25:00 stsp Exp $  */
+/*     $OpenBSD: dwqe.c,v 1.13 2023/10/10 07:11:50 stsp Exp $  */
 /*
  * Copyright (c) 2008, 2019 Mark Kettenis <kettenis@openbsd.org>
  * Copyright (c) 2017, 2022 Patrick Wildt <patrick@blueri.se>
@@ -772,7 +772,7 @@ dwqe_up(struct dwqe_softc *sc)
        ifp->if_flags |= IFF_RUNNING;
        ifq_clr_oactive(&ifp->if_snd);
 
-       dwqe_write(sc, GMAC_MAC_1US_TIC_CTR, (sc->sc_clk / 1000000) - 1);
+       dwqe_write(sc, GMAC_MAC_1US_TIC_CTR, (sc->sc_clkrate / 1000000) - 1);
 
        /* Start receive DMA */
        reg = dwqe_read(sc, GMAC_CHAN_RX_CONTROL(0));

diff --git a/sys/dev/ic/dwqevar.h b/sys/dev/ic/dwqevar.h
index f703cfd..68d698a 100644 (file)
--- a/sys/dev/ic/dwqevar.h
+++ b/sys/dev/ic/dwqevar.h
@@ -1,4 +1,4 @@
-/*     $OpenBSD: dwqevar.h,v 1.7 2023/10/09 14:25:00 stsp Exp $        */
+/*     $OpenBSD: dwqevar.h,v 1.8 2023/10/10 07:11:50 stsp Exp $        */
 /*
  * Copyright (c) 2008, 2019 Mark Kettenis <kettenis@openbsd.org>
  * Copyright (c) 2017, 2022 Patrick Wildt <patrick@blueri.se>
@@ -80,6 +80,7 @@ struct dwqe_softc {
        struct task             sc_statchg_task;
 
        uint32_t                sc_clk;
+       uint32_t                sc_clkrate;
 
        bus_size_t              sc_clk_sel;
        uint32_t                sc_clk_sel_125;