drm/amd/display: clear optc underflow before turn off odm clock

From Fudong Wang
5ee30bcfdb32526233d2572f3d9ec371928679f1 in linux 5.15.y/5.15.65
b2a93490201300a749ad261b5c5d05cb50179c44 in mainline linux

diff --git a/sys/dev/pci/drm/amd/display/dc/dcn10/dcn10_optc.c b/sys/dev/pci/drm/amd/display/dc/dcn10/dcn10_optc.c
index 03e8b26..b9092a7 100644 (file)
--- a/sys/dev/pci/drm/amd/display/dc/dcn10/dcn10_optc.c
+++ b/sys/dev/pci/drm/amd/display/dc/dcn10/dcn10_optc.c
@@ -480,6 +480,11 @@ void optc1_enable_optc_clock(struct timing_generator *optc, bool enable)
                                OTG_CLOCK_ON, 1,
                                1, 1000);
        } else  {
+
+               //last chance to clear underflow, otherwise, it will always there due to clock is off.
+               if (optc->funcs->is_optc_underflow_occurred(optc) == true)
+                       optc->funcs->clear_optc_underflow(optc);
+
                REG_UPDATE_2(OTG_CLOCK_CONTROL,
                                OTG_CLOCK_GATE_DIS, 0,
                                OTG_CLOCK_EN, 0);