-/* $OpenBSD: md_init.h,v 1.2 2013/12/03 06:21:41 guenther Exp $ */
+/* $OpenBSD: md_init.h,v 1.3 2014/04/18 15:09:52 guenther Exp $ */
/* $NetBSD: dot_init.h,v 1.3 2005/12/24 22:02:10 perry Exp $ */
/*-
__set_fpscr(0); \
__fpscr_values[0] |= FPSCR_DN; \
__fpscr_values[1] |= FPSCR_DN; \
- __asm __volatile__ ("lds %0, fpscr" \
+ __asm volatile ("lds %0, fpscr" \
: : "r" (__fpscr_values[1]));
#endif /* defined(__SH4__) && !defined(__SH4_NOFPU__) */
-/* $OpenBSD: bwx.c,v 1.6 2012/12/20 21:05:07 naddy Exp $ */
+/* $OpenBSD: bwx.c,v 1.7 2014/04/18 15:09:52 guenther Exp $ */
/*-
* Copyright (c) 1998 Doug Rabson
* All rights reserved.
#define PATH_APERTURE "/dev/xf86"
-#define mb() __asm__ __volatile__("mb" : : : "memory")
-#define wmb() __asm__ __volatile__("wmb" : : : "memory")
+#define mb() __asm__ volatile("mb" : : : "memory")
+#define wmb() __asm__ volatile("wmb" : : : "memory")
static int mem_fd = -1; /* file descriptor to /dev/mem */
static void *bwx_int1_ports = MAP_FAILED; /* mapped int1 io ports */
-/* $OpenBSD: io.c,v 1.4 2012/12/20 21:05:07 naddy Exp $ */
+/* $OpenBSD: io.c,v 1.5 2014/04/18 15:09:52 guenther Exp $ */
/*-
* Copyright (c) 1998 Doug Rabson
* All rights reserved.
writeb(void *handle, u_int32_t offset, u_int8_t val)
{
ops->writeb(handle, offset, val);
- __asm__ __volatile__ ("mb");
+ __asm__ volatile ("mb");
}
void
writew(void *handle, u_int32_t offset, u_int16_t val)
{
ops->writew(handle, offset, val);
- __asm__ __volatile__ ("mb");
+ __asm__ volatile ("mb");
}
void
writel(void *handle, u_int32_t offset, u_int32_t val)
{
ops->writel(handle, offset, val);
- __asm__ __volatile__ ("mb");
+ __asm__ volatile ("mb");
}
void
-/* $OpenBSD: fabs.c,v 1.10 2013/11/13 15:21:51 deraadt Exp $ */
+/* $OpenBSD: fabs.c,v 1.11 2014/04/18 15:09:52 guenther Exp $ */
/*
* Written by Miodrag Vallat. Public domain
fabs(double val)
{
- __asm__ __volatile__("fabs,dbl %0,%0" : "+f" (val));
+ __asm__ volatile("fabs,dbl %0,%0" : "+f" (val));
return (val);
}
-/* $OpenBSD: flt_rounds.c,v 1.4 2012/06/25 17:01:10 deraadt Exp $ */
+/* $OpenBSD: flt_rounds.c,v 1.5 2014/04/18 15:09:52 guenther Exp $ */
/*
* Written by Miodrag Vallat. Public domain.
{
u_int64_t fpsr;
- __asm__ __volatile__("fstd %%fr0,0(%1)" : "=m" (fpsr) : "r" (&fpsr));
+ __asm__ volatile("fstd %%fr0,0(%1)" : "=m" (fpsr) : "r" (&fpsr));
return map[(fpsr >> 41) & 0x03];
}
-/* $OpenBSD: fpgetmask.c,v 1.3 2002/10/21 18:41:05 mickey Exp $ */
+/* $OpenBSD: fpgetmask.c,v 1.4 2014/04/18 15:09:52 guenther Exp $ */
/*
* Written by Miodrag Vallat. Public domain
{
u_int64_t fpsr;
- __asm__ __volatile__("fstd %%fr0,0(%1)" : "=m" (fpsr) : "r" (&fpsr));
+ __asm__ volatile("fstd %%fr0,0(%1)" : "=m" (fpsr) : "r" (&fpsr));
return ((fpsr >> 32) & 0x1f);
}
-/* $OpenBSD: fpgetround.c,v 1.3 2002/10/21 18:41:05 mickey Exp $ */
+/* $OpenBSD: fpgetround.c,v 1.4 2014/04/18 15:09:52 guenther Exp $ */
/*
* Written by Miodrag Vallat. Public domain
{
u_int64_t fpsr;
- __asm__ __volatile__("fstd %%fr0,0(%1)" : "=m" (fpsr) : "r" (&fpsr));
+ __asm__ volatile("fstd %%fr0,0(%1)" : "=m" (fpsr) : "r" (&fpsr));
return ((fpsr >> 41) & 0x3);
}
-/* $OpenBSD: fpgetsticky.c,v 1.3 2002/10/21 18:41:05 mickey Exp $ */
+/* $OpenBSD: fpgetsticky.c,v 1.4 2014/04/18 15:09:52 guenther Exp $ */
/*
* Written by Miodrag Vallat. Public domain
{
u_int64_t fpsr;
- __asm__ __volatile__("fstd %%fr0,0(%1)" : "=m" (fpsr) : "r" (&fpsr));
+ __asm__ volatile("fstd %%fr0,0(%1)" : "=m" (fpsr) : "r" (&fpsr));
return ((fpsr >> 59) & 0x1f);
}
-/* $OpenBSD: fpsetmask.c,v 1.4 2004/01/05 06:06:16 otto Exp $ */
+/* $OpenBSD: fpsetmask.c,v 1.5 2014/04/18 15:09:52 guenther Exp $ */
/*
* Written by Miodrag Vallat. Public domain
u_int64_t fpsr;
fp_except old;
- __asm__ __volatile__("fstd %%fr0,0(%1)" : "=m"(fpsr) : "r"(&fpsr));
+ __asm__ volatile("fstd %%fr0,0(%1)" : "=m"(fpsr) : "r"(&fpsr));
old = (fpsr >> 32) & 0x1f;
fpsr = (fpsr & 0xffffffe000000000LL) | ((u_int64_t)(mask & 0x1f) << 32);
- __asm__ __volatile__("fldd 0(%0),%%fr0" : : "r"(&fpsr));
+ __asm__ volatile("fldd 0(%0),%%fr0" : : "r"(&fpsr));
return (old);
}
-/* $OpenBSD: fpsetround.c,v 1.3 2002/10/21 18:41:05 mickey Exp $ */
+/* $OpenBSD: fpsetround.c,v 1.4 2014/04/18 15:09:52 guenther Exp $ */
/*
* Written by Miodrag Vallat. Public domain
u_int64_t fpsr;
fp_rnd old;
- __asm__ __volatile__("fstd %%fr0,0(%1)" : "=m" (fpsr) : "r" (&fpsr));
+ __asm__ volatile("fstd %%fr0,0(%1)" : "=m" (fpsr) : "r" (&fpsr));
old = (fpsr >> 41) & 0x03;
fpsr = (fpsr & 0xfffff9ff00000000LL) |
((u_int64_t)(rnd_dir & 0x03) << 41);
- __asm__ __volatile__("fldd 0(%0),%%fr0" : : "r" (&fpsr));
+ __asm__ volatile("fldd 0(%0),%%fr0" : : "r" (&fpsr));
return (old);
}
-/* $OpenBSD: fpsetsticky.c,v 1.5 2011/04/22 14:44:08 martynas Exp $ */
+/* $OpenBSD: fpsetsticky.c,v 1.6 2014/04/18 15:09:52 guenther Exp $ */
/*
* Written by Miodrag Vallat. Public domain
u_int64_t fpsr;
fp_except old;
- __asm__ __volatile__("fstd %%fr0,0(%1)" : "=m" (fpsr) : "r" (&fpsr));
+ __asm__ volatile("fstd %%fr0,0(%1)" : "=m" (fpsr) : "r" (&fpsr));
old = (fpsr >> 59) & 0x1f;
fpsr = (fpsr & 0x07ffffff00000000LL) | ((u_int64_t)(mask & 0x1f) << 59);
- __asm__ __volatile__("fldd 0(%0),%%fr0" : : "r" (&fpsr));
+ __asm__ volatile("fldd 0(%0),%%fr0" : : "r" (&fpsr));
return (old);
}
-/* $OpenBSD: fabs.c,v 1.7 2013/11/13 15:21:51 deraadt Exp $ */
+/* $OpenBSD: fabs.c,v 1.8 2014/04/18 15:09:52 guenther Exp $ */
/*
* Written by Miodrag Vallat. Public domain
fabs(double val)
{
- __asm__ __volatile__("fabs,dbl %0,%0" : "+f" (val));
+ __asm__ volatile("fabs,dbl %0,%0" : "+f" (val));
return (val);
}
-/* $OpenBSD: flt_rounds.c,v 1.2 2012/06/25 17:01:10 deraadt Exp $ */
+/* $OpenBSD: flt_rounds.c,v 1.3 2014/04/18 15:09:52 guenther Exp $ */
/*
* Written by Miodrag Vallat. Public domain.
{
u_int64_t fpsr;
- __asm__ __volatile__("fstd %%fr0,0(%1)" : "=m" (fpsr) : "r" (&fpsr));
+ __asm__ volatile("fstd %%fr0,0(%1)" : "=m" (fpsr) : "r" (&fpsr));
return map[(fpsr >> 41) & 0x03];
}
-/* $OpenBSD: fpgetmask.c,v 1.1 2005/04/01 10:54:27 mickey Exp $ */
+/* $OpenBSD: fpgetmask.c,v 1.2 2014/04/18 15:09:52 guenther Exp $ */
/*
* Written by Miodrag Vallat. Public domain
{
u_int64_t fpsr;
- __asm__ __volatile__("fstd %%fr0,0(%1)" : "=m" (fpsr) : "r" (&fpsr));
+ __asm__ volatile("fstd %%fr0,0(%1)" : "=m" (fpsr) : "r" (&fpsr));
return ((fpsr >> 32) & 0x1f);
}
-/* $OpenBSD: fpgetround.c,v 1.1 2005/04/01 10:54:27 mickey Exp $ */
+/* $OpenBSD: fpgetround.c,v 1.2 2014/04/18 15:09:52 guenther Exp $ */
/*
* Written by Miodrag Vallat. Public domain
{
u_int64_t fpsr;
- __asm__ __volatile__("fstd %%fr0,0(%1)" : "=m" (fpsr) : "r" (&fpsr));
+ __asm__ volatile("fstd %%fr0,0(%1)" : "=m" (fpsr) : "r" (&fpsr));
return ((fpsr >> 41) & 0x3);
}
-/* $OpenBSD: fpgetsticky.c,v 1.1 2005/04/01 10:54:27 mickey Exp $ */
+/* $OpenBSD: fpgetsticky.c,v 1.2 2014/04/18 15:09:52 guenther Exp $ */
/*
* Written by Miodrag Vallat. Public domain
{
u_int64_t fpsr;
- __asm__ __volatile__("fstd %%fr0,0(%1)" : "=m" (fpsr) : "r" (&fpsr));
+ __asm__ volatile("fstd %%fr0,0(%1)" : "=m" (fpsr) : "r" (&fpsr));
return ((fpsr >> 59) & 0x1f);
}
-/* $OpenBSD: fpsetmask.c,v 1.1 2005/04/01 10:54:27 mickey Exp $ */
+/* $OpenBSD: fpsetmask.c,v 1.2 2014/04/18 15:09:52 guenther Exp $ */
/*
* Written by Miodrag Vallat. Public domain
u_int64_t fpsr;
fp_except old;
- __asm__ __volatile__("fstd %%fr0,0(%1)" : "=m"(fpsr) : "r"(&fpsr));
+ __asm__ volatile("fstd %%fr0,0(%1)" : "=m"(fpsr) : "r"(&fpsr));
old = (fpsr >> 32) & 0x1f;
fpsr = (fpsr & 0xffffffe000000000LL) | ((u_int64_t)(mask & 0x1f) << 32);
- __asm__ __volatile__("fldd 0(%0),%%fr0" : : "r"(&fpsr));
+ __asm__ volatile("fldd 0(%0),%%fr0" : : "r"(&fpsr));
return (old);
}
-/* $OpenBSD: fpsetround.c,v 1.1 2005/04/01 10:54:27 mickey Exp $ */
+/* $OpenBSD: fpsetround.c,v 1.2 2014/04/18 15:09:52 guenther Exp $ */
/*
* Written by Miodrag Vallat. Public domain
u_int64_t fpsr;
fp_rnd old;
- __asm__ __volatile__("fstd %%fr0,0(%1)" : "=m" (fpsr) : "r" (&fpsr));
+ __asm__ volatile("fstd %%fr0,0(%1)" : "=m" (fpsr) : "r" (&fpsr));
old = (fpsr >> 41) & 0x03;
fpsr = (fpsr & 0xfffff9ff00000000LL) |
((u_int64_t)(rnd_dir & 0x03) << 41);
- __asm__ __volatile__("fldd 0(%0),%%fr0" : : "r" (&fpsr));
+ __asm__ volatile("fldd 0(%0),%%fr0" : : "r" (&fpsr));
return (old);
}
-/* $OpenBSD: fpsetsticky.c,v 1.2 2011/04/23 21:40:52 martynas Exp $ */
+/* $OpenBSD: fpsetsticky.c,v 1.3 2014/04/18 15:09:52 guenther Exp $ */
/*
* Written by Miodrag Vallat. Public domain
u_int64_t fpsr;
fp_except old;
- __asm__ __volatile__("fstd %%fr0,0(%1)" : "=m" (fpsr) : "r" (&fpsr));
+ __asm__ volatile("fstd %%fr0,0(%1)" : "=m" (fpsr) : "r" (&fpsr));
old = (fpsr >> 59) & 0x1f;
fpsr = (fpsr & 0x07ffffff00000000LL) | ((u_int64_t)(mask & 0x1f) << 59);
- __asm__ __volatile__("fldd 0(%0),%%fr0" : : "r" (&fpsr));
+ __asm__ volatile("fldd 0(%0),%%fr0" : : "r" (&fpsr));
return (old);
}
-/* $OpenBSD: fabs.c,v 1.11 2013/03/28 18:09:38 martynas Exp $ */
+/* $OpenBSD: fabs.c,v 1.12 2014/04/18 15:09:52 guenther Exp $ */
/*
* Copyright (c) 2006 Miodrag Vallat.
*
fabs(double d)
{
#if defined(__SH4__) && !defined(__SH4_NOFPU__)
- __asm__ __volatile__("fabs %0" : "+f" (d));
+ __asm__ volatile("fabs %0" : "+f" (d));
#else
struct ieee_double *p = (struct ieee_double *)&d;
-/* $OpenBSD: flt_rounds.c,v 1.3 2012/06/25 17:01:11 deraadt Exp $ */
+/* $OpenBSD: flt_rounds.c,v 1.4 2014/04/18 15:09:52 guenther Exp $ */
/*
* Copyright (c) 2006 Miodrag Vallat.
*
#if !defined(SOFTFLOAT)
register_t fpscr;
- __asm__ __volatile__ ("sts fpscr, %0" : "=r" (fpscr));
+ __asm__ volatile ("sts fpscr, %0" : "=r" (fpscr));
return rndmap[fpscr & 0x03];
#else
return rndmap[fpgetround()];
-/* $OpenBSD: fpgetmask.c,v 1.1.1.1 2006/10/10 22:07:10 miod Exp $ */
+/* $OpenBSD: fpgetmask.c,v 1.2 2014/04/18 15:09:52 guenther Exp $ */
/*
* Copyright (c) 2006 Miodrag Vallat.
*
{
register_t fpscr;
- __asm__ __volatile__ ("sts fpscr, %0" : "=r" (fpscr));
+ __asm__ volatile ("sts fpscr, %0" : "=r" (fpscr));
return ((fpscr >> 7) & 0x1f);
}
-/* $OpenBSD: fpgetround.c,v 1.1.1.1 2006/10/10 22:07:10 miod Exp $ */
+/* $OpenBSD: fpgetround.c,v 1.2 2014/04/18 15:09:52 guenther Exp $ */
/*
* Copyright (c) 2006 Miodrag Vallat.
*
{
register_t fpscr;
- __asm__ __volatile__ ("sts fpscr, %0" : "=r" (fpscr));
+ __asm__ volatile ("sts fpscr, %0" : "=r" (fpscr));
return (fpscr & 0x3);
}
-/* $OpenBSD: fpgetsticky.c,v 1.1.1.1 2006/10/10 22:07:10 miod Exp $ */
+/* $OpenBSD: fpgetsticky.c,v 1.2 2014/04/18 15:09:52 guenther Exp $ */
/*
* Copyright (c) 2006 Miodrag Vallat.
*
{
register_t fpscr;
- __asm__ __volatile__ ("sts fpscr, %0" : "=r" (fpscr));
+ __asm__ volatile ("sts fpscr, %0" : "=r" (fpscr));
return ((fpscr >> 2) & 0x1f);
}
-/* $OpenBSD: fpsetmask.c,v 1.2 2007/03/02 06:11:54 miod Exp $ */
+/* $OpenBSD: fpsetmask.c,v 1.3 2014/04/18 15:09:52 guenther Exp $ */
/*
* Copyright (c) 2006 Miodrag Vallat.
*
__fpscr_values[0] = (__fpscr_values[0] & ~(0x1f << 7)) | (mask << 7);
__fpscr_values[1] = (__fpscr_values[1] & ~(0x1f << 7)) | (mask << 7);
#endif
- __asm__ __volatile__ ("sts fpscr, %0" : "=r" (fpscr));
+ __asm__ volatile ("sts fpscr, %0" : "=r" (fpscr));
nfpscr = (fpscr & ~(0x1f << 7)) | (mask << 7);
- __asm__ __volatile__ ("lds %0, fpscr" : : "r" (nfpscr));
+ __asm__ volatile ("lds %0, fpscr" : : "r" (nfpscr));
return ((fpscr >> 7) & 0x1f);
}
-/* $OpenBSD: fpsetround.c,v 1.2 2007/03/02 06:11:54 miod Exp $ */
+/* $OpenBSD: fpsetround.c,v 1.3 2014/04/18 15:09:52 guenther Exp $ */
/*
* Copyright (c) 2006 Miodrag Vallat.
*
extern register_t __fpscr_values[2];
#endif
- __asm__ __volatile__ ("sts fpscr, %0" : "=r" (fpscr));
+ __asm__ volatile ("sts fpscr, %0" : "=r" (fpscr));
if (rnd_dir == FP_RN || rnd_dir == FP_RZ) {
nfpscr = (fpscr & ~0x03) | rnd_dir;
#if defined(__SH4__) && !defined(__SH4_NOFPU__)
__fpscr_values[0] = (__fpscr_values[0] & ~0x03) | rnd_dir;
__fpscr_values[1] = (__fpscr_values[1] & ~0x03) | rnd_dir;
#endif
- __asm__ __volatile__ ("lds %0, fpscr" : : "r" (nfpscr));
+ __asm__ volatile ("lds %0, fpscr" : : "r" (nfpscr));
}
/* else how report an error? */
-/* $OpenBSD: fpsetsticky.c,v 1.2 2007/03/02 06:11:54 miod Exp $ */
+/* $OpenBSD: fpsetsticky.c,v 1.3 2014/04/18 15:09:52 guenther Exp $ */
/*
* Copyright (c) 2006 Miodrag Vallat.
*
__fpscr_values[0] = (__fpscr_values[0] & ~(0x1f << 2)) | (mask << 2);
__fpscr_values[1] = (__fpscr_values[1] & ~(0x1f << 2)) | (mask << 2);
#endif
- __asm__ __volatile__ ("sts fpscr, %0" : "=r" (fpscr));
+ __asm__ volatile ("sts fpscr, %0" : "=r" (fpscr));
nfpscr = (fpscr & ~(0x1f << 2)) | (mask << 2);
- __asm__ __volatile__ ("lds %0, fpscr" : : "r" (nfpscr));
+ __asm__ volatile ("lds %0, fpscr" : : "r" (nfpscr));
return ((fpscr >> 2) & 0x1f);
}
-/* $OpenBSD: fenv.c,v 1.2 2011/04/28 17:34:23 martynas Exp $ */
+/* $OpenBSD: fenv.c,v 1.3 2014/04/18 15:09:52 guenther Exp $ */
/*
* Copyright (c) 2011 Martynas Venckus <martynas@openbsd.org>
unsigned long fpcr;
/* Store the current floating-point control register */
- __asm__ __volatile__ ("trapb");
- __asm__ __volatile__ ("mf_fpcr %0" : "=f" (fpcr));
- __asm__ __volatile__ ("trapb");
+ __asm__ volatile ("trapb");
+ __asm__ volatile ("mf_fpcr %0" : "=f" (fpcr));
+ __asm__ volatile ("trapb");
return ((fpcr >> _ROUND_SHIFT) & _ROUND_MASK);
}
return (-1);
/* Store the current floating-point control register */
- __asm__ __volatile__ ("trapb");
- __asm__ __volatile__ ("mf_fpcr %0" : "=f" (fpcr));
- __asm__ __volatile__ ("trapb");
+ __asm__ volatile ("trapb");
+ __asm__ volatile ("mf_fpcr %0" : "=f" (fpcr));
+ __asm__ volatile ("trapb");
/* Set the rounding direction */
fpcr &= ~((unsigned long)_ROUND_MASK << _ROUND_SHIFT);
fpcr |= (unsigned long)round << _ROUND_SHIFT;
/* Load the floating-point control register */
- __asm__ __volatile__ ("trapb");
- __asm__ __volatile__ ("mt_fpcr %0" : : "f" (fpcr));
- __asm__ __volatile__ ("trapb");
+ __asm__ volatile ("trapb");
+ __asm__ volatile ("mt_fpcr %0" : : "f" (fpcr));
+ __asm__ volatile ("trapb");
return (0);
}
envp->__mask = sysarch(ALPHA_FPGETMASK, 0L) & FE_ALL_EXCEPT;
/* Store the current floating-point control register */
- __asm__ __volatile__ ("trapb");
- __asm__ __volatile__ ("mf_fpcr %0" : "=f" (fpcr));
- __asm__ __volatile__ ("trapb");
+ __asm__ volatile ("trapb");
+ __asm__ volatile ("mf_fpcr %0" : "=f" (fpcr));
+ __asm__ volatile ("trapb");
envp->__round = (fpcr >> _ROUND_SHIFT) & _ROUND_MASK;
return (0);
sysarch(ALPHA_FPSETMASK, &a);
/* Store the current floating-point control register */
- __asm__ __volatile__ ("trapb");
- __asm__ __volatile__ ("mf_fpcr %0" : "=f" (fpcr));
- __asm__ __volatile__ ("trapb");
+ __asm__ volatile ("trapb");
+ __asm__ volatile ("mf_fpcr %0" : "=f" (fpcr));
+ __asm__ volatile ("trapb");
/* Set the requested flags */
fpcr &= ~((unsigned long)_ROUND_MASK << _ROUND_SHIFT);
fpcr |= ((unsigned long)envp->__round & _ROUND_MASK) << _ROUND_SHIFT;
/* Load the floating-point control register */
- __asm__ __volatile__ ("trapb");
- __asm__ __volatile__ ("mt_fpcr %0" : : "f" (fpcr));
- __asm__ __volatile__ ("trapb");
+ __asm__ volatile ("trapb");
+ __asm__ volatile ("mt_fpcr %0" : : "f" (fpcr));
+ __asm__ volatile ("trapb");
return (0);
}
-/* $OpenBSD: fenv.c,v 1.3 2012/12/05 23:20:02 deraadt Exp $ */
+/* $OpenBSD: fenv.c,v 1.4 2014/04/18 15:09:52 guenther Exp $ */
/* $NetBSD: fenv.c,v 1.1 2010/07/31 21:47:53 joerg Exp $ */
/*-
excepts &= FE_ALL_EXCEPT;
/* Store the current x87 floating-point environment */
- __asm__ __volatile__ ("fnstenv %0" : "=m" (fenv));
+ __asm__ volatile ("fnstenv %0" : "=m" (fenv));
/* Clear the requested floating-point exceptions */
fenv.__x87.__status &= ~excepts;
/* Load the x87 floating-point environent */
- __asm__ __volatile__ ("fldenv %0" : : "m" (fenv));
+ __asm__ volatile ("fldenv %0" : : "m" (fenv));
/* Same for SSE environment */
- __asm__ __volatile__ ("stmxcsr %0" : "=m" (mxcsr));
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
mxcsr &= ~excepts;
- __asm__ __volatile__ ("ldmxcsr %0" : : "m" (mxcsr));
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr));
return (0);
}
excepts &= FE_ALL_EXCEPT;
/* Store the current x87 status register */
- __asm__ __volatile__ ("fnstsw %0" : "=am" (status));
+ __asm__ volatile ("fnstsw %0" : "=am" (status));
/* Store the MXCSR register */
- __asm__ __volatile__ ("stmxcsr %0" : "=m" (mxcsr));
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
/* Store the results in flagp */
*flagp = (status | mxcsr) & excepts;
excepts &= FE_ALL_EXCEPT;
fesetexceptflag((fexcept_t *)&excepts, excepts);
- __asm__ __volatile__ ("fwait");
+ __asm__ volatile ("fwait");
return (0);
}
excepts &= FE_ALL_EXCEPT;
/* Store the current x87 floating-point environment */
- __asm__ __volatile__ ("fnstenv %0" : "=m" (fenv));
+ __asm__ volatile ("fnstenv %0" : "=m" (fenv));
/* Set the requested status flags */
fenv.__x87.__status &= ~excepts;
fenv.__x87.__status |= *flagp & excepts;
/* Load the x87 floating-point environent */
- __asm__ __volatile__ ("fldenv %0" : : "m" (fenv));
+ __asm__ volatile ("fldenv %0" : : "m" (fenv));
/* Same for SSE environment */
- __asm__ __volatile__ ("stmxcsr %0" : "=m" (mxcsr));
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
mxcsr &= ~excepts;
mxcsr |= *flagp & excepts;
- __asm__ __volatile__ ("ldmxcsr %0" : : "m" (mxcsr));
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr));
return (0);
}
excepts &= FE_ALL_EXCEPT;
/* Store the current x87 status register */
- __asm__ __volatile__ ("fnstsw %0" : "=am" (status));
+ __asm__ volatile ("fnstsw %0" : "=am" (status));
/* Store the MXCSR register state */
- __asm__ __volatile__ ("stmxcsr %0" : "=m" (mxcsr));
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
return ((status | mxcsr) & excepts);
}
* out to be about 5 times faster than reading it on the SSE
* unit on an Opteron 244.
*/
- __asm__ __volatile__ ("fnstcw %0" : "=m" (control));
+ __asm__ volatile ("fnstcw %0" : "=m" (control));
return (control & _X87_ROUND_MASK);
}
return (-1);
/* Store the current x87 control word register */
- __asm__ __volatile__ ("fnstcw %0" : "=m" (control));
+ __asm__ volatile ("fnstcw %0" : "=m" (control));
/* Set the rounding direction */
control &= ~_X87_ROUND_MASK;
control |= round;
/* Load the x87 control word register */
- __asm__ __volatile__ ("fldcw %0" : : "m" (control));
+ __asm__ volatile ("fldcw %0" : : "m" (control));
/* Same for the SSE environment */
- __asm__ __volatile__ ("stmxcsr %0" : "=m" (mxcsr));
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
mxcsr &= ~(_X87_ROUND_MASK << _SSE_ROUND_SHIFT);
mxcsr |= round << _SSE_ROUND_SHIFT;
- __asm__ __volatile__ ("ldmxcsr %0" : : "m" (mxcsr));
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr));
return (0);
}
fegetenv(fenv_t *envp)
{
/* Store the current x87 floating-point environment */
- __asm__ __volatile__ ("fnstenv %0" : "=m" (*envp));
+ __asm__ volatile ("fnstenv %0" : "=m" (*envp));
/* Store the MXCSR register state */
- __asm__ __volatile__ ("stmxcsr %0" : "=m" (envp->__mxcsr));
+ __asm__ volatile ("stmxcsr %0" : "=m" (envp->__mxcsr));
/*
* When an FNSTENV instruction is executed, all pending exceptions are
* 8.6 X87 FPU EXCEPTION SYNCHRONIZATION -
* Intel(R) 64 and IA-32 Architectures Softare Developer's Manual - Vol1
*/
- __asm__ __volatile__ ("fldcw %0" : : "m" (envp->__x87.__control));
+ __asm__ volatile ("fldcw %0" : : "m" (envp->__x87.__control));
return (0);
}
unsigned int mxcsr;
/* Store the current x87 floating-point environment */
- __asm__ __volatile__ ("fnstenv %0" : "=m" (*envp));
+ __asm__ volatile ("fnstenv %0" : "=m" (*envp));
/* Clear all exception flags in FPU */
- __asm__ __volatile__ ("fnclex");
+ __asm__ volatile ("fnclex");
/* Store the MXCSR register state */
- __asm__ __volatile__ ("stmxcsr %0" : "=m" (envp->__mxcsr));
+ __asm__ volatile ("stmxcsr %0" : "=m" (envp->__mxcsr));
/* Clear exception flags in MXCSR */
mxcsr = envp->__mxcsr;
mxcsr |= FE_ALL_EXCEPT << _SSE_MASK_SHIFT;
/* Store the MXCSR register */
- __asm__ __volatile__ ("ldmxcsr %0" : : "m" (mxcsr));
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr));
return (0);
}
fesetenv(const fenv_t *envp)
{
/* Load the x87 floating-point environent */
- __asm__ __volatile__ ("fldenv %0" : : "m" (*envp));
+ __asm__ volatile ("fldenv %0" : : "m" (*envp));
/* Store the MXCSR register */
- __asm__ __volatile__ ("ldmxcsr %0" : : "m" (envp->__mxcsr));
+ __asm__ volatile ("ldmxcsr %0" : : "m" (envp->__mxcsr));
return (0);
}
unsigned int mxcsr;
/* Store the x87 status register */
- __asm__ __volatile__ ("fnstsw %0" : "=am" (status));
+ __asm__ volatile ("fnstsw %0" : "=am" (status));
/* Store the MXCSR register */
- __asm__ __volatile__ ("stmxcsr %0" : "=m" (mxcsr));
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
/* Install new floating-point environment */
fesetenv(envp);
mask &= FE_ALL_EXCEPT;
- __asm__ __volatile__ ("fnstcw %0" : "=m" (control));
- __asm__ __volatile__ ("stmxcsr %0" : "=m" (mxcsr));
+ __asm__ volatile ("fnstcw %0" : "=m" (control));
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
omask = ~(control | (mxcsr >> _SSE_MASK_SHIFT)) & FE_ALL_EXCEPT;
control &= ~mask;
- __asm__ __volatile__ ("fldcw %0" : : "m" (control));
+ __asm__ volatile ("fldcw %0" : : "m" (control));
mxcsr &= ~(mask << _SSE_MASK_SHIFT);
- __asm__ __volatile__ ("ldmxcsr %0" : : "m" (mxcsr));
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr));
return (omask);
}
mask &= FE_ALL_EXCEPT;
- __asm__ __volatile__ ("fnstcw %0" : "=m" (control));
- __asm__ __volatile__ ("stmxcsr %0" : "=m" (mxcsr));
+ __asm__ volatile ("fnstcw %0" : "=m" (control));
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
omask = ~(control | (mxcsr >> _SSE_MASK_SHIFT)) & FE_ALL_EXCEPT;
control |= mask;
- __asm__ __volatile__ ("fldcw %0" : : "m" (control));
+ __asm__ volatile ("fldcw %0" : : "m" (control));
mxcsr |= mask << _SSE_MASK_SHIFT;
- __asm__ __volatile__ ("ldmxcsr %0" : : "m" (mxcsr));
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr));
return (omask);
}
* We assume that the masks for the x87 and the SSE unit are
* the same.
*/
- __asm__ __volatile__ ("fnstcw %0" : "=m" (control));
+ __asm__ volatile ("fnstcw %0" : "=m" (control));
return (~control & FE_ALL_EXCEPT);
}
double
remainder(double x, double p)
{
- __asm__ __volatile__("frem,dbl %0,%1,%0" : "+f" (x) : "f" (p));
+ __asm__ volatile("frem,dbl %0,%1,%0" : "+f" (x) : "f" (p));
return (x);
}
float
remainderf(float x, float p)
{
- __asm__ __volatile__("frem,sgl %0,%1,%0" : "+f" (x) : "f" (p));
+ __asm__ volatile("frem,sgl %0,%1,%0" : "+f" (x) : "f" (p));
return (x);
}
double
sqrt(double x)
{
- __asm__ __volatile__ ("fsqrt,dbl %0, %0" : "+f" (x));
+ __asm__ volatile ("fsqrt,dbl %0, %0" : "+f" (x));
return (x);
}
float
sqrtf(float x)
{
- __asm__ __volatile__ ("fsqrt,sgl %0, %0" : "+f" (x));
+ __asm__ volatile ("fsqrt,sgl %0, %0" : "+f" (x));
return (x);
}
-/* $OpenBSD: fenv.c,v 1.3 2012/12/05 23:20:02 deraadt Exp $ */
+/* $OpenBSD: fenv.c,v 1.4 2014/04/18 15:09:52 guenther Exp $ */
/*
* Copyright (c) 2011 Martynas Venckus <martynas@openbsd.org>
excepts &= FE_ALL_EXCEPT;
/* Store the current floating-point status register */
- __asm__ __volatile__ ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) :
+ __asm__ volatile ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) :
"r" (&u.fpsr));
/* Clear the requested floating-point exceptions */
u.bits[0] &= ~(excepts << _MASK_SHIFT);
/* Load the floating-point status register */
- __asm__ __volatile__ ("fldd 0(%0), %%fr0" : : "r" (&u.fpsr));
+ __asm__ volatile ("fldd 0(%0), %%fr0" : : "r" (&u.fpsr));
return (0);
}
excepts &= FE_ALL_EXCEPT;
/* Store the current floating-point status register */
- __asm__ __volatile__ ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) :
+ __asm__ volatile ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) :
"r" (&u.fpsr));
/* Store the results in flagp */
d = 0x1p-1022;
d += 1.0;
}
- __asm__ __volatile__ ("fldd 0(%%sr0,%%sp), %0" : "=f" (d));
+ __asm__ volatile ("fldd 0(%%sr0,%%sp), %0" : "=f" (d));
return (0);
}
excepts &= FE_ALL_EXCEPT;
/* Store the current floating-point status register */
- __asm__ __volatile__ ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) :
+ __asm__ volatile ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) :
"r" (&u.fpsr));
/* Set the requested status flags */
u.bits[0] |= (*flagp & excepts) << _MASK_SHIFT;
/* Load the floating-point status register */
- __asm__ __volatile__ ("fldd 0(%0), %%fr0" : : "r" (&u.fpsr));
+ __asm__ volatile ("fldd 0(%0), %%fr0" : : "r" (&u.fpsr));
return (0);
}
excepts &= FE_ALL_EXCEPT;
/* Store the current floating-point status register */
- __asm__ __volatile__ ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) :
+ __asm__ volatile ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) :
"r" (&u.fpsr));
return ((u.bits[0] >> _MASK_SHIFT) & excepts);
volatile union u u;
/* Store the current floating-point status register */
- __asm__ __volatile__ ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) :
+ __asm__ volatile ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) :
"r" (&u.fpsr));
return (u.bits[0] & _ROUND_MASK);
return (-1);
/* Store the current floating-point status register */
- __asm__ __volatile__ ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) :
+ __asm__ volatile ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) :
"r" (&u.fpsr));
/* Set the rounding direction */
u.bits[0] |= round;
/* Load the floating-point status register */
- __asm__ __volatile__ ("fldd 0(%0), %%fr0" : : "r" (&u.fpsr));
+ __asm__ volatile ("fldd 0(%0), %%fr0" : : "r" (&u.fpsr));
return (0);
}
volatile union u u;
/* Store the current floating-point status register */
- __asm__ __volatile__ ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) :
+ __asm__ volatile ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) :
"r" (&u.fpsr));
*envp = u.bits[0];
volatile union u u;
/* Store the current floating-point status register */
- __asm__ __volatile__ ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) :
+ __asm__ volatile ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) :
"r" (&u.fpsr));
*envp = u.bits[0];
/* Mask all exceptions */
u.bits[0] &= ~FE_ALL_EXCEPT;
- __asm__ __volatile__ ("fldd 0(%0), %%fr0" : : "r" (&u.fpsr));
+ __asm__ volatile ("fldd 0(%0), %%fr0" : : "r" (&u.fpsr));
return (0);
}
volatile union u u;
/* Store the current floating-point status register */
- __asm__ __volatile__ ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) :
+ __asm__ volatile ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) :
"r" (&u.fpsr));
/* Set the requested flags */
(FE_ALL_EXCEPT << _MASK_SHIFT));
/* Load the floating-point status register */
- __asm__ __volatile__ ("fldd 0(%0), %%fr0" : : "r" (&u.fpsr));
+ __asm__ volatile ("fldd 0(%0), %%fr0" : : "r" (&u.fpsr));
return (0);
}
volatile union u u;
/* Store the current floating-point status register */
- __asm__ __volatile__ ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) :
+ __asm__ volatile ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) :
"r" (&u.fpsr));
/* Install new floating-point environment */
mask &= FE_ALL_EXCEPT;
/* Store the current floating-point status register */
- __asm__ __volatile__ ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) :
+ __asm__ volatile ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) :
"r" (&u.fpsr));
omask = u.bits[0] & FE_ALL_EXCEPT;
u.bits[0] |= mask;
/* Load the floating-point status register */
- __asm__ __volatile__ ("fldd 0(%0), %%fr0" : : "r" (&u.fpsr));
+ __asm__ volatile ("fldd 0(%0), %%fr0" : : "r" (&u.fpsr));
return (omask);
mask &= FE_ALL_EXCEPT;
/* Store the current floating-point status register */
- __asm__ __volatile__ ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) :
+ __asm__ volatile ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) :
"r" (&u.fpsr));
omask = u.bits[0] & FE_ALL_EXCEPT;
u.bits[0] &= ~mask;
/* Load the floating-point status register */
- __asm__ __volatile__ ("fldd 0(%0), %%fr0" : : "r" (&u.fpsr));
+ __asm__ volatile ("fldd 0(%0), %%fr0" : : "r" (&u.fpsr));
return (omask);
}
volatile union u u;
/* Store the current floating-point status register */
- __asm__ __volatile__ ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) :
+ __asm__ volatile ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) :
"r" (&u.fpsr));
return (u.bits[0] & FE_ALL_EXCEPT);
{
u_int64_t ofpsr, fpsr;
- __asm__ __volatile__("fstds %%fr0,0(%0)" :: "r" (&ofpsr) : "memory");
+ __asm__ volatile("fstds %%fr0,0(%0)" :: "r" (&ofpsr) : "memory");
fpsr = (ofpsr & ~((u_int64_t)FP_RM << (9 + 32))) |
((u_int64_t)FP_RP << (9 + 32));
- __asm__ __volatile__("fldds 0(%0), %%fr0" :: "r" (&fpsr) : "memory");
+ __asm__ volatile("fldds 0(%0), %%fr0" :: "r" (&fpsr) : "memory");
- __asm__ __volatile__("frnd,dbl %0,%0" : "+f" (x));
+ __asm__ volatile("frnd,dbl %0,%0" : "+f" (x));
- __asm__ __volatile__("fldds 0(%0), %%fr0" :: "r" (&ofpsr) : "memory");
+ __asm__ volatile("fldds 0(%0), %%fr0" :: "r" (&ofpsr) : "memory");
return (x);
}
{
u_int64_t ofpsr, fpsr;
- __asm__ __volatile__("fstds %%fr0,0(%0)" :: "r" (&ofpsr) : "memory");
+ __asm__ volatile("fstds %%fr0,0(%0)" :: "r" (&ofpsr) : "memory");
fpsr = (ofpsr & ~((u_int64_t)FP_RM << (9 + 32))) |
((u_int64_t)FP_RP << (9 + 32));
- __asm__ __volatile__("fldds 0(%0), %%fr0" :: "r" (&fpsr) : "memory");
+ __asm__ volatile("fldds 0(%0), %%fr0" :: "r" (&fpsr) : "memory");
- __asm__ __volatile__("frnd,sgl %0,%0" : "+f" (x));
+ __asm__ volatile("frnd,sgl %0,%0" : "+f" (x));
- __asm__ __volatile__("fldds 0(%0), %%fr0" :: "r" (&ofpsr) : "memory");
+ __asm__ volatile("fldds 0(%0), %%fr0" :: "r" (&ofpsr) : "memory");
return (x);
}
{
u_int64_t ofpsr, fpsr;
- __asm__ __volatile__("fstds %%fr0,0(%0)" :: "r" (&ofpsr) : "memory");
+ __asm__ volatile("fstds %%fr0,0(%0)" :: "r" (&ofpsr) : "memory");
fpsr = ofpsr | ((u_int64_t)FP_RM << (9 + 32));
- __asm__ __volatile__("fldds 0(%0), %%fr0" :: "r" (&fpsr) : "memory");
+ __asm__ volatile("fldds 0(%0), %%fr0" :: "r" (&fpsr) : "memory");
- __asm__ __volatile__("frnd,dbl %0,%0" : "+f" (x));
+ __asm__ volatile("frnd,dbl %0,%0" : "+f" (x));
- __asm__ __volatile__("fldds 0(%0), %%fr0" :: "r" (&ofpsr) : "memory");
+ __asm__ volatile("fldds 0(%0), %%fr0" :: "r" (&ofpsr) : "memory");
return (x);
}
{
u_int64_t ofpsr, fpsr;
- __asm__ __volatile__("fstds %%fr0,0(%0)" :: "r" (&ofpsr) : "memory");
+ __asm__ volatile("fstds %%fr0,0(%0)" :: "r" (&ofpsr) : "memory");
fpsr = ofpsr | ((u_int64_t)FP_RM << (9 + 32));
- __asm__ __volatile__("fldds 0(%0), %%fr0" :: "r" (&fpsr) : "memory");
+ __asm__ volatile("fldds 0(%0), %%fr0" :: "r" (&fpsr) : "memory");
- __asm__ __volatile__("frnd,sgl %0,%0" : "+f" (x));
+ __asm__ volatile("frnd,sgl %0,%0" : "+f" (x));
- __asm__ __volatile__("fldds 0(%0), %%fr0" :: "r" (&ofpsr) : "memory");
+ __asm__ volatile("fldds 0(%0), %%fr0" :: "r" (&ofpsr) : "memory");
return (x);
}
double
rint(double x)
{
- __asm__ __volatile__("frnd,dbl %0,%0" : "+f" (x));
+ __asm__ volatile("frnd,dbl %0,%0" : "+f" (x));
return (x);
}
float
rintf(float x)
{
- __asm__ __volatile__("frnd,sgl %0,%0" : "+f" (x));
+ __asm__ volatile("frnd,sgl %0,%0" : "+f" (x));
return (x);
}
{
u_int64_t ofpsr, fpsr;
- __asm__ __volatile__("fstds %%fr0,0(%0)" :: "r" (&ofpsr) : "memory");
+ __asm__ volatile("fstds %%fr0,0(%0)" :: "r" (&ofpsr) : "memory");
fpsr = (ofpsr & ~((u_int64_t)FP_RM << (9 + 32))) |
((u_int64_t)FP_RN << (9 + 32));
- __asm__ __volatile__("fldds 0(%0), %%fr0" :: "r" (&fpsr) : "memory");
+ __asm__ volatile("fldds 0(%0), %%fr0" :: "r" (&fpsr) : "memory");
- __asm__ __volatile__("frnd,dbl %0,%0" : "+f" (x));
+ __asm__ volatile("frnd,dbl %0,%0" : "+f" (x));
- __asm__ __volatile__("fldds 0(%0), %%fr0" :: "r" (&ofpsr) : "memory");
+ __asm__ volatile("fldds 0(%0), %%fr0" :: "r" (&ofpsr) : "memory");
return (x);
}
{
u_int64_t ofpsr, fpsr;
- __asm__ __volatile__("fstds %%fr0,0(%0)" :: "r" (&ofpsr) : "memory");
+ __asm__ volatile("fstds %%fr0,0(%0)" :: "r" (&ofpsr) : "memory");
fpsr = (ofpsr & ~((u_int64_t)FP_RM << (9 + 32))) |
((u_int64_t)FP_RN << (9 + 32));
- __asm__ __volatile__("fldds 0(%0), %%fr0" :: "r" (&fpsr) : "memory");
+ __asm__ volatile("fldds 0(%0), %%fr0" :: "r" (&fpsr) : "memory");
- __asm__ __volatile__("frnd,sgl %0,%0" : "+f" (x));
+ __asm__ volatile("frnd,sgl %0,%0" : "+f" (x));
- __asm__ __volatile__("fldds 0(%0), %%fr0" :: "r" (&ofpsr) : "memory");
+ __asm__ volatile("fldds 0(%0), %%fr0" :: "r" (&ofpsr) : "memory");
return (x);
}
{
u_int64_t ofpsr, fpsr;
- __asm__ __volatile__("fstds %%fr0,0(%0)" :: "r" (&ofpsr) : "memory");
+ __asm__ volatile("fstds %%fr0,0(%0)" :: "r" (&ofpsr) : "memory");
fpsr = (ofpsr & ~((u_int64_t)FP_RM << (9 + 32))) |
((u_int64_t)FP_RZ << (9 + 32));
- __asm__ __volatile__("fldds 0(%0), %%fr0" :: "r" (&fpsr) : "memory");
+ __asm__ volatile("fldds 0(%0), %%fr0" :: "r" (&fpsr) : "memory");
- __asm__ __volatile__("frnd,dbl %0,%0" : "+f" (x));
+ __asm__ volatile("frnd,dbl %0,%0" : "+f" (x));
- __asm__ __volatile__("fldds 0(%0), %%fr0" :: "r" (&ofpsr) : "memory");
+ __asm__ volatile("fldds 0(%0), %%fr0" :: "r" (&ofpsr) : "memory");
return (x);
}
{
u_int64_t ofpsr, fpsr;
- __asm__ __volatile__("fstds %%fr0,0(%0)" :: "r" (&ofpsr) : "memory");
+ __asm__ volatile("fstds %%fr0,0(%0)" :: "r" (&ofpsr) : "memory");
fpsr = (ofpsr & ~((u_int64_t)FP_RM << (9 + 32))) |
((u_int64_t)FP_RZ << (9 + 32));
- __asm__ __volatile__("fldds 0(%0), %%fr0" :: "r" (&fpsr) : "memory");
+ __asm__ volatile("fldds 0(%0), %%fr0" :: "r" (&fpsr) : "memory");
- __asm__ __volatile__("frnd,sgl %0,%0" : "+f" (x));
+ __asm__ volatile("frnd,sgl %0,%0" : "+f" (x));
- __asm__ __volatile__("fldds 0(%0), %%fr0" :: "r" (&ofpsr) : "memory");
+ __asm__ volatile("fldds 0(%0), %%fr0" :: "r" (&ofpsr) : "memory");
return (x);
}
-/* $OpenBSD: fenv.c,v 1.2 2012/12/05 23:20:02 deraadt Exp $ */
+/* $OpenBSD: fenv.c,v 1.3 2014/04/18 15:09:52 guenther Exp $ */
/*
* Copyright (c) 2011 Martynas Venckus <martynas@openbsd.org>
excepts &= FE_ALL_EXCEPT;
/* Store the current floating-point status register */
- __asm__ __volatile__ ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) :
+ __asm__ volatile ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) :
"r" (&u.fpsr));
/* Clear the requested floating-point exceptions */
u.bits[0] &= ~(excepts << _MASK_SHIFT);
/* Load the floating-point status register */
- __asm__ __volatile__ ("fldd 0(%0), %%fr0" : : "r" (&u.fpsr));
+ __asm__ volatile ("fldd 0(%0), %%fr0" : : "r" (&u.fpsr));
return (0);
}
excepts &= FE_ALL_EXCEPT;
/* Store the current floating-point status register */
- __asm__ __volatile__ ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) :
+ __asm__ volatile ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) :
"r" (&u.fpsr));
/* Store the results in flagp */
d = 0x1p-1022;
d += 1.0;
}
- __asm__ __volatile__ ("fldd 0(%%sr0,%%sp), %0" : "=f" (d));
+ __asm__ volatile ("fldd 0(%%sr0,%%sp), %0" : "=f" (d));
return (0);
}
excepts &= FE_ALL_EXCEPT;
/* Store the current floating-point status register */
- __asm__ __volatile__ ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) :
+ __asm__ volatile ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) :
"r" (&u.fpsr));
/* Set the requested status flags */
u.bits[0] |= (*flagp & excepts) << _MASK_SHIFT;
/* Load the floating-point status register */
- __asm__ __volatile__ ("fldd 0(%0), %%fr0" : : "r" (&u.fpsr));
+ __asm__ volatile ("fldd 0(%0), %%fr0" : : "r" (&u.fpsr));
return (0);
}
excepts &= FE_ALL_EXCEPT;
/* Store the current floating-point status register */
- __asm__ __volatile__ ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) :
+ __asm__ volatile ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) :
"r" (&u.fpsr));
return ((u.bits[0] >> _MASK_SHIFT) & excepts);
volatile union u u;
/* Store the current floating-point status register */
- __asm__ __volatile__ ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) :
+ __asm__ volatile ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) :
"r" (&u.fpsr));
return (u.bits[0] & _ROUND_MASK);
return (-1);
/* Store the current floating-point status register */
- __asm__ __volatile__ ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) :
+ __asm__ volatile ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) :
"r" (&u.fpsr));
/* Set the rounding direction */
u.bits[0] |= round;
/* Load the floating-point status register */
- __asm__ __volatile__ ("fldd 0(%0), %%fr0" : : "r" (&u.fpsr));
+ __asm__ volatile ("fldd 0(%0), %%fr0" : : "r" (&u.fpsr));
return (0);
}
volatile union u u;
/* Store the current floating-point status register */
- __asm__ __volatile__ ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) :
+ __asm__ volatile ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) :
"r" (&u.fpsr));
*envp = u.bits[0];
volatile union u u;
/* Store the current floating-point status register */
- __asm__ __volatile__ ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) :
+ __asm__ volatile ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) :
"r" (&u.fpsr));
*envp = u.bits[0];
/* Mask all exceptions */
u.bits[0] &= ~FE_ALL_EXCEPT;
- __asm__ __volatile__ ("fldd 0(%0), %%fr0" : : "r" (&u.fpsr));
+ __asm__ volatile ("fldd 0(%0), %%fr0" : : "r" (&u.fpsr));
return (0);
}
volatile union u u;
/* Store the current floating-point status register */
- __asm__ __volatile__ ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) :
+ __asm__ volatile ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) :
"r" (&u.fpsr));
/* Set the requested flags */
(FE_ALL_EXCEPT << _MASK_SHIFT));
/* Load the floating-point status register */
- __asm__ __volatile__ ("fldd 0(%0), %%fr0" : : "r" (&u.fpsr));
+ __asm__ volatile ("fldd 0(%0), %%fr0" : : "r" (&u.fpsr));
return (0);
}
volatile union u u;
/* Store the current floating-point status register */
- __asm__ __volatile__ ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) :
+ __asm__ volatile ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) :
"r" (&u.fpsr));
/* Install new floating-point environment */
mask &= FE_ALL_EXCEPT;
/* Store the current floating-point status register */
- __asm__ __volatile__ ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) :
+ __asm__ volatile ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) :
"r" (&u.fpsr));
omask = u.bits[0] & FE_ALL_EXCEPT;
u.bits[0] |= mask;
/* Load the floating-point status register */
- __asm__ __volatile__ ("fldd 0(%0), %%fr0" : : "r" (&u.fpsr));
+ __asm__ volatile ("fldd 0(%0), %%fr0" : : "r" (&u.fpsr));
return (omask);
mask &= FE_ALL_EXCEPT;
/* Store the current floating-point status register */
- __asm__ __volatile__ ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) :
+ __asm__ volatile ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) :
"r" (&u.fpsr));
omask = u.bits[0] & FE_ALL_EXCEPT;
u.bits[0] &= ~mask;
/* Load the floating-point status register */
- __asm__ __volatile__ ("fldd 0(%0), %%fr0" : : "r" (&u.fpsr));
+ __asm__ volatile ("fldd 0(%0), %%fr0" : : "r" (&u.fpsr));
return (omask);
}
volatile union u u;
/* Store the current floating-point status register */
- __asm__ __volatile__ ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) :
+ __asm__ volatile ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) :
"r" (&u.fpsr));
return (u.bits[0] & FE_ALL_EXCEPT);
-/* $OpenBSD: fenv.c,v 1.3 2012/12/05 23:20:02 deraadt Exp $ */
+/* $OpenBSD: fenv.c,v 1.4 2014/04/18 15:09:52 guenther Exp $ */
/* $NetBSD: fenv.c,v 1.3 2010/08/01 06:34:38 taca Exp $ */
/*-
excepts &= FE_ALL_EXCEPT;
/* Store the current x87 floating-point environment */
- __asm__ __volatile__ ("fnstenv %0" : "=m" (fenv));
+ __asm__ volatile ("fnstenv %0" : "=m" (fenv));
/* Clear the requested floating-point exceptions */
fenv.__x87.__status &= ~excepts;
/* Load the x87 floating-point environent */
- __asm__ __volatile__ ("fldenv %0" : : "m" (fenv));
+ __asm__ volatile ("fldenv %0" : : "m" (fenv));
/* Same for SSE environment */
if (__HAS_SSE) {
- __asm__ __volatile__ ("stmxcsr %0" : "=m" (mxcsr));
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
mxcsr &= ~excepts;
- __asm__ __volatile__ ("ldmxcsr %0" : : "m" (mxcsr));
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr));
}
return (0);
excepts &= FE_ALL_EXCEPT;
/* Store the current x87 status register */
- __asm__ __volatile__ ("fnstsw %0" : "=am" (status));
+ __asm__ volatile ("fnstsw %0" : "=am" (status));
/* Store the MXCSR register */
if (__HAS_SSE)
- __asm__ __volatile__ ("stmxcsr %0" : "=m" (mxcsr));
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
/* Store the results in flagp */
*flagp = (status | mxcsr) & excepts;
excepts &= FE_ALL_EXCEPT;
fesetexceptflag((fexcept_t *)&excepts, excepts);
- __asm__ __volatile__ ("fwait");
+ __asm__ volatile ("fwait");
return (0);
}
excepts &= FE_ALL_EXCEPT;
/* Store the current x87 floating-point environment */
- __asm__ __volatile__ ("fnstenv %0" : "=m" (fenv));
+ __asm__ volatile ("fnstenv %0" : "=m" (fenv));
/* Set the requested status flags */
fenv.__x87.__status &= ~excepts;
fenv.__x87.__status |= *flagp & excepts;
/* Load the x87 floating-point environent */
- __asm__ __volatile__ ("fldenv %0" : : "m" (fenv));
+ __asm__ volatile ("fldenv %0" : : "m" (fenv));
/* Same for SSE environment */
if (__HAS_SSE) {
- __asm__ __volatile__ ("stmxcsr %0" : "=m" (mxcsr));
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
mxcsr &= ~excepts;
mxcsr |= *flagp & excepts;
- __asm__ __volatile__ ("ldmxcsr %0" : : "m" (mxcsr));
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr));
}
return (0);
excepts &= FE_ALL_EXCEPT;
/* Store the current x87 status register */
- __asm__ __volatile__ ("fnstsw %0" : "=am" (status));
+ __asm__ volatile ("fnstsw %0" : "=am" (status));
/* Store the MXCSR register state */
if (__HAS_SSE)
- __asm__ __volatile__ ("stmxcsr %0" : "=m" (mxcsr));
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
return ((status | mxcsr) & excepts);
}
* out to be about 5 times faster than reading it on the SSE
* unit on an Opteron 244.
*/
- __asm__ __volatile__ ("fnstcw %0" : "=m" (control));
+ __asm__ volatile ("fnstcw %0" : "=m" (control));
return (control & _X87_ROUND_MASK);
}
return (-1);
/* Store the current x87 control word register */
- __asm__ __volatile__ ("fnstcw %0" : "=m" (control));
+ __asm__ volatile ("fnstcw %0" : "=m" (control));
/* Set the rounding direction */
control &= ~_X87_ROUND_MASK;
control |= round;
/* Load the x87 control word register */
- __asm__ __volatile__ ("fldcw %0" : : "m" (control));
+ __asm__ volatile ("fldcw %0" : : "m" (control));
/* Same for the SSE environment */
if (__HAS_SSE) {
- __asm__ __volatile__ ("stmxcsr %0" : "=m" (mxcsr));
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
mxcsr &= ~(_X87_ROUND_MASK << _SSE_ROUND_SHIFT);
mxcsr |= round << _SSE_ROUND_SHIFT;
- __asm__ __volatile__ ("ldmxcsr %0" : : "m" (mxcsr));
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr));
}
return (0);
fegetenv(fenv_t *envp)
{
/* Store the current x87 floating-point environment */
- __asm__ __volatile__ ("fnstenv %0" : "=m" (*envp));
+ __asm__ volatile ("fnstenv %0" : "=m" (*envp));
/* Store the MXCSR register state */
if (__HAS_SSE)
- __asm__ __volatile__ ("stmxcsr %0" : "=m" (envp->__mxcsr));
+ __asm__ volatile ("stmxcsr %0" : "=m" (envp->__mxcsr));
/*
* When an FNSTENV instruction is executed, all pending exceptions are
* 8.6 X87 FPU EXCEPTION SYNCHRONIZATION -
* Intel(R) 64 and IA-32 Architectures Softare Developer's Manual - Vol1
*/
- __asm__ __volatile__ ("fldcw %0" : : "m" (envp->__x87.__control));
+ __asm__ volatile ("fldcw %0" : : "m" (envp->__x87.__control));
return (0);
}
unsigned int mxcsr;
/* Store the current x87 floating-point environment */
- __asm__ __volatile__ ("fnstenv %0" : "=m" (*envp));
+ __asm__ volatile ("fnstenv %0" : "=m" (*envp));
/* Clear all exception flags in FPU */
- __asm__ __volatile__ ("fnclex");
+ __asm__ volatile ("fnclex");
if (__HAS_SSE) {
/* Store the MXCSR register state */
- __asm__ __volatile__ ("stmxcsr %0" : "=m" (envp->__mxcsr));
+ __asm__ volatile ("stmxcsr %0" : "=m" (envp->__mxcsr));
/* Clear exception flags in MXCSR */
mxcsr = envp->__mxcsr;
mxcsr |= FE_ALL_EXCEPT << _SSE_MASK_SHIFT;
/* Store the MXCSR register */
- __asm__ __volatile__ ("ldmxcsr %0" : : "m" (mxcsr));
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr));
}
return (0);
fesetenv(const fenv_t *envp)
{
/* Load the x87 floating-point environent */
- __asm__ __volatile__ ("fldenv %0" : : "m" (*envp));
+ __asm__ volatile ("fldenv %0" : : "m" (*envp));
/* Store the MXCSR register */
if (__HAS_SSE)
- __asm__ __volatile__ ("ldmxcsr %0" : : "m" (envp->__mxcsr));
+ __asm__ volatile ("ldmxcsr %0" : : "m" (envp->__mxcsr));
return (0);
}
unsigned int mxcsr = 0;
/* Store the x87 status register */
- __asm__ __volatile__ ("fnstsw %0" : "=am" (status));
+ __asm__ volatile ("fnstsw %0" : "=am" (status));
/* Store the MXCSR register */
if (__HAS_SSE)
- __asm__ __volatile__ ("stmxcsr %0" : "=m" (mxcsr));
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
/* Install new floating-point environment */
fesetenv(envp);
mask &= FE_ALL_EXCEPT;
- __asm__ __volatile__ ("fnstcw %0" : "=m" (control));
+ __asm__ volatile ("fnstcw %0" : "=m" (control));
if (__HAS_SSE)
- __asm__ __volatile__ ("stmxcsr %0" : "=m" (mxcsr));
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
omask = ~(control | (mxcsr >> _SSE_MASK_SHIFT)) & FE_ALL_EXCEPT;
control &= ~mask;
- __asm__ __volatile__ ("fldcw %0" : : "m" (control));
+ __asm__ volatile ("fldcw %0" : : "m" (control));
if (__HAS_SSE) {
mxcsr &= ~(mask << _SSE_MASK_SHIFT);
- __asm__ __volatile__ ("ldmxcsr %0" : : "m" (mxcsr));
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr));
}
return (omask);
mask &= FE_ALL_EXCEPT;
- __asm__ __volatile__ ("fnstcw %0" : "=m" (control));
+ __asm__ volatile ("fnstcw %0" : "=m" (control));
if (__HAS_SSE)
- __asm__ __volatile__ ("stmxcsr %0" : "=m" (mxcsr));
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
omask = ~(control | (mxcsr >> _SSE_MASK_SHIFT)) & FE_ALL_EXCEPT;
control |= mask;
- __asm__ __volatile__ ("fldcw %0" : : "m" (control));
+ __asm__ volatile ("fldcw %0" : : "m" (control));
if (__HAS_SSE) {
mxcsr |= mask << _SSE_MASK_SHIFT;
- __asm__ __volatile__ ("ldmxcsr %0" : : "m" (mxcsr));
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr));
}
return (omask);
* We assume that the masks for the x87 and the SSE unit are
* the same.
*/
- __asm__ __volatile__ ("fnstcw %0" : "=m" (control));
+ __asm__ volatile ("fnstcw %0" : "=m" (control));
return (~control & FE_ALL_EXCEPT);
}
-/* $OpenBSD: fenv.c,v 1.5 2013/01/05 11:20:55 miod Exp $ */
+/* $OpenBSD: fenv.c,v 1.6 2014/04/18 15:09:52 guenther Exp $ */
/*
* Copyright (c) 2011 Martynas Venckus <martynas@openbsd.org>
excepts &= FE_ALL_EXCEPT;
/* Store the current floating-point status register */
- __asm__ __volatile__ ("fldcr %0, %%fcr62" : "=r" (fpsr));
+ __asm__ volatile ("fldcr %0, %%fcr62" : "=r" (fpsr));
/* Clear the requested floating-point exceptions */
fpsr &= ~excepts;
/* Load the floating-point status register */
- __asm__ __volatile__ ("fstcr %0, %%fcr62" : : "r" (fpsr));
+ __asm__ volatile ("fstcr %0, %%fcr62" : : "r" (fpsr));
return (0);
}
excepts &= FE_ALL_EXCEPT;
/* Store the current floating-point status register */
- __asm__ __volatile__ ("fldcr %0, %%fcr62" : "=r" (fpsr));
+ __asm__ volatile ("fldcr %0, %%fcr62" : "=r" (fpsr));
/* Store the results in flagp */
*flagp = fpsr & excepts;
excepts &= FE_ALL_EXCEPT;
/* Store the current floating-point status register */
- __asm__ __volatile__ ("fldcr %0, %%fcr62" : "=r" (fpsr));
+ __asm__ volatile ("fldcr %0, %%fcr62" : "=r" (fpsr));
/* Set the requested status flags */
fpsr &= ~excepts;
fpsr |= *flagp & excepts;
/* Load the floating-point status register */
- __asm__ __volatile__ ("fstcr %0, %%fcr62" : : "r" (fpsr));
+ __asm__ volatile ("fstcr %0, %%fcr62" : : "r" (fpsr));
return (0);
}
excepts &= FE_ALL_EXCEPT;
/* Store the current floating-point status register */
- __asm__ __volatile__ ("fldcr %0, %%fcr62" : "=r" (fpsr));
+ __asm__ volatile ("fldcr %0, %%fcr62" : "=r" (fpsr));
return (fpsr & excepts);
}
unsigned int fpcr;
/* Store the current floating-point control register */
- __asm__ __volatile__ ("fldcr %0, %%fcr63" : "=r" (fpcr));
+ __asm__ volatile ("fldcr %0, %%fcr63" : "=r" (fpcr));
return (fpcr & _ROUND_MASK);
}
return (-1);
/* Store the current floating-point control register */
- __asm__ __volatile__ ("fldcr %0, %%fcr63" : "=r" (fpcr));
+ __asm__ volatile ("fldcr %0, %%fcr63" : "=r" (fpcr));
/* Set the rounding direction */
fpcr &= ~_ROUND_MASK;
fpcr |= round;
/* Load the floating-point control register */
- __asm__ __volatile__ ("fstcr %0, %%fcr63" : : "r" (fpcr));
+ __asm__ volatile ("fstcr %0, %%fcr63" : : "r" (fpcr));
return (0);
}
fegetenv(fenv_t *envp)
{
/* Store the current floating-point control and status registers */
- __asm__ __volatile__ ("fldcr %0, %%fcr63" : "=r" (envp->__control));
- __asm__ __volatile__ ("fldcr %0, %%fcr62" : "=r" (envp->__status));
+ __asm__ volatile ("fldcr %0, %%fcr63" : "=r" (envp->__control));
+ __asm__ volatile ("fldcr %0, %%fcr62" : "=r" (envp->__status));
return (0);
}
unsigned int fpsr, fpcr;
/* Store the current floating-point control and status registers */
- __asm__ __volatile__ ("fldcr %0, %%fcr63" : "=r" (envp->__control));
- __asm__ __volatile__ ("fldcr %0, %%fcr62" : "=r" (envp->__status));
+ __asm__ volatile ("fldcr %0, %%fcr63" : "=r" (envp->__control));
+ __asm__ volatile ("fldcr %0, %%fcr62" : "=r" (envp->__status));
/* Clear exception flags in FPSR */
fpsr = envp->__status;
fpsr &= ~FE_ALL_EXCEPT;
- __asm__ __volatile__ ("fstcr %0, %%fcr62" : : "r" (fpsr));
+ __asm__ volatile ("fstcr %0, %%fcr62" : : "r" (fpsr));
/* Mask all exceptions */
fpcr = envp->__control;
fpcr &= ~FE_ALL_EXCEPT;
- __asm__ __volatile__ ("fstcr %0, %%fcr63" : : "r" (fpcr));
+ __asm__ volatile ("fstcr %0, %%fcr63" : : "r" (fpcr));
return (0);
}
fenv_t fenv;
/* Store the current floating-point control and status registers */
- __asm__ __volatile__ ("fldcr %0, %%fcr63" : "=r" (fenv.__control));
- __asm__ __volatile__ ("fldcr %0, %%fcr62" : "=r" (fenv.__status));
+ __asm__ volatile ("fldcr %0, %%fcr63" : "=r" (fenv.__control));
+ __asm__ volatile ("fldcr %0, %%fcr62" : "=r" (fenv.__status));
/* Set the requested control flags */
fenv.__control &= ~(FE_ALL_EXCEPT | _ROUND_MASK);
fenv.__status |= envp->__status & FE_ALL_EXCEPT;
/* Load the floating-point control and status registers */
- __asm__ __volatile__ ("fstcr %0, %%fcr63" : : "r" (fenv.__control));
- __asm__ __volatile__ ("fstcr %0, %%fcr62" : : "r" (fenv.__status));
+ __asm__ volatile ("fstcr %0, %%fcr63" : : "r" (fenv.__control));
+ __asm__ volatile ("fstcr %0, %%fcr62" : : "r" (fenv.__status));
return (0);
}
unsigned int fpsr;
/* Store the current floating-point status register */
- __asm__ __volatile__ ("fldcr %0, %%fcr62" : "=r" (fpsr));
+ __asm__ volatile ("fldcr %0, %%fcr62" : "=r" (fpsr));
/* Install new floating-point environment */
fesetenv(envp);
mask &= FE_ALL_EXCEPT;
/* Store the current floating-point control register */
- __asm__ __volatile__ ("fldcr %0, %%fcr63" : "=r" (fpcr));
+ __asm__ volatile ("fldcr %0, %%fcr63" : "=r" (fpcr));
omask = fpcr & FE_ALL_EXCEPT;
fpcr |= mask;
/* Load the floating-point control register */
- __asm__ __volatile__ ("fstcr %0, %%fcr63" : : "r" (fpcr));
+ __asm__ volatile ("fstcr %0, %%fcr63" : : "r" (fpcr));
return (omask);
mask &= FE_ALL_EXCEPT;
/* Store the current floating-point control register */
- __asm__ __volatile__ ("fldcr %0, %%fcr63" : "=r" (fpcr));
+ __asm__ volatile ("fldcr %0, %%fcr63" : "=r" (fpcr));
omask = fpcr & FE_ALL_EXCEPT;
fpcr &= ~mask;
/* Load the floating-point control register */
- __asm__ __volatile__ ("fstcr %0, %%fcr63" : : "r" (fpcr));
+ __asm__ volatile ("fstcr %0, %%fcr63" : : "r" (fpcr));
return (omask);
}
unsigned int fpcr;
/* Store the current floating-point control register */
- __asm__ __volatile__ ("fldcr %0, %%fcr63" : "=r" (fpcr));
+ __asm__ volatile ("fldcr %0, %%fcr63" : "=r" (fpcr));
return (fpcr & FE_ALL_EXCEPT);
}
-/* $OpenBSD: fenv.c,v 1.3 2012/12/05 23:20:03 deraadt Exp $ */
+/* $OpenBSD: fenv.c,v 1.4 2014/04/18 15:09:52 guenther Exp $ */
/*
* Copyright (c) 2011 Martynas Venckus <martynas@openbsd.org>
excepts &= FE_ALL_EXCEPT;
/* Store the current floating-point control and status register */
- __asm__ __volatile__ ("cfc1 %0, $31" : "=r" (fcsr));
+ __asm__ volatile ("cfc1 %0, $31" : "=r" (fcsr));
/* Clear the requested floating-point exceptions */
fcsr &= ~excepts;
/* Load the floating-point control and status register */
- __asm__ __volatile__ ("ctc1 %0, $31" : : "r" (fcsr));
+ __asm__ volatile ("ctc1 %0, $31" : : "r" (fcsr));
return (0);
}
excepts &= FE_ALL_EXCEPT;
/* Store the current floating-point control and status register */
- __asm__ __volatile__ ("cfc1 %0, $31" : "=r" (fcsr));
+ __asm__ volatile ("cfc1 %0, $31" : "=r" (fcsr));
/* Store the results in flagp */
*flagp = fcsr & excepts;
excepts &= FE_ALL_EXCEPT;
/* Store the current floating-point control and status register */
- __asm__ __volatile__ ("cfc1 %0, $31" : "=r" (fcsr));
+ __asm__ volatile ("cfc1 %0, $31" : "=r" (fcsr));
fcsr |= excepts | (excepts << 10);
/* Load the floating-point control and status register */
- __asm__ __volatile__ ("ctc1 %0, $31" : : "r" (fcsr));
+ __asm__ volatile ("ctc1 %0, $31" : : "r" (fcsr));
return (0);
}
excepts &= FE_ALL_EXCEPT;
/* Store the current floating-point control and status register */
- __asm__ __volatile__ ("cfc1 %0, $31" : "=r" (fcsr));
+ __asm__ volatile ("cfc1 %0, $31" : "=r" (fcsr));
/* Set the requested status flags */
fcsr &= ~excepts;
fcsr |= *flagp & excepts;
/* Load the floating-point control and status register */
- __asm__ __volatile__ ("ctc1 %0, $31" : : "r" (fcsr));
+ __asm__ volatile ("ctc1 %0, $31" : : "r" (fcsr));
return (0);
}
excepts &= FE_ALL_EXCEPT;
/* Store the current floating-point control and status register */
- __asm__ __volatile__ ("cfc1 %0, $31" : "=r" (fcsr));
+ __asm__ volatile ("cfc1 %0, $31" : "=r" (fcsr));
return (fcsr & excepts);
}
unsigned int fcsr;
/* Store the current floating-point control and status register */
- __asm__ __volatile__ ("cfc1 %0, $31" : "=r" (fcsr));
+ __asm__ volatile ("cfc1 %0, $31" : "=r" (fcsr));
return (fcsr & _ROUND_MASK);
}
return (-1);
/* Store the current floating-point control and status register */
- __asm__ __volatile__ ("cfc1 %0, $31" : "=r" (fcsr));
+ __asm__ volatile ("cfc1 %0, $31" : "=r" (fcsr));
/* Set the rounding direction */
fcsr &= ~_ROUND_MASK;
fcsr |= round;
/* Load the floating-point control and status register */
- __asm__ __volatile__ ("ctc1 %0, $31" : : "r" (fcsr));
+ __asm__ volatile ("ctc1 %0, $31" : : "r" (fcsr));
return (0);
}
fegetenv(fenv_t *envp)
{
/* Store the current floating-point control and status register */
- __asm__ __volatile__ ("cfc1 %0, $31" : "=r" (*envp));
+ __asm__ volatile ("cfc1 %0, $31" : "=r" (*envp));
return (0);
}
unsigned int fcsr;
/* Store the current floating-point control and status register */
- __asm__ __volatile__ ("cfc1 %0, $31" : "=r" (*envp));
+ __asm__ volatile ("cfc1 %0, $31" : "=r" (*envp));
/* Clear exception flags in FCSR */
fcsr = *envp;
/* Mask all exceptions */
fcsr &= ~(FE_ALL_EXCEPT << _MASK_SHIFT);
- __asm__ __volatile__ ("ctc1 %0, $31" : : "r" (fcsr));
+ __asm__ volatile ("ctc1 %0, $31" : : "r" (fcsr));
return (0);
}
fesetenv(const fenv_t *envp)
{
/* Load the floating-point control and status register */
- __asm__ __volatile__ ("ctc1 %0, $31" : : "r" (*envp));
+ __asm__ volatile ("ctc1 %0, $31" : : "r" (*envp));
return (0);
}
unsigned int fcsr;
/* Store the current floating-point control and status register */
- __asm__ __volatile__ ("cfc1 %0, $31" : "=r" (fcsr));
+ __asm__ volatile ("cfc1 %0, $31" : "=r" (fcsr));
/* Install new floating-point environment */
fesetenv(envp);
mask &= FE_ALL_EXCEPT;
/* Store the current floating-point control and status register */
- __asm__ __volatile__ ("cfc1 %0, $31" : "=r" (fcsr));
+ __asm__ volatile ("cfc1 %0, $31" : "=r" (fcsr));
omask = (fcsr >> _MASK_SHIFT) & FE_ALL_EXCEPT;
fcsr |= mask << _MASK_SHIFT;
/* Load the floating-point control and status register */
- __asm__ __volatile__ ("ctc1 %0, $31" : : "r" (fcsr));
+ __asm__ volatile ("ctc1 %0, $31" : : "r" (fcsr));
return (omask);
mask &= FE_ALL_EXCEPT;
/* Store the current floating-point control and status register */
- __asm__ __volatile__ ("cfc1 %0, $31" : "=r" (fcsr));
+ __asm__ volatile ("cfc1 %0, $31" : "=r" (fcsr));
omask = (fcsr >> _MASK_SHIFT) & FE_ALL_EXCEPT;
fcsr &= ~(mask << _MASK_SHIFT);
/* Load the floating-point control and status register */
- __asm__ __volatile__ ("ctc1 %0, $31" : : "r" (fcsr));
+ __asm__ volatile ("ctc1 %0, $31" : : "r" (fcsr));
return (omask);
}
unsigned int fcsr;
/* Store the current floating-point control and status register */
- __asm__ __volatile__ ("cfc1 %0, $31" : "=r" (fcsr));
+ __asm__ volatile ("cfc1 %0, $31" : "=r" (fcsr));
return ((fcsr >> _MASK_SHIFT) & FE_ALL_EXCEPT);
}
-/* $OpenBSD: fenv.c,v 1.3 2012/12/05 23:20:03 deraadt Exp $ */
+/* $OpenBSD: fenv.c,v 1.4 2014/04/18 15:09:52 guenther Exp $ */
/*
* Copyright (c) 2011 Martynas Venckus <martynas@openbsd.org>
excepts &= FE_ALL_EXCEPT;
/* Store the current floating-point status and control register */
- __asm__ __volatile__ ("mffs %0" : "=f" (u.fpscr));
+ __asm__ volatile ("mffs %0" : "=f" (u.fpscr));
/* Clear the requested floating-point exceptions */
u.bits[1] &= ~excepts;
u.bits[1] &= ~_FE_INVALID_ALL;
/* Load the floating-point status and control register */
- __asm__ __volatile__ ("mtfsf 0xff,%0" :: "f" (u.fpscr));
+ __asm__ volatile ("mtfsf 0xff,%0" :: "f" (u.fpscr));
return (0);
}
excepts &= FE_ALL_EXCEPT;
/* Store the current floating-point status and control register */
- __asm__ __volatile__ ("mffs %0" : "=f" (u.fpscr));
+ __asm__ volatile ("mffs %0" : "=f" (u.fpscr));
/* Store the results in flagp */
*flagp = u.bits[1] & excepts;
excepts &= FE_ALL_EXCEPT;
/* Store the current floating-point status and control register */
- __asm__ __volatile__ ("mffs %0" : "=f" (u.fpscr));
+ __asm__ volatile ("mffs %0" : "=f" (u.fpscr));
/* Set the requested status flags */
u.bits[1] &= ~excepts;
}
/* Load the floating-point status and control register */
- __asm__ __volatile__ ("mtfsf 0xff,%0" :: "f" (u.fpscr));
+ __asm__ volatile ("mtfsf 0xff,%0" :: "f" (u.fpscr));
return (0);
}
excepts &= FE_ALL_EXCEPT;
/* Store the current floating-point status and control register */
- __asm__ __volatile__ ("mffs %0" : "=f" (u.fpscr));
+ __asm__ volatile ("mffs %0" : "=f" (u.fpscr));
return (u.bits[1] & excepts);
}
union u u;
/* Store the current floating-point status and control register */
- __asm__ __volatile__ ("mffs %0" : "=f" (u.fpscr));
+ __asm__ volatile ("mffs %0" : "=f" (u.fpscr));
return (u.bits[1] & _ROUND_MASK);
}
return (-1);
/* Store the current floating-point status and control register */
- __asm__ __volatile__ ("mffs %0" : "=f" (u.fpscr));
+ __asm__ volatile ("mffs %0" : "=f" (u.fpscr));
/* Set the rounding direction */
u.bits[1] &= ~_ROUND_MASK;
u.bits[1] |= round;
/* Load the floating-point status and control register */
- __asm__ __volatile__ ("mtfsf 0xff,%0" :: "f" (u.fpscr));
+ __asm__ volatile ("mtfsf 0xff,%0" :: "f" (u.fpscr));
return (0);
}
union u u;
/* Store the current floating-point status and control register */
- __asm__ __volatile__ ("mffs %0" : "=f" (u.fpscr));
+ __asm__ volatile ("mffs %0" : "=f" (u.fpscr));
*envp = u.bits[1];
union u u;
/* Store the current floating-point status and control register */
- __asm__ __volatile__ ("mffs %0" : "=f" (u.fpscr));
+ __asm__ volatile ("mffs %0" : "=f" (u.fpscr));
*envp = u.bits[1];
/* Mask all exceptions */
u.bits[1] &= ~(FE_ALL_EXCEPT >> _MASK_SHIFT);
- __asm__ __volatile__ ("mtfsf 0xff,%0" :: "f" (u.fpscr));
+ __asm__ volatile ("mtfsf 0xff,%0" :: "f" (u.fpscr));
return (0);
}
u.bits[1] = *envp;
/* Load the floating-point status and control register */
- __asm__ __volatile__ ("mtfsf 0xff,%0" :: "f" (u.fpscr));
+ __asm__ volatile ("mtfsf 0xff,%0" :: "f" (u.fpscr));
return (0);
}
union u u;
/* Store the current floating-point status and control register */
- __asm__ __volatile__ ("mffs %0" : "=f" (u.fpscr));
+ __asm__ volatile ("mffs %0" : "=f" (u.fpscr));
/* Install new floating-point environment */
fesetenv(envp);
mask &= FE_ALL_EXCEPT;
/* Store the current floating-point status and control register */
- __asm__ __volatile__ ("mffs %0" : "=f" (u.fpscr));
+ __asm__ volatile ("mffs %0" : "=f" (u.fpscr));
omask = (u.bits[1] << _MASK_SHIFT) & FE_ALL_EXCEPT;
u.bits[1] |= mask >> _MASK_SHIFT;
/* Load the floating-point status and control register */
- __asm__ __volatile__ ("mtfsf 0xff,%0" :: "f" (u.fpscr));
+ __asm__ volatile ("mtfsf 0xff,%0" :: "f" (u.fpscr));
return (omask);
mask &= FE_ALL_EXCEPT;
/* Store the current floating-point status and control register */
- __asm__ __volatile__ ("mffs %0" : "=f" (u.fpscr));
+ __asm__ volatile ("mffs %0" : "=f" (u.fpscr));
omask = (u.bits[1] << _MASK_SHIFT) & FE_ALL_EXCEPT;
u.bits[1] &= ~(mask >> _MASK_SHIFT);
/* Load the floating-point status and control register */
- __asm__ __volatile__ ("mtfsf 0xff,%0" :: "f" (u.fpscr));
+ __asm__ volatile ("mtfsf 0xff,%0" :: "f" (u.fpscr));
return (omask);
}
union u u;
/* Store the current floating-point status and control register */
- __asm__ __volatile__ ("mffs %0" : "=f" (u.fpscr));
+ __asm__ volatile ("mffs %0" : "=f" (u.fpscr));
return ((u.bits[1] << _MASK_SHIFT) & FE_ALL_EXCEPT);
}
-/* $OpenBSD: e_sqrt.c,v 1.5 2013/03/28 18:09:38 martynas Exp $ */
+/* $OpenBSD: e_sqrt.c,v 1.6 2014/04/18 15:09:52 guenther Exp $ */
/*
* Written by Martynas Venckus. Public domain
{
register_t fpscr, nfpscr;
- __asm__ __volatile__ ("sts fpscr, %0" : "=r" (fpscr));
+ __asm__ volatile ("sts fpscr, %0" : "=r" (fpscr));
/* Set floating-point mode to double-precision. */
nfpscr = fpscr | FPSCR_PR;
/* Do not set SZ and PR to 1 simultaneously. */
nfpscr &= ~FPSCR_SZ;
- __asm__ __volatile__ ("lds %0, fpscr" : : "r" (nfpscr));
- __asm__ __volatile__ ("fsqrt %0" : "+f" (d));
+ __asm__ volatile ("lds %0, fpscr" : : "r" (nfpscr));
+ __asm__ volatile ("fsqrt %0" : "+f" (d));
/* Restore fp status/control register. */
- __asm__ __volatile__ ("lds %0, fpscr" : : "r" (fpscr));
+ __asm__ volatile ("lds %0, fpscr" : : "r" (fpscr));
return (d);
}
-/* $OpenBSD: e_sqrtf.c,v 1.1 2009/04/05 19:26:27 martynas Exp $ */
+/* $OpenBSD: e_sqrtf.c,v 1.2 2014/04/18 15:09:52 guenther Exp $ */
/*
* Written by Martynas Venckus. Public domain
{
register_t fpscr, nfpscr;
- __asm__ __volatile__ ("sts fpscr, %0" : "=r" (fpscr));
+ __asm__ volatile ("sts fpscr, %0" : "=r" (fpscr));
/* Set floating-point mode to single-precision. */
nfpscr = fpscr & ~FPSCR_PR;
- __asm__ __volatile__ ("lds %0, fpscr" : : "r" (nfpscr));
- __asm__ __volatile__ ("fsqrt %0" : "+f" (f));
+ __asm__ volatile ("lds %0, fpscr" : : "r" (nfpscr));
+ __asm__ volatile ("fsqrt %0" : "+f" (f));
/* Restore fp status/control register. */
- __asm__ __volatile__ ("lds %0, fpscr" : : "r" (fpscr));
+ __asm__ volatile ("lds %0, fpscr" : : "r" (fpscr));
return (f);
}
-/* $OpenBSD: fenv.c,v 1.3 2012/12/05 23:20:03 deraadt Exp $ */
+/* $OpenBSD: fenv.c,v 1.4 2014/04/18 15:09:52 guenther Exp $ */
/*
* Copyright (c) 2011 Martynas Venckus <martynas@openbsd.org>
excepts &= FE_ALL_EXCEPT;
/* Store the current floating-point status and control register */
- __asm__ __volatile__ ("sts fpscr, %0" : "=r" (fpscr));
+ __asm__ volatile ("sts fpscr, %0" : "=r" (fpscr));
/* Clear the requested floating-point exceptions */
fpscr &= ~excepts;
__fpscr_values[1] &= ~excepts;
/* Load the floating-point status and control register */
- __asm__ __volatile__ ("lds %0, fpscr" : : "r" (fpscr));
+ __asm__ volatile ("lds %0, fpscr" : : "r" (fpscr));
return (0);
}
excepts &= FE_ALL_EXCEPT;
/* Store the current floating-point status and control register */
- __asm__ __volatile__ ("sts fpscr, %0" : "=r" (fpscr));
+ __asm__ volatile ("sts fpscr, %0" : "=r" (fpscr));
/* Store the results in flagp */
*flagp = fpscr & excepts;
excepts &= FE_ALL_EXCEPT;
/* Store the current floating-point status and control register */
- __asm__ __volatile__ ("sts fpscr, %0" : "=r" (fpscr));
+ __asm__ volatile ("sts fpscr, %0" : "=r" (fpscr));
/* Set the requested status flags */
fpscr &= ~excepts;
__fpscr_values[1] |= *flagp & excepts;
/* Load the floating-point status and control register */
- __asm__ __volatile__ ("lds %0, fpscr" : : "r" (fpscr));
+ __asm__ volatile ("lds %0, fpscr" : : "r" (fpscr));
return (0);
}
excepts &= FE_ALL_EXCEPT;
/* Store the current floating-point status and control register */
- __asm__ __volatile__ ("sts fpscr, %0" : "=r" (fpscr));
+ __asm__ volatile ("sts fpscr, %0" : "=r" (fpscr));
return (fpscr & excepts);
}
unsigned int fpscr;
/* Store the current floating-point status and control register */
- __asm__ __volatile__ ("sts fpscr, %0" : "=r" (fpscr));
+ __asm__ volatile ("sts fpscr, %0" : "=r" (fpscr));
return (fpscr & _ROUND_MASK);
}
return (-1);
/* Store the current floating-point status and control register */
- __asm__ __volatile__ ("sts fpscr, %0" : "=r" (fpscr));
+ __asm__ volatile ("sts fpscr, %0" : "=r" (fpscr));
/* Set the rounding direction */
fpscr &= ~_ROUND_MASK;
__fpscr_values[1] |= round;
/* Load the floating-point status and control register */
- __asm__ __volatile__ ("lds %0, fpscr" : : "r" (fpscr));
+ __asm__ volatile ("lds %0, fpscr" : : "r" (fpscr));
return (0);
}
fegetenv(fenv_t *envp)
{
/* Store the current floating-point status and control register */
- __asm__ __volatile__ ("sts fpscr, %0" : "=r" (*envp));
+ __asm__ volatile ("sts fpscr, %0" : "=r" (*envp));
return (0);
}
unsigned int fpscr;
/* Store the current floating-point status and control register */
- __asm__ __volatile__ ("sts fpscr, %0" : "=r" (fpscr));
+ __asm__ volatile ("sts fpscr, %0" : "=r" (fpscr));
*envp = fpscr;
__fpscr_values[1] &= ~(FE_ALL_EXCEPT << _MASK_SHIFT);
/* Load the floating-point status and control register */
- __asm__ __volatile__ ("lds %0, fpscr" : : "r" (fpscr));
+ __asm__ volatile ("lds %0, fpscr" : : "r" (fpscr));
return (0);
}
unsigned int fpscr;
/* Store the current floating-point status and control register */
- __asm__ __volatile__ ("sts fpscr, %0" : "=r" (fpscr));
+ __asm__ volatile ("sts fpscr, %0" : "=r" (fpscr));
/* Set the requested flags */
fpscr &= ~((FE_ALL_EXCEPT << _MASK_SHIFT) | _ROUND_MASK |
_ROUND_MASK | FE_ALL_EXCEPT);
/* Load the floating-point status and control register */
- __asm__ __volatile__ ("lds %0, fpscr" : : "r" (fpscr));
+ __asm__ volatile ("lds %0, fpscr" : : "r" (fpscr));
return (0);
}
unsigned int fpscr;
/* Store the current floating-point status and control register */
- __asm__ __volatile__ ("sts fpscr, %0" : "=r" (fpscr));
+ __asm__ volatile ("sts fpscr, %0" : "=r" (fpscr));
/* Install new floating-point environment */
fesetenv(envp);
mask &= FE_ALL_EXCEPT;
/* Store the current floating-point status and control register */
- __asm__ __volatile__ ("sts fpscr, %0" : "=r" (fpscr));
+ __asm__ volatile ("sts fpscr, %0" : "=r" (fpscr));
omask = (fpscr >> _MASK_SHIFT) & FE_ALL_EXCEPT;
fpscr |= mask << _MASK_SHIFT;
__fpscr_values[1] |= mask << _MASK_SHIFT;
/* Load the floating-point status and control register */
- __asm__ __volatile__ ("lds %0, fpscr" : : "r" (fpscr));
+ __asm__ volatile ("lds %0, fpscr" : : "r" (fpscr));
return (omask);
mask &= FE_ALL_EXCEPT;
/* Store the current floating-point status and control register */
- __asm__ __volatile__ ("sts fpscr, %0" : "=r" (fpscr));
+ __asm__ volatile ("sts fpscr, %0" : "=r" (fpscr));
omask = (fpscr >> _MASK_SHIFT) & FE_ALL_EXCEPT;
fpscr &= ~(mask << _MASK_SHIFT);
__fpscr_values[1] &= ~(mask << _MASK_SHIFT);
/* Load the floating-point status and control register */
- __asm__ __volatile__ ("lds %0, fpscr" : : "r" (fpscr));
+ __asm__ volatile ("lds %0, fpscr" : : "r" (fpscr));
return (omask);
}
unsigned int fpscr;
/* Store the current floating-point status and control register */
- __asm__ __volatile__ ("sts fpscr, %0" : "=r" (fpscr));
+ __asm__ volatile ("sts fpscr, %0" : "=r" (fpscr));
return ((fpscr >> _MASK_SHIFT) & FE_ALL_EXCEPT);
}
-/* $OpenBSD: s_fabsf.c,v 1.1 2009/04/05 19:26:27 martynas Exp $ */
+/* $OpenBSD: s_fabsf.c,v 1.2 2014/04/18 15:09:52 guenther Exp $ */
/*
* Written by Martynas Venckus. Public domain
fabsf(float f)
{
/* Same operation is performed regardless of precision. */
- __asm__ __volatile__ ("fabs %0" : "+f" (f));
+ __asm__ volatile ("fabs %0" : "+f" (f));
return (f);
}
-/* $OpenBSD: fenv.c,v 1.3 2012/12/05 23:20:03 deraadt Exp $ */
+/* $OpenBSD: fenv.c,v 1.4 2014/04/18 15:09:52 guenther Exp $ */
/* $NetBSD: fenv.c,v 1.1 2011/01/31 00:19:33 christos Exp $ */
/*-
excepts &= FE_ALL_EXCEPT;
/* Save floating-point state register */
- __asm__ __volatile__ ("st %%fsr, %0" : "=m" (r));
+ __asm__ volatile ("st %%fsr, %0" : "=m" (r));
r &= ~excepts;
/* Load floating-point state register */
- __asm__ __volatile__ ("ld %0, %%fsr" : : "m" (r));
+ __asm__ volatile ("ld %0, %%fsr" : : "m" (r));
return 0;
}
excepts &= FE_ALL_EXCEPT;
/* Save floating-point state register */
- __asm__ __volatile__ ("st %%fsr, %0" : "=m" (r));
+ __asm__ volatile ("st %%fsr, %0" : "=m" (r));
*flagp = r & excepts;
excepts &= FE_ALL_EXCEPT;
/* Save floating-point state register */
- __asm__ __volatile__ ("st %%fsr, %0" : "=m" (r));
+ __asm__ volatile ("st %%fsr, %0" : "=m" (r));
r &= ~excepts;
r |= *flagp & excepts;
/* Load floating-point state register */
- __asm__ __volatile__ ("ld %0, %%fsr" : : "m" (r));
+ __asm__ volatile ("ld %0, %%fsr" : : "m" (r));
return 0;
}
excepts &= FE_ALL_EXCEPT;
/* Save floating-point state register */
- __asm__ __volatile__ ("st %%fsr, %0" : "=m" (r));
+ __asm__ volatile ("st %%fsr, %0" : "=m" (r));
return r & excepts;
}
fenv_t r;
/* Save floating-point state register */
- __asm__ __volatile__ ("st %%fsr, %0" : "=m" (r));
+ __asm__ volatile ("st %%fsr, %0" : "=m" (r));
return (r >> _ROUND_SHIFT) & _ROUND_MASK;
}
return -1;
/* Save floating-point state register */
- __asm__ __volatile__ ("st %%fsr, %0" : "=m" (r));
+ __asm__ volatile ("st %%fsr, %0" : "=m" (r));
r &= ~(_ROUND_MASK << _ROUND_SHIFT);
r |= round << _ROUND_SHIFT;
/* Load floating-point state register */
- __asm__ __volatile__ ("ld %0, %%fsr" : : "m" (r));
+ __asm__ volatile ("ld %0, %%fsr" : : "m" (r));
return 0;
}
fegetenv(fenv_t *envp)
{
/* Save floating-point state register */
- __asm__ __volatile__ ("st %%fsr, %0" : "=m" (*envp));
+ __asm__ volatile ("st %%fsr, %0" : "=m" (*envp));
return 0;
}
fenv_t r;
/* Save floating-point state register */
- __asm__ __volatile__ ("st %%fsr, %0" : "=m" (r));
+ __asm__ volatile ("st %%fsr, %0" : "=m" (r));
*envp = r;
r &= ~(FE_ALL_EXCEPT | (FE_ALL_EXCEPT << _MASK_SHIFT));
/* Load floating-point state register */
- __asm__ __volatile__ ("ld %0, %%fsr" : : "m" (r));
+ __asm__ volatile ("ld %0, %%fsr" : : "m" (r));
return 0;
}
fesetenv(const fenv_t *envp)
{
/* Load floating-point state register */
- __asm__ __volatile__ ("ld %0, %%fsr" : : "m" (*envp));
+ __asm__ volatile ("ld %0, %%fsr" : : "m" (*envp));
return 0;
}
fexcept_t r;
/* Save floating-point state register */
- __asm__ __volatile__ ("st %%fsr, %0" : "=m" (r));
+ __asm__ volatile ("st %%fsr, %0" : "=m" (r));
/* Load floating-point state register */
- __asm__ __volatile__ ("ld %0, %%fsr" : : "m" (*envp));
+ __asm__ volatile ("ld %0, %%fsr" : : "m" (*envp));
feraiseexcept(r & FE_ALL_EXCEPT);
mask &= FE_ALL_EXCEPT;
/* Save floating-point state register */
- __asm__ __volatile__ ("st %%fsr, %0" : "=m" (old_r));
+ __asm__ volatile ("st %%fsr, %0" : "=m" (old_r));
new_r = old_r | (mask << _MASK_SHIFT);
/* Load floating-point state register */
- __asm__ __volatile__ ("ld %0, %%fsr" : : "m" (new_r));
+ __asm__ volatile ("ld %0, %%fsr" : : "m" (new_r));
return (old_r >> _MASK_SHIFT) & FE_ALL_EXCEPT;
}
mask &= FE_ALL_EXCEPT;
/* Save floating-point state register */
- __asm__ __volatile__ ("st %%fsr, %0" : "=m" (old_r));
+ __asm__ volatile ("st %%fsr, %0" : "=m" (old_r));
new_r = old_r & ~(mask << _MASK_SHIFT);
/* Load floating-point state register */
- __asm__ __volatile__ ("ld %0, %%fsr" : : "m" (new_r));
+ __asm__ volatile ("ld %0, %%fsr" : : "m" (new_r));
return (old_r >> _MASK_SHIFT) & FE_ALL_EXCEPT;
}
fenv_t r;
/* Save floating-point state register */
- __asm__ __volatile__ ("st %%fsr, %0" : "=m" (r));
+ __asm__ volatile ("st %%fsr, %0" : "=m" (r));
return (r & (FE_ALL_EXCEPT << _MASK_SHIFT)) >> _MASK_SHIFT;
}
-/* $OpenBSD: fenv.c,v 1.4 2012/12/05 23:20:03 deraadt Exp $ */
+/* $OpenBSD: fenv.c,v 1.5 2014/04/18 15:09:52 guenther Exp $ */
/* $NetBSD: fenv.c,v 1.1 2011/01/31 00:19:33 christos Exp $ */
/*-
excepts &= FE_ALL_EXCEPT;
/* Save floating-point state register */
- __asm__ __volatile__ ("stx %%fsr, %0" : "=m" (r));
+ __asm__ volatile ("stx %%fsr, %0" : "=m" (r));
r &= ~excepts;
/* Load floating-point state register */
- __asm__ __volatile__ ("ldx %0, %%fsr" : : "m" (r));
+ __asm__ volatile ("ldx %0, %%fsr" : : "m" (r));
return 0;
}
excepts &= FE_ALL_EXCEPT;
/* Save floating-point state register */
- __asm__ __volatile__ ("stx %%fsr, %0" : "=m" (r));
+ __asm__ volatile ("stx %%fsr, %0" : "=m" (r));
*flagp = r & excepts;
excepts &= FE_ALL_EXCEPT;
/* Save floating-point state register */
- __asm__ __volatile__ ("stx %%fsr, %0" : "=m" (r));
+ __asm__ volatile ("stx %%fsr, %0" : "=m" (r));
r &= ~excepts;
r |= *flagp & excepts;
/* Load floating-point state register */
- __asm__ __volatile__ ("ldx %0, %%fsr" : : "m" (r));
+ __asm__ volatile ("ldx %0, %%fsr" : : "m" (r));
return 0;
}
excepts &= FE_ALL_EXCEPT;
/* Save floating-point state register */
- __asm__ __volatile__ ("stx %%fsr, %0" : "=m" (r));
+ __asm__ volatile ("stx %%fsr, %0" : "=m" (r));
return r & excepts;
}
fenv_t r;
/* Save floating-point state register */
- __asm__ __volatile__ ("stx %%fsr, %0" : "=m" (r));
+ __asm__ volatile ("stx %%fsr, %0" : "=m" (r));
return (r >> _ROUND_SHIFT) & _ROUND_MASK;
}
return -1;
/* Save floating-point state register */
- __asm__ __volatile__ ("stx %%fsr, %0" : "=m" (r));
+ __asm__ volatile ("stx %%fsr, %0" : "=m" (r));
r &= ~(_ROUND_MASK << _ROUND_SHIFT);
r |= round << _ROUND_SHIFT;
/* Load floating-point state register */
- __asm__ __volatile__ ("ldx %0, %%fsr" : : "m" (r));
+ __asm__ volatile ("ldx %0, %%fsr" : : "m" (r));
return 0;
}
fegetenv(fenv_t *envp)
{
/* Save floating-point state register */
- __asm__ __volatile__ ("stx %%fsr, %0" : "=m" (*envp));
+ __asm__ volatile ("stx %%fsr, %0" : "=m" (*envp));
return 0;
}
fenv_t r;
/* Save floating-point state register */
- __asm__ __volatile__ ("stx %%fsr, %0" : "=m" (r));
+ __asm__ volatile ("stx %%fsr, %0" : "=m" (r));
*envp = r;
r &= ~(FE_ALL_EXCEPT | (FE_ALL_EXCEPT << _MASK_SHIFT));
/* Load floating-point state register */
- __asm__ __volatile__ ("ldx %0, %%fsr" : : "m" (r));
+ __asm__ volatile ("ldx %0, %%fsr" : : "m" (r));
return 0;
}
fesetenv(const fenv_t *envp)
{
/* Load floating-point state register */
- __asm__ __volatile__ ("ldx %0, %%fsr" : : "m" (*envp));
+ __asm__ volatile ("ldx %0, %%fsr" : : "m" (*envp));
return 0;
}
fexcept_t r;
/* Save floating-point state register */
- __asm__ __volatile__ ("stx %%fsr, %0" : "=m" (r));
+ __asm__ volatile ("stx %%fsr, %0" : "=m" (r));
/* Load floating-point state register */
- __asm__ __volatile__ ("ldx %0, %%fsr" : : "m" (*envp));
+ __asm__ volatile ("ldx %0, %%fsr" : : "m" (*envp));
feraiseexcept(r & FE_ALL_EXCEPT);
mask &= FE_ALL_EXCEPT;
/* Save floating-point state register */
- __asm__ __volatile__ ("stx %%fsr, %0" : "=m" (old_r));
+ __asm__ volatile ("stx %%fsr, %0" : "=m" (old_r));
new_r = old_r | (mask << _MASK_SHIFT);
/* Load floating-point state register */
- __asm__ __volatile__ ("ldx %0, %%fsr" : : "m" (new_r));
+ __asm__ volatile ("ldx %0, %%fsr" : : "m" (new_r));
return (old_r >> _MASK_SHIFT) & FE_ALL_EXCEPT;
}
mask &= FE_ALL_EXCEPT;
/* Save floating-point state register */
- __asm__ __volatile__ ("stx %%fsr, %0" : "=m" (old_r));
+ __asm__ volatile ("stx %%fsr, %0" : "=m" (old_r));
new_r = old_r & ~(mask << _MASK_SHIFT);
/* Load floating-point state register */
- __asm__ __volatile__ ("ldx %0, %%fsr" : : "m" (new_r));
+ __asm__ volatile ("ldx %0, %%fsr" : : "m" (new_r));
return (old_r >> _MASK_SHIFT) & FE_ALL_EXCEPT;
}
fenv_t r;
/* Save floating-point state register */
- __asm__ __volatile__ ("stx %%fsr, %0" : "=m" (r));
+ __asm__ volatile ("stx %%fsr, %0" : "=m" (r));
return (r & (FE_ALL_EXCEPT << _MASK_SHIFT)) >> _MASK_SHIFT;
}
-/* $OpenBSD: _atomic_lock.c,v 1.4 2013/06/01 20:47:40 tedu Exp $ */
+/* $OpenBSD: _atomic_lock.c,v 1.5 2014/04/18 15:09:52 guenther Exp $ */
/*
* Copyright (c) 2003, Miodrag Vallat.
_atomic_lock_t old;
old = _ATOMIC_LOCK_LOCKED;
- __asm__ __volatile__
+ __asm__ volatile
("xmem %0, %2, %%r0" : "=r" (old) : "0" (old), "r" (lock));
return (old != _ATOMIC_LOCK_UNLOCKED);
-/* $OpenBSD: _atomic_lock.c,v 1.7 2013/06/03 16:19:45 miod Exp $ */
+/* $OpenBSD: _atomic_lock.c,v 1.8 2014/04/18 15:09:52 guenther Exp $ */
/*
* Atomic lock for mips
{
_atomic_lock_t old;
- __asm__ __volatile__ (
+ __asm__ volatile (
".set noreorder\n"
"1: ll %0, 0(%1)\n"
" sc %2, 0(%1)\n"
projects / openbsd / commitdiff