intc0 at cpu0
# NS16550 compatible serial ports
-com* at mainbus0 early 1
+com* at fdt?
-virtio* at mainbus0
+virtio* at fdt?
vio* at virtio? # Network
vioblk* at virtio?
vioscsi* at virtio? # Disk (SCSI)
viornd* at virtio? # Random Source
# simplebus0
-simplebus* at mainbus0 early 1
+simplebus* at fdt?
# Platform Level Interrupt Controller
-plic* at simplebus? early 1
+plic* at fdt? early 1
syscon* at fdt? early 1
gfrtc* at fdt?
-# $OpenBSD: RAMDISK,v 1.4 2021/04/24 05:14:45 jsg Exp $
+# $OpenBSD: RAMDISK,v 1.5 2021/04/25 02:48:00 jsg Exp $
#
# GENERIC machine description file
#
intc0 at cpu0
# NS16550 compatible serial ports
-com* at mainbus0 early 1
+com* at fdt?
-virtio* at mainbus0
+virtio* at fdt?
vio* at virtio? # Network
vioblk* at virtio?
vioscsi* at virtio? # Disk (SCSI)
viornd* at virtio? # Random Source
# simplebus0
-simplebus* at mainbus0 early 1
+simplebus* at fdt?
# Platform Level Interrupt Controller
-plic* at simplebus? early 1
+plic* at fdt? early 1
syscon* at fdt? early 1
gfrtc* at fdt?
#
# mainbus
#
-define mainbus {[early = 0]}
+define mainbus {}
device mainbus: fdt
attach mainbus at root
-file arch/riscv64/dev/mainbus.c
+file arch/riscv64/dev/mainbus.c mainbus
#
# cpu
define cpu {}
device cpu
attach cpu at mainbus
-file arch/riscv64/riscv64/cpu.c
+file arch/riscv64/riscv64/cpu.c cpu
#
# timer
#
device timer
attach timer at cpu
-file arch/riscv64/dev/timer.c
+file arch/riscv64/dev/timer.c timer
#
# HART-specific interrupt controller
#
device intc
attach intc at cpu
-file arch/riscv64/dev/riscv_cpu_intc.c
+file arch/riscv64/dev/riscv_cpu_intc.c intc
#
# simplebus
#
-define simplebus {[early = 1]}
-device simplebus
-attach simplebus at mainbus
-file arch/riscv64/dev/simplebus.c
+device simplebus: fdt
+attach simplebus at fdt
+file arch/riscv64/dev/simplebus.c simplebus
# PLIC
device plic
-attach plic at simplebus
-file arch/riscv64/dev/plic.c
+attach plic at fdt
+file arch/riscv64/dev/plic.c plic
# Paravirtual device bus and virtio