Revert slow mode change so that we always use it for legacy and high speed
authorpatrick <patrick@openbsd.org>
Mon, 5 Apr 2021 09:31:45 +0000 (09:31 +0000)
committerpatrick <patrick@openbsd.org>
Mon, 5 Apr 2021 09:31:45 +0000 (09:31 +0000)
timings, and if the device tree tells us to.  While the change was done to
reduce diff, it introduced a regression on some devices, hence this revert.

Reported and tested by dtucker@
Tested by kettenis@ and myself

sys/dev/fdt/sdhc_fdt.c

index 56bf15c..f085c03 100644 (file)
@@ -1,4 +1,4 @@
-/*     $OpenBSD: sdhc_fdt.c,v 1.14 2021/02/22 18:55:23 patrick Exp $   */
+/*     $OpenBSD: sdhc_fdt.c,v 1.15 2021/04/05 09:31:45 patrick Exp $   */
 /*
  * Copyright (c) 2017 Mark Kettenis
  *
@@ -430,8 +430,8 @@ phy_init:
            XENON_EMMC_PHY_TIMING_ADJUST);
        reg |= XENON_EMMC_PHY_TIMING_ADJUST_SAMPL_INV_QSP_PHASE_SELECT;
        reg &= ~XENON_EMMC_PHY_TIMING_ADJUST_SLOW_MODE;
-       if ((timing == SDMMC_TIMING_LEGACY ||
-           timing == SDMMC_TIMING_HIGHSPEED) && sc->sc_slow_mode)
+       if (timing == SDMMC_TIMING_LEGACY ||
+           timing == SDMMC_TIMING_HIGHSPEED || sc->sc_slow_mode)
                reg |= XENON_EMMC_PHY_TIMING_ADJUST_SLOW_MODE;
        bus_space_write_4(sc->sc_iot, sc->sc_ioh,
            XENON_EMMC_PHY_TIMING_ADJUST, reg);