reduce the delays used in the mii/mdio bus ops

this produces a significant speed up.

say you're reading 40ish mib counters off a port on switch chip,
where each counter read relies on multiple mdio operations. it took
well over a second to read the counters off a port in my my initial
version. after optimising the switch reads i got that down to a bit
under a second. after this change in dwqe i can read counters off
5 ports in about 0.03 seconds.

ok patrick@

diff --git a/sys/dev/ic/dwqe.c b/sys/dev/ic/dwqe.c
index 9c96533..6479ff2 100644 (file)
--- a/sys/dev/ic/dwqe.c
+++ b/sys/dev/ic/dwqe.c
@@ -1,4 +1,4 @@
-/*     $OpenBSD: dwqe.c,v 1.5 2023/04/22 05:01:44 dlg Exp $    */
+/*     $OpenBSD: dwqe.c,v 1.6 2023/04/22 06:36:35 dlg Exp $    */
 /*
  * Copyright (c) 2008, 2019 Mark Kettenis <kettenis@openbsd.org>
  * Copyright (c) 2017, 2022 Patrick Wildt <patrick@blueri.se>
@@ -437,12 +437,11 @@ dwqe_mii_readreg(struct device *self, int phy, int reg)
            (reg << GMAC_MAC_MDIO_ADDR_RDA_SHIFT) |
            GMAC_MAC_MDIO_ADDR_GOC_READ |
            GMAC_MAC_MDIO_ADDR_GB);
-       delay(10000);
 
-       for (n = 0; n < 1000; n++) {
+       for (n = 0; n < 2000; n++) {
+               delay(10);
                if ((dwqe_read(sc, GMAC_MAC_MDIO_ADDR) & GMAC_MAC_MDIO_ADDR_GB) == 0)
                        return dwqe_read(sc, GMAC_MAC_MDIO_DATA);
-               delay(10);
        }
 
        printf("%s: mii_read timeout\n", sc->sc_dev.dv_xname);
@@ -462,11 +461,11 @@ dwqe_mii_writereg(struct device *self, int phy, int reg, int val)
            (reg << GMAC_MAC_MDIO_ADDR_RDA_SHIFT) |
            GMAC_MAC_MDIO_ADDR_GOC_WRITE |
            GMAC_MAC_MDIO_ADDR_GB);
-       delay(10000);
-       for (n = 0; n < 1000; n++) {
+
+       for (n = 0; n < 2000; n++) {
+               delay(10);
                if ((dwqe_read(sc, GMAC_MAC_MDIO_ADDR) & GMAC_MAC_MDIO_ADDR_GB) == 0)
                        return;
-               delay(10);
        }
 
        printf("%s: mii_write timeout\n", sc->sc_dev.dv_xname);