drm/i915/mtl: Update workaround 14016712196

From Tejas Upadhyay
338db8193cb2dd93544ac445a7b4b4a7f77094ad in linux-6.6.y/6.6.26
7467e1da906468bcbd311023b30708193103ecf9 in mainline linux

diff --git a/sys/dev/pci/drm/i915/gt/gen8_engine_cs.c b/sys/dev/pci/drm/i915/gt/gen8_engine_cs.c
index 3ac3e12..ba4c242 100644 (file)
--- a/sys/dev/pci/drm/i915/gt/gen8_engine_cs.c
+++ b/sys/dev/pci/drm/i915/gt/gen8_engine_cs.c
@@ -226,8 +226,8 @@ u32 *gen12_emit_aux_table_inv(struct intel_engine_cs *engine, u32 *cs)
 static int mtl_dummy_pipe_control(struct i915_request *rq)
 {
        /* Wa_14016712196 */
-       if (IS_GFX_GT_IP_STEP(rq->engine->gt, IP_VER(12, 70), STEP_A0, STEP_B0) ||
-           IS_GFX_GT_IP_STEP(rq->engine->gt, IP_VER(12, 71), STEP_A0, STEP_B0)) {
+       if (IS_GFX_GT_IP_RANGE(rq->engine->gt, IP_VER(12, 70), IP_VER(12, 71)) ||
+           IS_DG2(rq->i915)) {
                u32 *cs;
 
                /* dummy PIPE_CONTROL + depth flush */
@@ -819,8 +819,7 @@ u32 *gen12_emit_fini_breadcrumb_rcs(struct i915_request *rq, u32 *cs)
                     PIPE_CONTROL_FLUSH_ENABLE);
 
        /* Wa_14016712196 */
-       if (IS_GFX_GT_IP_STEP(gt, IP_VER(12, 70), STEP_A0, STEP_B0) ||
-           IS_GFX_GT_IP_STEP(gt, IP_VER(12, 71), STEP_A0, STEP_B0))
+       if (IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 70), IP_VER(12, 71)) || IS_DG2(i915))
                /* dummy PIPE_CONTROL + depth flush */
                cs = gen12_emit_pipe_control(cs, 0,
                                             PIPE_CONTROL_DEPTH_CACHE_FLUSH, 0);