-/* $OpenBSD: qla.c,v 1.55 2017/01/24 02:28:17 visa Exp $ */
+/* $OpenBSD: qla.c,v 1.56 2017/06/05 04:57:37 dlg Exp $ */
/*
* Copyright (c) 2011 David Gwynne <dlg@openbsd.org>
void qla_put_cmd(struct qla_softc *, void *, struct scsi_xfer *,
struct qla_ccb *);
struct qla_ccb *qla_handle_resp(struct qla_softc *, u_int16_t);
-void qla_put_data_seg(struct qla_iocb_seg *, bus_dmamap_t, int);
int qla_get_port_name_list(struct qla_softc *, u_int32_t);
struct qla_fc_port *qla_next_fabric_port(struct qla_softc *, u_int32_t *,
int (*loadfirmware)(struct qla_softc *) = NULL;
#endif
u_int16_t firmware_addr = 0;
+ u_int64_t dva;
int i, rv;
TAILQ_INIT(&sc->sc_ports);
memset(icb, 0, sizeof(*icb));
icb->icb_version = QLA_ICB_VERSION;
/* port and node names are big-endian in the icb */
- icb->icb_portname = htobe64(sc->sc_port_name);
- icb->icb_nodename = htobe64(sc->sc_node_name);
+ htobem32(&icb->icb_portname_hi, sc->sc_port_name >> 32);
+ htobem32(&icb->icb_portname_lo, sc->sc_port_name);
+ htobem32(&icb->icb_nodename_hi, sc->sc_node_name >> 32);
+ htobem32(&icb->icb_nodename_lo, sc->sc_node_name);
if (sc->sc_nvram_valid) {
icb->icb_fw_options = sc->sc_nvram.fw_options;
icb->icb_max_frame_len = sc->sc_nvram.frame_payload_size;
icb->icb_req_out = 0;
icb->icb_resp_in = 0;
- icb->icb_req_queue_len = htole16(sc->sc_maxcmds);
- icb->icb_resp_queue_len = htole16(sc->sc_maxcmds);
- icb->icb_req_queue_addr = htole64(QLA_DMA_DVA(sc->sc_requests));
- icb->icb_resp_queue_addr = htole64(QLA_DMA_DVA(sc->sc_responses));
+ htolem16(&icb->icb_req_queue_len, sc->sc_maxcmds);
+ htolem16(&icb->icb_resp_queue_len, sc->sc_maxcmds);
+ dva = QLA_DMA_DVA(sc->sc_requests);
+ htolem32(&icb->icb_req_queue_addr_lo, dva);
+ htolem32(&icb->icb_req_queue_addr_hi, dva >> 32);
+ dva = QLA_DMA_DVA(sc->sc_responses);
+ htolem32(&icb->icb_resp_queue_addr_lo, dva);
+ htolem32(&icb->icb_resp_queue_addr_hi, dva >> 32);
/* adjust firmware options a bit */
icb->icb_fw_options |= htole16(QLA_ICB_FW_EXTENDED_INIT_CB);
qla_sns_req(struct qla_softc *sc, struct qla_dmamem *mem, int reqsize)
{
struct qla_sns_req_hdr *header;
+ uint64_t dva;
int rv;
memset(&sc->sc_mbox, 0, sizeof(sc->sc_mbox));
qla_mbox_putaddr(sc->sc_mbox, mem);
header = QLA_DMA_KVA(mem);
- header->resp_len = htole16((QLA_DMA_LEN(mem) - reqsize) / 2);
- header->resp_addr = htole64(QLA_DMA_DVA(mem) + reqsize);
+ htolem16(&header->resp_len, (QLA_DMA_LEN(mem) - reqsize) / 2);
+ dva = QLA_DMA_DVA(mem) + reqsize;
+ htolem32(&header->resp_addr_lo, dva);
+ htolem32(&header->resp_addr_hi, dva >> 32);
header->subcmd_len = htole16((reqsize - sizeof(*header)) / 2);
bus_dmamap_sync(sc->sc_dmat, QLA_DMA_MAP(mem), 0, QLA_DMA_LEN(mem),
qla_dump_iocb(sc, buf);
}
-void
+static inline void
qla_put_data_seg(struct qla_iocb_seg *seg, bus_dmamap_t dmap, int num)
{
uint64_t addr = dmap->dm_segs[num].ds_addr;
} else {
dir = xs->flags & SCSI_DATA_IN ? QLA_IOCB_CMD_READ_DATA :
QLA_IOCB_CMD_WRITE_DATA;
- req->req_seg_count = htole16(ccb->ccb_dmamap->dm_nsegs);
+ htolem16(&req->req_seg_count, ccb->ccb_dmamap->dm_nsegs);
if (ccb->ccb_dmamap->dm_nsegs > QLA_IOCB_SEGS_PER_CMD) {
req->entry_type = QLA_IOCB_CMD_TYPE_4;
for (seg = 0; seg < ccb->ccb_dmamap->dm_nsegs; seg++) {
}
req->req_type.req4.req4_seg_type = htole16(1);
req->req_type.req4.req4_seg_base = 0;
- req->req_type.req4.req4_seg_addr =
- htole64(QLA_DMA_DVA(sc->sc_segments) +
- ccb->ccb_seg_offset);
+ req->req_type.req4.req4_seg_addr = ccb->ccb_seg_dva;
memset(req->req_type.req4.req4_reserved, 0,
sizeof(req->req_type.req4.req4_reserved));
bus_dmamap_sync(sc->sc_dmat,
}
/* isp(4) uses head of queue for 'request sense' commands */
- req->req_flags = htole16(QLA_IOCB_CMD_SIMPLE_QUEUE | dir);
+ htolem16(&req->req_flags, QLA_IOCB_CMD_SIMPLE_QUEUE | dir);
/*
* timeout is in seconds. make sure it's at least 1 if a timeout
* was specified in xs
*/
if (xs->timeout != 0)
- req->req_time = htole16(MAX(1, xs->timeout/1000));
+ htolem16(&req->req_time, MAX(1, xs->timeout/1000));
/* lun and target layout vary with firmware attributes */
if (sc->sc_expanded_lun) {
ccb->ccb_seg_offset = i * QLA_MAX_SEGS *
sizeof(struct qla_iocb_seg);
+ htolem64(&ccb->ccb_seg_dva,
+ QLA_DMA_DVA(sc->sc_segments) + ccb->ccb_seg_offset);
ccb->ccb_t4segs = QLA_DMA_KVA(sc->sc_segments) +
ccb->ccb_seg_offset;
-/* $OpenBSD: qlareg.h,v 1.8 2016/05/10 11:16:18 dlg Exp $ */
+/* $OpenBSD: qlareg.h,v 1.9 2017/06/05 04:57:37 dlg Exp $ */
/*
* Copyright (c) 2013, 2014 Jonathan Matthew <jmatthew@openbsd.org>
u_int16_t icb_exec_throttle;
u_int8_t icb_retry_count;
u_int8_t icb_retry_delay;
- u_int64_t icb_portname;
+ u_int32_t icb_portname_hi;
+ u_int32_t icb_portname_lo;
u_int16_t icb_hardaddr;
u_int8_t icb_inquiry_data;
u_int8_t icb_login_timeout;
- u_int64_t icb_nodename;
+ u_int32_t icb_nodename_hi;
+ u_int32_t icb_nodename_lo;
u_int16_t icb_req_out;
u_int16_t icb_resp_in;
u_int16_t icb_req_queue_len;
u_int16_t icb_resp_queue_len;
- u_int64_t icb_req_queue_addr;
- u_int64_t icb_resp_queue_addr;
+ u_int32_t icb_req_queue_addr_lo;
+ u_int32_t icb_req_queue_addr_hi;
+ u_int32_t icb_resp_queue_addr_lo;
+ u_int32_t icb_resp_queue_addr_hi;
u_int16_t icb_lun_enables;
u_int8_t icb_cmd_count;
u_int8_t icb_notify_count;
u_int8_t icb_int_delaytimer;
u_int16_t icb_zfwoptions;
u_int16_t icb_reserved4[13];
-} __packed;
+} __packed __aligned(4);
#define QLA_FW_OPTION1_ASYNC_LIP_F8 0x0001
#define QLA_FW_OPTION1_ASYNC_LIP_RESET 0x0002
struct qla_sns_req_hdr {
u_int16_t resp_len;
u_int16_t reserved;
- u_int64_t resp_addr;
+ u_int32_t resp_addr_lo;
+ u_int32_t resp_addr_hi;
u_int16_t subcmd_len;
u_int16_t reserved2;
} __packed;
u_int32_t req4_seg_base;
u_int64_t req4_seg_addr;
u_int8_t req4_reserved[10];
- } __packed req4;
+ } __packed __aligned(4) req4;
} req_type;
-} __packed;
+} __packed __aligned(4);