drm/amd/pm: fulfill swsmu peak profiling mode shader/memory clock settings

From Evan Quan
2368afd60f647889d90fa4a42c7b27548f77dbd9 in linux-6.1.y/6.1.46
975b4b1d90ccf83da252907108f4090fb61b816e in mainline linux

diff --git a/sys/dev/pci/drm/amd/include/kgd_pp_interface.h b/sys/dev/pci/drm/amd/include/kgd_pp_interface.h
index d18162e..f3d64c7 100644 (file)
--- a/sys/dev/pci/drm/amd/include/kgd_pp_interface.h
+++ b/sys/dev/pci/drm/amd/include/kgd_pp_interface.h
@@ -139,6 +139,8 @@ enum amd_pp_sensors {
        AMDGPU_PP_SENSOR_MIN_FAN_RPM,
        AMDGPU_PP_SENSOR_MAX_FAN_RPM,
        AMDGPU_PP_SENSOR_VCN_POWER_STATE,
+       AMDGPU_PP_SENSOR_PEAK_PSTATE_SCLK,
+       AMDGPU_PP_SENSOR_PEAK_PSTATE_MCLK,
 };
 
 enum amd_pp_task {

diff --git a/sys/dev/pci/drm/amd/pm/swsmu/amdgpu_smu.c b/sys/dev/pci/drm/amd/pm/swsmu/amdgpu_smu.c
index 65cad00..7a7d3a5 100644 (file)
--- a/sys/dev/pci/drm/amd/pm/swsmu/amdgpu_smu.c
+++ b/sys/dev/pci/drm/amd/pm/swsmu/amdgpu_smu.c
@@ -2520,6 +2520,14 @@ static int smu_read_sensor(void *handle,
                *((uint32_t *)data) = pstate_table->uclk_pstate.standard * 100;
                *size = 4;
                break;
+       case AMDGPU_PP_SENSOR_PEAK_PSTATE_SCLK:
+               *((uint32_t *)data) = pstate_table->gfxclk_pstate.peak * 100;
+               *size = 4;
+               break;
+       case AMDGPU_PP_SENSOR_PEAK_PSTATE_MCLK:
+               *((uint32_t *)data) = pstate_table->uclk_pstate.peak * 100;
+               *size = 4;
+               break;
        case AMDGPU_PP_SENSOR_ENABLED_SMC_FEATURES_MASK:
                ret = smu_feature_get_enabled_mask(smu, (uint64_t *)data);
                *size = 8;