A couple of minor changes for rtl8192eu:

- enable Tx/Rx aggregations of individual 802.11 frames on the USB bus
- in urtwn_fw_loadpage(), the maximum block size is 254 bytes rather than
  196 bytes
- clear the interrupt status register
- no need to disable BAR for USB devices and set NAV limit

ok stsp@, jmatthew@

diff --git a/sys/dev/ic/r92creg.h b/sys/dev/ic/r92creg.h
index 7804190..24de14a 100644 (file)
--- a/sys/dev/ic/r92creg.h
+++ b/sys/dev/ic/r92creg.h
@@ -1,4 +1,4 @@
-/*     $OpenBSD: r92creg.h,v 1.27 2022/08/13 14:16:59 kevlo Exp $      */
+/*     $OpenBSD: r92creg.h,v 1.28 2022/08/21 07:56:31 kevlo Exp $      */
 
 /*-
  * Copyright (c) 2010 Damien Bergamini <damien.bergamini@free.fr>
@@ -352,6 +352,10 @@
 /* Bits for R88E_XCK_OUT_CTRL. */
 #define R88E_XCK_OUT_CTRL_EN           1
 
+/* Bits for R92C_AFE_CTRL3. */
+#define R92C_AFE_CTRL3_ADDR_M  0x00fff000
+#define R92C_AFE_CTRL3_ADDR_S  12
+
 /* Bits for R92C_EFUSE_CTRL. */
 #define R92C_EFUSE_CTRL_DATA_M 0x000000ff
 #define R92C_EFUSE_CTRL_DATA_S 0

diff --git a/sys/dev/ic/rtwn.c b/sys/dev/ic/rtwn.c
index 9bd35c9..2d7551e 100644 (file)
--- a/sys/dev/ic/rtwn.c
+++ b/sys/dev/ic/rtwn.c
@@ -1,4 +1,4 @@
-/*     $OpenBSD: rtwn.c,v 1.52 2022/01/09 05:42:39 jsg Exp $   */
+/*     $OpenBSD: rtwn.c,v 1.53 2022/08/21 07:56:31 kevlo Exp $ */
 
 /*-
  * Copyright (c) 2010 Damien Bergamini <damien.bergamini@free.fr>
@@ -212,12 +212,9 @@ rtwn_attach(struct device *pdev, struct rtwn_softc *sc)
        }
 
        /* Determine number of Tx/Rx chains. */
-       if (sc->chip & RTWN_CHIP_92C) {
+       if (sc->chip & (RTWN_CHIP_92C | RTWN_CHIP_92E)) {
                sc->ntxchains = (sc->chip & RTWN_CHIP_92C_1T2R) ? 1 : 2;
                sc->nrxchains = 2;
-       } else if (sc->chip & RTWN_CHIP_92E) {
-               sc->ntxchains = 2;
-               sc->nrxchains = 2;
        } else {
                sc->ntxchains = 1;
                sc->nrxchains = 1;
@@ -1761,7 +1758,10 @@ rtwn_load_firmware(struct rtwn_softc *sc)
        /* Disable FW download. */
        rtwn_write_1(sc, R92C_MCUFWDL,
            rtwn_read_1(sc, R92C_MCUFWDL) & ~R92C_MCUFWDL_EN);
-       rtwn_write_1(sc, R92C_MCUFWDL + 1, 0);
+
+       /* Reserved for fw extension. */
+       if (!(sc->chip & RTWN_CHIP_92E))
+               rtwn_write_1(sc, R92C_MCUFWDL + 1, 0);
 
        reg = rtwn_read_4(sc, R92C_MCUFWDL);
        reg = (reg & ~R92C_MCUFWDL_WINTINI_RDY) | R92C_MCUFWDL_RDY;
@@ -2332,13 +2332,10 @@ rtwn_set_chan(struct rtwn_softc *sc, struct ieee80211_channel *c,
        rtwn_set_txpower(sc, c, extc);
 
        if (extc != NULL) {
-               uint32_t reg;
-
                /* Is secondary channel below or above primary? */
                int prichlo = c->ic_freq < extc->ic_freq;
 
                if (sc->chip & RTWN_CHIP_92E) {
-                       uint16_t reg;
                        reg = rtwn_read_2(sc, R92C_WMAC_TRXPTCL_CTL);
                        reg &= ~R92C_WMAC_TRXPTCL_CTL_BW_MASK;
                        reg |= R92C_WMAC_TRXPTCL_CTL_BW_40;
@@ -2385,7 +2382,6 @@ rtwn_set_chan(struct rtwn_softc *sc, struct ieee80211_channel *c,
                }
        } else {
                if (sc->chip & RTWN_CHIP_92E) {
-                       uint16_t reg;
                        reg = rtwn_read_2(sc, R92C_WMAC_TRXPTCL_CTL);
                        reg &= ~R92C_WMAC_TRXPTCL_CTL_BW_MASK;
                        rtwn_write_2(sc, R92C_WMAC_TRXPTCL_CTL, reg);
@@ -2953,6 +2949,8 @@ void
 rtwn_enable_intr(struct rtwn_softc *sc)
 {
        if (sc->chip & RTWN_CHIP_92E) {
+               rtwn_write_4(sc, R88E_HISR, 0xffffffff);
+               rtwn_write_4(sc, R88E_HISRE, 0xffffffff);
                rtwn_write_4(sc, R88E_HIMR, 0);
                rtwn_write_4(sc, R88E_HIMRE, 0);
        } else if (sc->chip & RTWN_CHIP_88E) {
@@ -3166,9 +3164,6 @@ rtwn_init(struct ifnet *ifp)
        rtwn_write_1(sc, R92C_HWSEQ_CTRL, 0xff);
 
        if (sc->chip & RTWN_CHIP_92E) {
-               rtwn_write_4(sc, R92C_BAR_MODE_CTRL, 0x0201ffff);
-               rtwn_write_1(sc, R92C_NAV_UPPER, 0);
-
                rtwn_write_1(sc, R92C_QUEUE_CTRL,
                    rtwn_read_1(sc, R92C_QUEUE_CTRL) & ~0x08);
        }

diff --git a/sys/dev/usb/if_urtwn.c b/sys/dev/usb/if_urtwn.c
index 6f722e5..a615fde 100644 (file)
--- a/sys/dev/usb/if_urtwn.c
+++ b/sys/dev/usb/if_urtwn.c
@@ -1,4 +1,4 @@
-/*     $OpenBSD: if_urtwn.c,v 1.102 2022/08/13 14:16:59 kevlo Exp $    */
+/*     $OpenBSD: if_urtwn.c,v 1.103 2022/08/21 07:56:31 kevlo Exp $    */
 
 /*-
  * Copyright (c) 2010 Damien Bergamini <damien.bergamini@free.fr>
@@ -619,13 +619,16 @@ urtwn_close_pipes(struct urtwn_softc *sc)
        int i;
 
        /* Close Rx pipe. */
-       if (sc->rx_pipe != NULL)
+       if (sc->rx_pipe != NULL) {
                usbd_close_pipe(sc->rx_pipe);
+               sc->rx_pipe = NULL;
+       }
        /* Close Tx pipes. */
        for (i = 0; i < R92C_MAX_EPOUT; i++) {
                if (sc->tx_pipe[i] == NULL)
                        continue;
                usbd_close_pipe(sc->tx_pipe[i]);
+               sc->tx_pipe[i] = NULL;
        }
 }
 
@@ -2018,16 +2021,18 @@ urtwn_fw_loadpage(void *cookie, int page, uint8_t *buf, int len)
 {
        struct urtwn_softc *sc = cookie;
        uint32_t reg;
-       int off, mlen, error = 0;
+       int maxblksz, off, mlen, error = 0;
 
        reg = urtwn_read_4(sc, R92C_MCUFWDL);
        reg = RW(reg, R92C_MCUFWDL_PAGE, page);
        urtwn_write_4(sc, R92C_MCUFWDL, reg);
 
+       maxblksz = (sc->sc_sc.chip & RTWN_CHIP_92E) ? 254 : 196;
+
        off = R92C_FW_START_ADDR;
        while (len > 0) {
-               if (len > 196)
-                       mlen = 196;
+               if (len > maxblksz)
+                       mlen = maxblksz;
                else if (len > 4)
                        mlen = 4;
                else
@@ -2190,20 +2195,15 @@ urtwn_aggr_init(void *cookie)
        }
 
        /* Tx aggregation setting. */
-       if (sc->sc_sc.chip & RTWN_CHIP_92E) {
+       reg = urtwn_read_4(sc, R92C_TDECTRL);
+       reg = RW(reg, R92C_TDECTRL_BLK_DESC_NUM, ndesc);
+       urtwn_write_4(sc, R92C_TDECTRL, reg);
+       if (sc->sc_sc.chip & RTWN_CHIP_92E)
                urtwn_write_1(sc, R92E_DWBCN1_CTRL, ndesc << 1);
-       } else {
-               reg = urtwn_read_4(sc, R92C_TDECTRL);
-               reg = RW(reg, R92C_TDECTRL_BLK_DESC_NUM, ndesc);
-               urtwn_write_4(sc, R92C_TDECTRL, reg);
-       }
 
        /* Rx aggregation setting. */
-       if (!(sc->sc_sc.chip & RTWN_CHIP_92E)) {
-               urtwn_write_1(sc, R92C_TRXDMA_CTRL,
-                   urtwn_read_1(sc, R92C_TRXDMA_CTRL) |
-                   R92C_TRXDMA_CTRL_RXDMA_AGG_EN);
-       }
+       urtwn_write_1(sc, R92C_TRXDMA_CTRL,
+           urtwn_read_1(sc, R92C_TRXDMA_CTRL) | R92C_TRXDMA_CTRL_RXDMA_AGG_EN);
 
        urtwn_write_1(sc, R92C_RXDMA_AGG_PG_TH, dmasize);
        if (sc->sc_sc.chip & (RTWN_CHIP_92C | RTWN_CHIP_88C))
@@ -2361,11 +2361,9 @@ urtwn_bb_init(void *cookie)
                    RW(reg, R92C_AFE_XTAL_CTRL_ADDR, xtal | xtal << 6));
        } else if (sc->sc_sc.chip & RTWN_CHIP_92E) {
                xtal = sc->sc_sc.crystal_cap & 0x3f;
-               reg = urtwn_read_4(sc, R92C_AFE_CTRL3);
-               reg &= 0xff000fff;
-               reg |= (xtal | (xtal << 6)) << 12;
-               urtwn_write_4(sc, R92C_AFE_CTRL3, reg);
-
+               reg = urtwn_bb_read(sc, R92C_AFE_CTRL3);
+               urtwn_bb_write(sc, R92C_AFE_CTRL3,
+                   RW(reg, R92C_AFE_CTRL3_ADDR, xtal | xtal << 6));
                urtwn_write_4(sc, R92C_AFE_XTAL_CTRL, 0x000f81fb);
        }
 
@@ -2435,6 +2433,7 @@ urtwn_init(void *cookie)
        struct urtwn_softc *sc = cookie;
        int i, error;
 
+       /* Reset USB mode switch setting. */
        if (sc->sc_sc.chip & RTWN_CHIP_92E)
                urtwn_write_1(sc, R92C_ACLK_MON, 0);