drm/amd/display: Update clock table to include highest clock setting

From Swapnil Patel
b66804fc7e21587431360af1dbcc1d9145237b7a in linux-6.1.y/6.1.22
2d99a7ec25cf456cd3680eb314d6454138e5aa64 in mainline linux

diff --git a/sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn301/vg_clk_mgr.c b/sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn301/vg_clk_mgr.c
index 24715ca..01383aa 100644 (file)
--- a/sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn301/vg_clk_mgr.c
+++ b/sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn301/vg_clk_mgr.c
@@ -529,6 +529,19 @@ static struct clk_bw_params vg_bw_params = {
 
 };
 
+static uint32_t find_max_clk_value(const uint32_t clocks[], uint32_t num_clocks)
+{
+       uint32_t max = 0;
+       int i;
+
+       for (i = 0; i < num_clocks; ++i) {
+               if (clocks[i] > max)
+                       max = clocks[i];
+       }
+
+       return max;
+}
+
 static unsigned int find_dcfclk_for_voltage(const struct vg_dpm_clocks *clock_table,
                unsigned int voltage)
 {
@@ -572,12 +585,16 @@ static void vg_clk_mgr_helper_populate_bw_params(
 
        bw_params->clk_table.num_entries = j + 1;
 
-       for (i = 0; i < bw_params->clk_table.num_entries; i++, j--) {
+       for (i = 0; i < bw_params->clk_table.num_entries - 1; i++, j--) {
                bw_params->clk_table.entries[i].fclk_mhz = clock_table->DfPstateTable[j].fclk;
                bw_params->clk_table.entries[i].memclk_mhz = clock_table->DfPstateTable[j].memclk;
                bw_params->clk_table.entries[i].voltage = clock_table->DfPstateTable[j].voltage;
                bw_params->clk_table.entries[i].dcfclk_mhz = find_dcfclk_for_voltage(clock_table, clock_table->DfPstateTable[j].voltage);
        }
+       bw_params->clk_table.entries[i].fclk_mhz = clock_table->DfPstateTable[j].fclk;
+       bw_params->clk_table.entries[i].memclk_mhz = clock_table->DfPstateTable[j].memclk;
+       bw_params->clk_table.entries[i].voltage = clock_table->DfPstateTable[j].voltage;
+       bw_params->clk_table.entries[i].dcfclk_mhz = find_max_clk_value(clock_table->DcfClocks, VG_NUM_DCFCLK_DPM_LEVELS);
 
        bw_params->vram_type = bios_info->memory_type;
        bw_params->num_channels = bios_info->ma_channel_number;