-/* $NetBSD: cpu.h,v 1.12 1995/06/05 17:17:57 ragge Exp $ */
+/* $NetBSD: cpu.h,v 1.13 1995/12/13 18:57:57 ragge Exp $ */
/*
* Copyright (c) 1994 Ludd, University of Lule}, Sweden
#define cpu_swapout(p)
-extern volatile int cpunumber;
+extern int cpunumber, cpu_type;
extern struct cpu_dep cpu_calls[];
struct cpu_dep {
- int (*cpu_loinit)(); /* Locore init before everything else */
+ int (*cpu_steal_pages)(); /* Pmap init before mm is on */
int (*cpu_clock)(); /* CPU dependent clock handling */
int (*cpu_mchk)(); /* Machine check handling */
int (*cpu_memerr)(); /* Memory subsystem errors */
int (*cpu_conf)(); /* Autoconfiguration */
+/* int (*cpu_cmrerr)(); /* Memory parity errors */
};
struct clockframe {
--- /dev/null
+/* $NetBSD: ka650.h,v 1.1 1995/12/13 18:58:05 ragge Exp $ */
+/*
+ * Copyright (c) 1988 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to Berkeley by
+ * Mt. Xinu.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by the University of
+ * California, Berkeley and its contributors.
+ * 4. Neither the name of the University nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @(#)ka650.h 7.5 (Berkeley) 6/28/90
+ */
+
+/*
+ *
+ * Definitions specific to the ka650 (uVAX 3600/3602) cpu card.
+ */
+
+/*
+ * CAER: Memory System Error Register (IPR 39)
+ */
+#define CAER_DAL 0x00000040 /* CDAL or level 2 cache data parity */
+#define CAER_MCD 0x00000020 /* mcheck due to DAL parity error */
+#define CAER_MCC 0x00000010 /* mcheck due to 1st lev cache parity */
+#define CAER_DAT 0x00000002 /* data parity in 1st level cache */
+#define CAER_TAG 0x00000001 /* tag parity in 1st level cache */
+
+/*
+ * CADR: Cache Disable Register (IPR 37)
+ */
+#define CADR_STMASK 0x000000f0 /* 1st level cache state mask */
+#define CADR_SEN2 0x00000080 /* 1st level cache set 2 enabled */
+#define CADR_SEN1 0x00000040 /* 1st level cache set 1 enabled */
+#define CADR_CENI 0x00000020 /* 1st level I-stream caching enabled */
+#define CADR_CEND 0x00000010 /* 1st level D-stream caching enabled */
+
+/*
+ * Internal State Info 2: (for mcheck recovery)
+ */
+#define IS2_VCR 0x00008000 /* VAX Can't Restart flag */
+
+/*
+ * DMA System Error Register (merr_dser)
+ */
+#define DSER_QNXM 0x00000080 /* Q-22 Bus NXM */
+#define DSER_QPE 0x00000020 /* Q-22 Bus parity Error */
+#define DSER_MEM 0x00000010 /* Main mem err due to ext dev DMA */
+#define DSER_LOST 0x00000008 /* Lost error: DSER <7,5,4,0> set */
+#define DSER_NOGRANT 0x00000004 /* No Grant timeout on cpu demand R/W */
+#define DSER_DNXM 0x00000001 /* DMA NXM */
+#define DSER_CLEAR (DSER_QNXM | DSER_QPE | DSER_MEM | \
+ DSER_LOST | DSER_NOGRANT | DSER_DNXM)
+#define DMASER_BITS \
+"\20\20BHALT\17DCNEG\10QBNXM\6QBPE\5MEMERR\4LOSTERR\3NOGRANT\1DMANXM"
+
+#ifndef LOCORE
+/*
+ * Local registers (in I/O space)
+ * This is done in disjoint sections. Map names are set in locore.s
+ * and they are mapped in routine configcpu()
+ */
+
+/*
+ * memory error & configuration registers
+ */
+struct ka650_merr {
+ u_long merr_scr; /* System Config Register */
+ u_long merr_dser; /* DMA System Error Register */
+ u_long merr_qbear; /* QBus Error Address Register */
+ u_long merr_dear; /* DMA Error Address Register */
+ u_long merr_qbmbr; /* Q Bus Map Base address Register */
+ u_long pad[59];
+ u_long merr_csr[16]; /* Main Memory Config Regs (16 banks) */
+ u_long merr_errstat; /* Main Memory Error Status */
+ u_long merr_cont; /* Main Memory Control */
+};
+#define KA650_MERR 0x20080000
+
+/*
+ * Main Memory Error Status Register (merr_errstat)
+ */
+#define MEM_EMASK 0xe0000180 /* mask of all err bits */
+#define MEM_RDS 0x80000000 /* uncorrectable main memory */
+#define MEM_RDSHIGH 0x40000000 /* high rate RDS errors */
+#define MEM_CRD 0x20000000 /* correctable main memory */
+#define MEM_DMA 0x00000100 /* DMA read or write error */
+#define MEM_CDAL 0x00000080 /* CDAL Parity error on write */
+#define MEM_PAGE 0x1ffffe00 /* Offending Page Number */
+#define MEM_PAGESHFT 9 /* Shift to normalize page number */
+
+/*
+ * Main Memory Control & Diag Status Reg (merr_cont)
+ */
+#define MEM_CRDINT 0x00001000 /* CRD interrupts enabled */
+#define MEM_REFRESH 0x00000800 /* Forced memory refresh */
+#define MEM_ERRDIS 0x00000400 /* error detect disable */
+#define MEM_DIAG 0x00000080 /* Diagnostics mode */
+#define MEM_CHECK 0x0000007f /* check bits for diagnostic mode */
+
+/*
+ * Main Memory Config Regs (merr_csr[0-15])
+ */
+#define MEM_BNKENBLE 0x80000000 /* Bank Enable */
+#define MEM_BNKNUM 0x03c00000 /* Physical map Bank number */
+#define MEM_BNKUSAGE 0x00000003 /* Bank Usage */
+
+/*
+ * Cache Control & Boot/Diag registers
+ */
+struct ka650_cbd {
+ u_char cbd_cacr; /* Low byte: Cache Enable & Parity Err detect */
+ u_char cbd_cdf1; /* Cache diagnostic field (unused) */
+ u_char cbd_cdf2; /* Cache diagnostic field (unused) */
+ u_char pad;
+ u_long cbd_bdr; /* Boot & Diagnostic Register (unused) */
+};
+#define KA650_CBD 0x20084000
+
+/*
+ * CACR: Cache Control Register (2nd level cache) (cbd_cacr)
+ */
+#define CACR_CEN 0x00000010 /* Cache enable */
+#define CACR_CPE 0x00000020 /* Cache Parity Error */
+
+/*
+ * System Support Chip (SSC) registers
+ */
+struct ka650_ssc {
+ u_long ssc_sscbr; /* SSC Base Addr Register */
+ u_long pad1[3];
+ u_long ssc_ssccr; /* SSC Configuration Register */
+ u_long pad2[3];
+ u_long ssc_cbtcr; /* CDAL Bus Timeout Control Register */
+ u_long pad3[55];
+ u_long ssc_tcr0; /* timer control reg 0 */
+ u_long ssc_tir0; /* timer interval reg 0 */
+ u_long ssc_tnir0; /* timer next interval reg 0 */
+ u_long ssc_tivr0; /* timer interrupt vector reg 0 */
+ u_long ssc_tcr1; /* timer control reg 1 */
+ u_long ssc_tir1; /* timer interval reg 1 */
+ u_long ssc_tnir1; /* timer next interval reg 1 */
+ u_long ssc_tivr1; /* timer interrupt vector reg 1 */
+ u_long pad4[184];
+ u_char ssc_cpmbx; /* Console Program Mail Box: Lang & Hact */
+ u_char ssc_terminfo; /* TTY info: Video Dev, MCS, CRT & ROM flags */
+ u_char ssc_keyboard; /* Keyboard code */
+};
+#define KA650_SSC 0x20140000
+
+/*
+ * CBTCR: CDAL Bus Timeout Control Register (ssc_cbtcr)
+ */
+#define CBTCR_BTO 0x80000000 /* r/w unimp IPR or unack intr */
+#define CBTCR_RWT 0x40000000 /* CDAL Bus Timeout on CPU or DMA */
+
+/*
+ * TCR0/TCR1: Programable Timer Control Registers (ssc_tcr[01])
+ * (The rest of the bits are the same as in the standard VAX
+ * Interval timer and are defined in clock.h)
+ */
+#define TCR_STP 0x00000004 /* Stop after time-out */
+
+/*
+ * Flags for Console Program Mail Box
+ */
+#define CPMB650_HALTACT 0x03 /* Field for halt action */
+#define CPMB650_RESTART 0x01 /* Restart */
+#define CPMB650_REBOOT 0x02 /* Reboot */
+#define CPMB650_HALT 0x03 /* Halt */
+#define CPMB650_BIP 0x04 /* Bootstrap in progress */
+#define CPMB650_RIP 0x08 /* Restart in progress */
+#define CPMB650_LANG 0xf0 /* Language field */
+
+/*
+ * Inter Processor Communication Register
+ * To determine if memory error was from QBUS device DMA (as opposed to cpu).
+ */
+struct ka650_ipcr {
+ u_long pad[80];
+ u_short ipcr0; /* InterProcessor Comm Reg for arbiter */
+};
+#define KA650_IPCR 0x20001e00
+
+#endif LOCORE
+
+/*
+ * Physical start address of the Qbus memory.
+ * The q-bus memory size is 4 meg.
+ * Physical start address of the I/O space (where the 8Kbyte I/O page is).
+ */
+#define KA650_QMEM 0x30000000
+#define KA650_QMEMSIZE (512*8192)
+#define KA650_QDEVADDR 0x20000000
+
+/*
+ * Mapping info for Cache Entries, including
+ * Size (in bytes) of 2nd Level Cache for cache flush operation
+ */
+#define KA650_CACHE 0x10000000
+#define KA650_CACHESIZE (64*1024)
+
+/*
+ * Useful ROM addresses
+ */
+#define KA650ROM_SIDEX 0x20060004 /* system ID extension */
+#define KA650ROM_GETC 0x20060008 /* (jsb) get character from console */
+#define KA650ROM_PUTS 0x2006000c /* (jsb) put string to console */
+#define KA650ROM_GETS 0x20060010 /* (jsb) read string with prompt */
+#define KA650_CONSTYPE 0x20140401 /* byte at which console type resides */
-/* $NetBSD: macros.h,v 1.5 1995/10/20 12:55:06 ragge Exp $ */
+/* $NetBSD: macros.h,v 1.6 1995/12/13 18:56:01 ragge Exp $ */
/*
* Copyright (c) 1994 Ludd, University of Lule}, Sweden.
}
#endif
-#define waitabit(tid) \
-({ \
- asm __volatile ("mfpr $27,r0;addl2 %0,r0;1:;mfpr $27,r1; \
- cmpl r0,r1;bneq 1b;" \
- : \
- : "g"(tid) \
- : "r0","r1"); \
-})
-
static __inline__ void blkcpy(const void*from, void*to, u_int len) {
asm __volatile("
movl %0,r1
-/* $NetBSD: nexus.h,v 1.5 1995/11/12 14:37:22 ragge Exp $ */
+/* $NetBSD: nexus.h,v 1.6 1995/12/13 18:55:27 ragge Exp $ */
/*-
* Copyright (c) 1982, 1986 The Regents of the University of California.
* @(#)nexus.h 7.3 (Berkeley) 5/9/91
*/
+#ifndef _VAX_NEXUS_H_
+#define _VAX_NEXUS_H_
/*
* Information about nexus's.
*
#ifndef ASSEMBLER
struct nexus *nexus;
#endif
+
+#endif /* _VAX_NEXUS_H_ */
-/* $NetBSD: scb.h,v 1.3 1995/11/12 14:38:31 ragge Exp $ */
+/* $NetBSD: scb.h,v 1.4 1995/12/13 18:54:56 ragge Exp $ */
/*
* Copyright (c) 1994 Ludd, University of Lule}, Sweden.
*/
+/*
+ * Definition of the System Control Block. More about it can be
+ * found in the Vax Architecture Reference Manual, section 6.6.
+ */
struct scb {
+ void *scb_unused; /* First unused vector */
+ void *scb_mcheck;
+ void *scb_kspinv;
+ void *scb_powfail;
+ void *scb_privinst; /* 10 Privileged Instruction fault */
+ void *scb_xfcinst;
+ void *scb_resop;
+ void *scb_resad;
+ void *scb_accessv; /* 20 Access Control violation fault */
+ void *scb_transinv;
+ void *scb_trace;
+ void *scb_breakp;
+ void *scb_compat; /* 30 Compatibility instruction fault */
+ void *scb_arith;
+ void *scb_unused1;
+ void *scb_unused2;
+ void *scb_chmk; /* 40 CHMK */
+ void *scb_chme;
+ void *scb_chms;
+ void *scb_chmu;
+ void *scb_sbisilo; /* 50 SBI Silo compare */
+ void *scb_cmrd;
+ void *scb_sbialert;
+ void *scb_sbifault;
+ void *scb_memwtimo; /* 60 Memory write timeout */
+ void *scb_unused3;
+ void *scb_unused4;
+ void *scb_unused5;
+ void *scb_unused6; /* 70 unused */
+ void *scb_unused7;
+ void *scb_unused8;
+ void *scb_unused9;
+ void *scb_unused10; /* 80 unused */
+ void *scb_softint1;
+ void *scb_softint2;
+ void *scb_softint3;
+ void *scb_softint4; /* 90 Software interrupt level 4 */
+ void *scb_softint5;
+ void *scb_softint6;
+ void *scb_softint7;
+ void *scb_softint8; /* A0 Software interrupt level 8 */
+ void *scb_softint9;
+ void *scb_softinta;
+ void *scb_softintb;
+ void *scb_softintc; /* B0 Software interrupt level C */
+ void *scb_softintd;
+ void *scb_softinte;
+ void *scb_softintf;
+ void *scb_timer; /* C0 Interval timer */
+ void *scb_unused11;
+ void *scb_unused12;
+ void *scb_unused13;
+ void *scb_unused14; /* D0 Unused */
+ void *scb_unused15;
+ void *scb_unused16;
+ void *scb_unused17;
+ void *scb_unused18; /* E0 Unused */
+ void *scb_unused19;
+ void *scb_unused20;
+ void *scb_unused21;
+ void *scb_csrint;
+ void *scb_cstint; /* F0 Console storage transmit interrupt */
+ void *scb_ctrint;
+ void *scb_cttint;
+ struct ivec_dsp *scb_nexvec[4][16]; /* Nexus interrupt vectors */
};
#ifdef _KERNEL
-/* $NetBSD: trap.h,v 1.9 1995/11/12 14:33:11 ragge Exp $ */
+/* $NetBSD: trap.h,v 1.10 1995/12/13 18:54:03 ragge Exp $ */
/*-
* Copyright (c) 1990 The Regents of the University of California.
char pushlarg; /* $? */
char nop; /* nop, for foolish gcc */
char calls[3]; /* calls $1,? */
- u_int hoppaddr; /* jump for calls */
+ void (*hoppaddr)(); /* jump for calls */
char popr; /* popr $0x3f */
char poprarg;
char rei; /* rei */
-/* $NetBSD: vmparam.h,v 1.9 1995/08/22 04:28:20 ragge Exp $ */
+/* $NetBSD: vmparam.h,v 1.10 1995/12/13 18:53:15 ragge Exp $ */
/*-
* Copyright (c) 1990 The Regents of the University of California.
* Ptsizes are in PTEs.
*/
-#define USRPTSIZE ((MAXDSIZ >> PG_SHIFT) * maxproc)
-#define KALLOCMEM (((1*1024*1024*maxproc)>>PG_SHIFT)/4)
-#define SYSPTSIZE (((USRPTSIZE * 4) >> PG_SHIFT) + UPAGES * maxproc + \
+#define USRPTSIZE ((MAXDSIZ >> PGSHIFT) * maxproc)
+#define KALLOCMEM (((1*1024*1024*maxproc)>>PGSHIFT)/4)
+#define SYSPTSIZE (((USRPTSIZE * 4) >> PGSHIFT) + UPAGES * maxproc + \
KALLOCMEM)
/*
-/* $NetBSD: tmscp.c,v 1.6 1995/11/30 00:59:29 jtc Exp $ */
+/* $NetBSD: tmscp.c,v 1.7 1995/12/13 19:02:53 ragge Exp $ */
/*-
* Copyright (c) 1991 The Regents of the University of California.
#include "vax/vax/tmscpinf.h"
#include "vax/vax/mscpvar.h"
-void tmscpstrategy __P((struct buf *));
+int tmscp_match __P((struct device *, void *, void *));
+void tmscp_attach __P((struct device *, struct device *, void *));
+void tmscpstrategy __P((struct buf *));
+
+struct cfdriver tmscpcd = {
+ NULL, "tmscp", tmscp_match, tmscp_attach, DV_DULL, sizeof(struct device)
+};
/* Software state per controller */
printf("\n");
}
}
+
+tmscp_match(parent, match, aux)
+ struct device *parent;
+ void *match, *aux;
+{
+ return 0;
+}
+
+void
+tmscp_attach(parent, self, aux)
+ struct device *parent, *self;
+ void *aux;
+{
+}
+
#endif
-/* $NetBSD: uba.c,v 1.10 1995/12/01 19:22:56 ragge Exp $ */
+/* $NetBSD: uba.c,v 1.11 1995/12/13 19:02:57 ragge Exp $ */
/*
* Copyright (c) 1982, 1986 The Regents of the University of California.
#endif
};
break;
+#endif
+#if VAX650
+ case VAX_650:
+ sc->uh_mr = (void *)sa->nexaddr;
+ sc->uh_type = QBA;
+ sc->uh_physuba = (void*)QBAMAP630; /* XXX */
+ ubaphys = QMEM630; /* XXX */
+ ubaiophys = QIOPAGE630; /* XXX */
+ break;
#endif
};
/*
VM_PROT_READ|VM_PROT_WRITE);
pmap_map(min + (UBAPAGES * NBPG), ubaiophys, ubaiophys +
(UBAIOPAGES * NBPG), VM_PROT_READ|VM_PROT_WRITE);
-#if VAX630
+#if VAX630 || VAX650
/* Enable access to local memory. */
- if (cpu_type == VAX_630)
+ if (cpu_type == VAX_630 || cpunumber == VAX_650)
*((u_short *)(sc->uh_iopage + QIPCR)) = Q_LMEAE;
#endif
/*
-/* $NetBSD: uda.c,v 1.9 1995/11/10 19:25:53 ragge Exp $ */
-
+/* $NetBSD: uda.c,v 1.10 1995/12/13 19:02:47 ragge Exp $ */
/*
* Copyright (c) 1988 Regents of the University of California.
* All rights reserved.
#include "uda.h"
#include "ra.h"
-#if NUDA > 0
-
/*
* CONFIGURATION OPTIONS. The next three defines are tunable -- tune away!
*
* DEFAULT_BURST must be at least 1.
*/
#define COMPAT_42
-
+#define todr() 0 /* XXX */
#define NRSPL2 5 /* log2 number of response packets */
#define NCMDL2 5 /* log2 number of command packets */
#define MAXUNIT 8 /* maximum allowed unit number */
#define DEFAULT_BURST 4 /* default DMA burst size */
+#define ALLSTEPS (UDA_ERR|UDA_STEP4|UDA_STEP3|UDA_STEP2|UDA_STEP1)
+
+#define STEP1MASK (ALLSTEPS | UDA_IE | UDA_NCNRMASK)
+#define STEP1GOOD (UDA_STEP2 | UDA_IE | (NCMDL2 << 3) | NRSPL2)
+
+#define STEP2MASK (ALLSTEPS | UDA_IE | UDA_IVECMASK)
+#define STEP2GOOD (UDA_STEP3 | UDA_IE | (sc->sc_ivec >> 2))
+
+#define STEP3MASK ALLSTEPS
+#define STEP3GOOD UDA_STEP4
+
#include "sys/param.h"
#include "sys/systm.h"
#include "sys/buf.h"
#define Wait_step( mask, result, status ) { \
status = 1; \
if ((udaddr->udasa & mask) != result) { \
- int count = 0; \
+ volatile int count = 0; \
while ((udaddr->udasa & mask) != result) { \
- DELAY(100); \
+ DELAY(1000); \
count += 1; \
if (count > DELAYTEN) \
break; \
struct udaca uda_ca; /* communications area */
struct mscp uda_rsp[NRSP]; /* response packets */
struct mscp uda_cmd[NCMD]; /* command packets */
-} uda[NUDA];
+};
/*
* Software status, per controller.
*/
struct uda_softc {
- struct uda *sc_uda; /* Unibus address of uda struct */
+ struct uda *sc_uuda; /* Unibus address of uda struct */
+ struct uda sc_uda; /* Struct for uda communication */
short sc_state; /* UDA50 state; see below */
short sc_flags; /* flags; see below */
int sc_micro; /* microcode revision */
} udastats = { NCMD + 1 };
#endif
+int udamatch __P((struct device *, void *, void *));
+void uda_attach __P((struct device *, struct device *, void *));
+
+struct cfdriver udacd = {
+ NULL, "uda", udamatch, uda_attach, DV_DULL, sizeof(struct device)
+};
+
/*
* Controller states
*/
* because autoconf has not set up the right information yet.
* We have to do everything `by hand'.
*/
+int
+udamatch(parent, match, aux)
+ struct device *parent;
+ void *match, *aux;
+{
+ return 0;
+}
+
+void
+uda_attach(parent, self, aux)
+ struct device *parent, *self;
+ void *aux;
+{
+}
+
udaprobe(reg, ctlr, um)
caddr_t reg;
int ctlr;
struct uba_ctlr *um;
{
-/* int br, cvec; */
struct uda_softc *sc;
volatile struct udadevice *udaddr;
struct mscp_info *mi;
mi->mi_tab = (void*)&um->um_tab;
mi->mi_ip = udaip[ctlr];
mi->mi_cmd.mri_size = NCMD;
- mi->mi_cmd.mri_desc = uda[ctlr].uda_ca.ca_cmddsc;
- mi->mi_cmd.mri_ring = uda[ctlr].uda_cmd;
+ mi->mi_cmd.mri_desc = sc->sc_uda.uda_ca.ca_cmddsc;
+ mi->mi_cmd.mri_ring = sc->sc_uda.uda_cmd;
mi->mi_rsp.mri_size = NRSP;
- mi->mi_rsp.mri_desc = uda[ctlr].uda_ca.ca_rspdsc;
- mi->mi_rsp.mri_ring = uda[ctlr].uda_rsp;
+ mi->mi_rsp.mri_desc = sc->sc_uda.uda_ca.ca_rspdsc;
+ mi->mi_rsp.mri_ring = sc->sc_uda.uda_rsp;
#ifdef ragge
mi->mi_wtab.b_actf = NULL;
#else
*/
ubasc = ubacd.cd_devs[0]; /* XXX */
sc->sc_ivec = ubasc->uh_lastiv -= 4;
-/* sc->sc_ivec = (uba_hd[numuba].uh_lastiv -= 4); */
udaddr = (struct udadevice *) reg;
/*
again:
if (udainit(ui->ui_ctlr))
return (0);
- timeout = todr() + 1000; /* 10 seconds */
- while (todr() < timeout) {
- if (sc->sc_state == ST_RUN) /* made it */
+ timeout = 1000;
+ while (timeout-- > 0) {
+ DELAY(3000);
+ if (sc->sc_state == ST_RUN)
goto findunit;
}
+
if (++tries < 2)
goto again;
printf("uda%d: controller hung\n", um->um_ctlr);
*mp->mscp_addr |= MSCP_OWN | MSCP_INT;
i = ((struct udadevice *) reg)->udaip; /* initiate polling */
mp = &udaslavereply;
- timeout = todr() + 1000;
- while (todr() < timeout)
+ timeout = 1000;
+ while (timeout-- > 0) {
+ DELAY(10000);
if (mp->mscp_opcode)
goto gotit;
+ }
printf("uda%d: no response to Get Unit Status request\n",
- um->um_ctlr);
+ um->um_ctlr);
sc->sc_flags &= ~SC_INSLAVE;
return (0);
register struct uda_softc *sc;
register struct udadevice *udaddr;
struct uba_ctlr *um;
- int timo, ubinfo, count;
+ int timo, ubinfo, count, i, wait_status;
+ unsigned short hej;
/* printf("udainit\n"); */
sc = &uda_softc[ctlr];
um = udaminfo[ctlr];
* Map the communication area and command and
* response packets into Unibus space.
*/
- ubinfo = uballoc(um->um_ubanum, (caddr_t) &uda[ctlr],
+ ubinfo = uballoc(um->um_ubanum, (caddr_t) &sc->sc_uda,
sizeof (struct uda), UBA_CANTWAIT);
if (ubinfo == 0) {
printf("uda%d: uballoc map failed\n", ctlr);
return (-1);
}
- sc->sc_uda = (struct uda *) UBAI_ADDR(ubinfo);
+ sc->sc_uuda = (struct uda *) UBAI_ADDR(ubinfo);
sc->sc_flags |= SC_MAPPED;
}
+ bzero(&sc->sc_uda, sizeof (struct uda));
/*
* While we are thinking about it, reset the next command
sc->sc_state = ST_STEP1;
udaddr->udasa = UDA_ERR | (NCMDL2 << 11) | (NRSPL2 << 8) | UDA_IE |
(sc->sc_ivec >> 2);
+
return (0);
}
volatile int hej;
void udastrategy();
extern int cold;
-/* printf("uda_rainit\n"); */
+
ra = &ra_info[unit];
if ((ui->ui_flags & UNIT_ONLINE) == 0) {
mp = mscp_getcp(&sc->sc_mi, MSCP_WAIT);
hej = ((struct udadevice *)ui->ui_addr)->udaip;
if (cold) {
- i = todr() + 1000;
- while ((ui->ui_flags & UNIT_ONLINE) == 0)
- if (todr() > i)
+ i = 1000;
+ while ((ui->ui_flags & UNIT_ONLINE) == 0) {
+ DELAY(1000);
+ if (i-- < 0)
break;
+ }
} else {
timeout(wakeup, (caddr_t)&ui->ui_flags, 10 * hz);
sleep((caddr_t)&ui->ui_flags, PSWP + 1);
udaintr(ctlr)
{
struct uba_ctlr *um = udaminfo[ctlr];
- volatile struct uda_softc *sc = &uda_softc[ctlr];
+ struct uda_softc *sc = &uda_softc[ctlr];
volatile struct udadevice *udaddr = (struct udadevice *)um->um_addr;
struct uda *ud;
struct mscp *mp;
* appear after the interrupt from STEPn initialisation.
* All steps test the bits in ALLSTEPS.
*/
-#define ALLSTEPS (UDA_ERR|UDA_STEP4|UDA_STEP3|UDA_STEP2|UDA_STEP1)
-
-#define STEP1MASK (ALLSTEPS | UDA_IE | UDA_NCNRMASK)
-#define STEP1GOOD (UDA_STEP2 | UDA_IE | (NCMDL2 << 3) | NRSPL2)
-
-#define STEP2MASK (ALLSTEPS | UDA_IE | UDA_IVECMASK)
-#define STEP2GOOD (UDA_STEP3 | UDA_IE | (sc->sc_ivec >> 2))
-
-#define STEP3MASK ALLSTEPS
-#define STEP3GOOD UDA_STEP4
switch (sc->sc_state) {
}
return;
}
- udaddr->udasa = (int)&sc->sc_uda->uda_ca.ca_rspdsc[0] |
+ udaddr->udasa = (int)&sc->sc_uuda->uda_ca.ca_rspdsc[0] |
(MACHID(cpu_type) == VAX_780 || MACHID(cpu_type)
== VAX_8600 ? UDA_PI : 0);
sc->sc_state = ST_STEP2;
if (!wait_status)
goto initfailed;
- udaddr->udasa = ((int)&sc->sc_uda->uda_ca.ca_rspdsc[0]) >> 16;
+ udaddr->udasa = ((int)&sc->sc_uuda->uda_ca.ca_rspdsc[0]) >> 16;
sc->sc_state = ST_STEP3;
return;
return;
}
- ud = &uda[ctlr];
+ ud = &sc->sc_uda;
/*
* Handle buffer purge requests.
udainitds(ctlr)
int ctlr;
{
- register struct uda *ud = &uda[ctlr];
- register struct uda *uud = uda_softc[ctlr].sc_uda;
+ register struct uda *uud = uda_softc[ctlr].sc_uuda;
+ register struct uda *ud = &uda_softc[ctlr].sc_uda;
register struct mscp *mp;
register int i;
/* printf("udainitds\n"); */
* response packet.
*/
uba = phys(struct uba_softc *, ui->ui_hd)->uh_physuba;
- ubainit(uba);
+ ubainit(ui->ui_hd);
udaddr = (struct udadevice *)ui->ui_physaddr;
ud = phys(struct uda1 *, &uda1);
-printf("H{r.\n");
/*
* Map the ca+packets into Unibus I/O space so the UDA50 can get
* at them. Use the registers at the end of the Unibus map (since
lp->d_partitions[0].p_offset = 0;
lp->d_partitions[0].p_size = lp->d_secperunit;
}
-#endif /* NUDA > 0 */
-/* $NetBSD: autoconf.c,v 1.4 1995/06/05 16:26:23 ragge Exp $ */
+/* $NetBSD: autoconf.c,v 1.5 1995/12/13 18:45:57 ragge Exp $ */
/*
* Copyright (c) 1994 Ludd, University of Lule}, Sweden.
#include "sys/param.h"
#include "machine/cpu.h"
#include "machine/sid.h"
-#include "machine/loconf.h"
#include "sys/types.h"
#include "sys/device.h"
#include "sys/reboot.h"
#include "machine/param.h"
#include "machine/vmparam.h"
#include "machine/nexus.h"
+#include "machine/ka750.h"
#include "machine/../vax/gencons.h"
#include "vm/vm.h"
#define BACKPLANE 0
#define BIBUSS 1
#define SBIBUSS 2
+
struct bp_conf {
char *type;
int num;
int cpu_notsupp(),cpu_notgen();
#ifdef VAX750
int ka750_mchk(),ka750_memerr(),ka750_clock(),ka750_conf();
+int ka750_steal_pages();
int nexty750[]={ NEX_MEM16, NEX_MEM16, NEX_MEM16, NEX_MEM16,
NEX_MBA, NEX_MBA, NEX_MBA, NEX_MBA,
NEX_UBA0, NEX_UBA1, NEX_ANY, NEX_ANY,
NEX_ANY, NEX_ANY, NEX_ANY, NEX_ANY};
#endif
#if VAX730
+int ka750_steal_pages();
int nexty730[NNEX730] = {
NEX_MEM16, NEX_ANY, NEX_ANY, NEX_ANY,
NEX_ANY, NEX_ANY, NEX_ANY, NEX_ANY,
};
#endif
#if VAX630
+int uvaxII_steal_pages();
int uvaxII_mchk(), uvaxII_memerr(), uvaxII_clock(), uvaxII_conf();
#endif
+#if VAX650
+int uvaxIII_steal_pages();
+int uvaxIII_mchk(), uvaxIII_memerr(), uvaxIII_clock(), uvaxIII_conf();
+#endif
struct cpu_dep cpu_calls[VAX_MAX+1]={
/* Type 0,noexist */
cpu_notsupp,cpu_notsupp,cpu_notsupp,cpu_notsupp,cpu_notsupp,
#endif
#ifdef VAX750 /* Type 2, 11/750 */
- cpu_notgen,ka750_clock,ka750_mchk,ka750_memerr,ka750_conf,
+ ka750_steal_pages,ka750_clock,ka750_mchk,ka750_memerr,ka750_conf,
#else
cpu_notgen,cpu_notgen,cpu_notgen,cpu_notgen,cpu_notgen,
#endif
#ifdef VAX730 /* Type 3, 11/{730,725}, ceauciesco-vax */
- cpu_notsupp,cpu_notsupp,cpu_notsupp,cpu_notsupp,cpu_notsupp,
+ ka730_steal_pages,cpu_notsupp,cpu_notsupp,cpu_notsupp,cpu_notsupp,
#else
cpu_notsupp,cpu_notsupp,cpu_notsupp,cpu_notsupp,cpu_notsupp,
#endif
cpu_notsupp,cpu_notsupp,cpu_notsupp,cpu_notsupp,cpu_notsupp,
#endif
#ifdef VAX630 /* Type 8, KA630 or KA410 (uVAX II) */
- cpu_notgen,uvaxII_clock,uvaxII_mchk,uvaxII_memerr,uvaxII_conf,
+ uvaxII_steal_pages, uvaxII_clock, uvaxII_mchk, uvaxII_memerr,
+ uvaxII_conf,
#else
cpu_notsupp,cpu_notsupp,cpu_notsupp,cpu_notsupp,cpu_notsupp,
#endif
/* Type 9, not used */
cpu_notsupp,cpu_notsupp,cpu_notsupp,cpu_notsupp,cpu_notsupp,
#ifdef VAX650 /* Type 10, KA65X (uVAX III) */
- cpu_notsupp,cpu_notsupp,cpu_notsupp,cpu_notsupp,cpu_notsupp,
+ uvaxIII_steal_pages, uvaxIII_clock, uvaxIII_mchk, uvaxIII_memerr,
+ uvaxIII_conf,
#else
cpu_notsupp,cpu_notsupp,cpu_notsupp,cpu_notsupp,cpu_notsupp,
#endif
*/
gencnslask(); /* XXX inte g|ras h{r */
swapconf();
- cold=0;
+ cold = 0;
mtpr(GC_CCF, PR_TXDB); /* Clear cold start flag in cpu */
}
void *aux;
char *hej;
{
- if(hej) printf("printut %s\n",hej);
- return(UNSUPP);
+ if (hej)
+ printf("printut %s\n",hej);
+ return (UNSUPP);
}
int
struct cfdata *cf;
void *aux;
{
- if(cf->cf_unit==0&&strcmp(cf->cf_driver->cd_name,"backplane")==0)
+ if (cf->cf_unit == 0 &&
+ strcmp(cf->cf_driver->cd_name, "backplane") == 0)
return 1; /* First (and only) backplane */
- return(0);
+ return (0);
}
void
void *hej;
{
struct bp_conf bp;
- int i,ccpu,cmem,cbi,csbi;
+ int i, ccpu, cmem, cbi, csbi;
printf("\n");
switch(cpunumber){
case VAX_750:
+ case VAX_650:
case VAX_78032:
- cmem=cbi=0;
- ccpu=csbi=1;
+ cmem = cbi = 0;
+ ccpu = csbi = 1;
break;
}
- bp.partyp=BACKPLANE;
- bp.type="cpu";
- for(i=0;i<ccpu;i++){
- bp.num=i;
+ bp.partyp = BACKPLANE;
+ bp.type = "cpu";
+ for (i = 0; i < ccpu; i++) {
+ bp.num = i;
config_found(self, &bp, printut);
}
- bp.type="mem";
- for(i=0;i<cmem;i++){
- bp.num=i;
+ bp.type = "mem";
+ for (i = 0; i < cmem; i++) {
+ bp.num = i;
config_found(self, &bp, printut);
}
- bp.type="bi";
- for(i=0;i<cbi;i++){
- bp.num=i;
+ bp.type = "bi";
+ for (i = 0; i < cbi; i++) {
+ bp.num = i;
config_found(self, &bp, printut);
}
- bp.type="sbi";
- for(i=0;i<csbi;i++){
- bp.num=i;
+ bp.type = "sbi";
+ for(i = 0; i < csbi; i++) {
+ bp.num = i;
config_found(self, &bp, printut);
}
}
struct cfdata *cf;
void *aux;
{
- struct bp_conf *bp=aux;
+ struct bp_conf *bp = aux;
- if(strcmp(cf->cf_driver->cd_name,"cpu"))
+ if (strcmp(cf->cf_driver->cd_name, "cpu"))
return 0;
switch (cpunumber) {
-#ifdef VAX750
+#if VAX750 || VAX630 || VAX650
case VAX_750:
- if(cf->cf_unit==0&&bp->partyp==BACKPLANE)
- return 1;
- break;
-#endif
-#ifdef VAX630
case VAX_78032:
- if(cf->cf_unit==0&&bp->partyp==BACKPLANE)
+ case VAX_650:
+ if(cf->cf_unit == 0 && bp->partyp == BACKPLANE)
return 1;
break;
#endif
struct device *parent, *self;
void *aux;
{
- extern int cpu_type;
- extern char cpu_model[];
-
- switch (cpunumber) {
-#ifdef VAX750
- case VAX_750:
- printf(": 11/750, hardware rev %d, ucode rev %d\n",
- V750HARDW(cpu_type), V750UCODE(cpu_type));
- printf("cpu0 at backplane0: ");
- if(mfpr(PR_ACCS)&0xff){
- printf("FPA present, enabling\n");
- mtpr(0x8000,PR_ACCS);
- } else printf("no FPA\n");
- strcpy(cpu_model,"VAX 11/750");
- break;
-#endif
-#if VAX630
- case VAX_78032:
- printf(": MicroVAXII CPU\n");
- strcpy(cpu_model, "MicroVAX 78032/78132");
- break;
-#endif
- };
+ (*cpu_calls[cpunumber].cpu_conf)(parent, self, aux);
}
-int nmcr=0;
+int nmcr = 0;
int
mem_match(parent, cf, aux)
struct cfdata *cf;
void *aux;
{
- struct sbi_attach_args *sa=(struct sbi_attach_args *)aux;
+ struct sbi_attach_args *sa = (struct sbi_attach_args *)aux;
- if((cf->cf_loc[0]!=sa->nexnum)&&(cf->cf_loc[0]>-1))
+ if ((cf->cf_loc[0] != sa->nexnum) && (cf->cf_loc[0] > -1))
return 0; /* memory doesn't match spec's */
- switch(sa->type){
+ switch (sa->type) {
case NEX_MEM16:
return 1;
}
struct device *parent, *self;
void *aux;
{
- struct sbi_attach_args *sa=(struct sbi_attach_args *)aux;
+ struct sbi_attach_args *sa = (struct sbi_attach_args *)aux;
- switch(cpunumber){
+ switch (cpunumber) {
#ifdef VAX750
case VAX_750:
- ka750_memenable(sa,self);
+ ka750_memenable(sa, self);
break;
#endif
-/* $NetBSD: clock.c,v 1.8 1995/11/30 00:59:32 jtc Exp $ */
+/* $NetBSD: clock.c,v 1.9 1995/12/13 18:45:56 ragge Exp $ */
/*
* Copyright (c) 1995 Ludd, University of Lule}, Sweden.
* All rights reserved.
((tmp_year % 4 && tmp_year != 32) ? 365 : 366);
switch (cpunumber) {
-#if VAX750
+#if VAX750 || VAX650
case VAX_750:
+ case VAX_650:
year_ticks = mfpr(PR_TODR);
clock_stopped = todrstopped;
break;
printf(
"Internal clock not started. Using time from file system.\n");
switch (cpunumber) {
-#if VAX750
+#if VAX750 || VAX650
case VAX_750:
- /*+1 so the clock won't be stopped */
+ case VAX_650:
+ /* +1 so the clock won't be stopped */
mtpr((fs_time - year) * 100 + 1, PR_TODR);
break;
#endif
} else if (year_ticks / 100 < fs_time - year) {
printf(
"WARNING: Clock has lost time - CHECK AND RESET THE DATE.\n");
- } else sluttid = year + (year_ticks / 100);
+ } else
+ sluttid = year + (year_ticks / 100);
time.tv_sec = sluttid;
}
* (the x and y variables are used to confuse the optimizer enough to ensure
* that the code actually loops:-)
*/
-int
-todr()
+void
+delay(i)
+ int i;
{
- int delaycnt, x = 4, y = 4;
- static int todr_val;
-
- if (cpunumber != VAX_78032)
- return (mfpr(PR_TODR));
-
- /*
- * Loop for approximately 10msec and then return todr_val + 1.
- */
- delaycnt = 5000;
- while (delaycnt > 0)
- delaycnt = delaycnt - x + 3 + y - 4;
- return (++todr_val);
+ volatile int n;
+
+ n = i;
+
+ while (--n)
+ ;
+
+ return;
}
--- /dev/null
+/* $NetBSD: ka650.c,v 1.1 1995/12/13 18:45:52 ragge Exp $ */
+/*
+ * Copyright (c) 1988 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to Berkeley by
+ * Mt. Xinu.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by the University of
+ * California, Berkeley and its contributors.
+ * 4. Neither the name of the University nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @(#)ka650.c 7.7 (Berkeley) 12/16/90
+ */
+
+/*
+ * vax650-specific code.
+ */
+
+#include "sys/param.h"
+#include "sys/time.h"
+#include "sys/kernel.h"
+#include "sys/systm.h"
+#include "sys/device.h"
+#include "vm/vm.h"
+#include "vm/vm_kern.h"
+
+#include "machine/ka650.h"
+#include "machine/cpu.h"
+#include "machine/psl.h"
+#include "machine/mtpr.h"
+#include "machine/nexus.h"
+
+struct ka650_merr *ka650merr_ptr;
+struct ka650_cbd *ka650cbd_ptr;
+struct ka650_ssc *ka650ssc_ptr;
+struct ka650_ipcr *ka650ipcr_ptr;
+int *KA650_CACHE_ptr;
+static int subtyp;
+
+/*
+ * uvaxIII_conf() is called by cpu_attach to do the cpu_specific setup.
+ */
+void
+uvaxIII_conf(parent, self, aux)
+ struct device *parent, *self;
+ void *aux;
+{
+ extern char cpu_model[];
+
+ /*
+ * There are lots of different MicroVAX III models, we should
+ * check which here. but that later...
+ */
+ strcpy(cpu_model,"MicroVAX III");
+ ka650encache();
+ if (ctob(physmem) > ka650merr_ptr->merr_qbmbr) {
+ printf("physmem(0x%x) > qbmbr(0x%x)\n",
+ ctob(physmem), ka650merr_ptr->merr_qbmbr);
+ panic("qbus map unprotected");
+ }
+}
+
+uvaxIII_steal_pages()
+{
+ extern vm_offset_t avail_start, virtual_avail, avail_end;
+ int junk, *jon;
+
+ /*
+ * MicroVAX III: We steal away 64 pages from top of memory,
+ * map in SCB, interrupt vectors, Qbus map registers, memory
+ * error registers, cache control registers, SSC registers,
+ * interprocessor registers and cache diag space.
+ */
+ avail_end -= 64 * NBPG;
+
+ MAPPHYS(junk, 2, VM_PROT_READ|VM_PROT_WRITE); /* SCB & vectors */
+ MAPVIRT(nexus, btoc(0x400000)); /* Qbus map registers */
+ pmap_map((vm_offset_t)nexus, 0x20088000, 0x20090000,
+ VM_PROT_READ|VM_PROT_WRITE);
+
+ MAPVIRT(ka650merr_ptr, 1); /* mem err & mem config regs */
+ pmap_map((vm_offset_t)ka650merr_ptr, (vm_offset_t)KA650_MERR,
+ KA650_MERR + NBPG, VM_PROT_READ|VM_PROT_WRITE);
+
+ MAPVIRT(ka650cbd_ptr, 1); /* cache control & boot/diag regs */
+ pmap_map((vm_offset_t)ka650cbd_ptr, (vm_offset_t)KA650_CBD,
+ KA650_CBD + NBPG, VM_PROT_READ|VM_PROT_WRITE);
+
+ MAPVIRT(ka650ssc_ptr, 1); /* SSC regs (& console prog mail box) */
+ pmap_map((vm_offset_t)ka650ssc_ptr, (vm_offset_t)KA650_SSC,
+ KA650_SSC + NBPG, VM_PROT_READ|VM_PROT_WRITE);
+
+ MAPVIRT(ka650ipcr_ptr, 1); /* InterProcessor Com Regs */
+ pmap_map((vm_offset_t)ka650ipcr_ptr, (vm_offset_t)KA650_IPCR,
+ KA650_IPCR + NBPG, VM_PROT_READ|VM_PROT_WRITE);
+
+ MAPVIRT(KA650_CACHE_ptr, 128); /* Cache Diagnostic space (for flush) */
+ pmap_map((vm_offset_t)KA650_CACHE_ptr, (vm_offset_t)KA650_CACHE,
+ KA650_CACHE + KA650_CACHESIZE, VM_PROT_READ|VM_PROT_WRITE);
+
+ jon = (int *)0x20040004;
+ subtyp = *jon;
+ return 0;
+}
+
+uvaxIII_clock()
+{
+ mtpr(0x40, PR_ICCS); /* Start clock and enable interrupt */
+ return 1;
+}
+
+uvaxIII_memerr()
+{
+ printf("memory err!\n");
+#if 0 /* XXX Fix this */
+ register char *cp = (char *)0;
+ register int m;
+ extern u_int cache2tag;
+
+ if (ka650cbd.cbd_cacr & CACR_CPE) {
+ printf("cache 2 tag parity error: ");
+ if (time.tv_sec - cache2tag < 7) {
+ ka650discache();
+ printf("cacheing disabled\n");
+ } else {
+ cache2tag = time.tv_sec;
+ printf("flushing cache\n");
+ ka650encache();
+ }
+ }
+ m = ka650merr.merr_errstat;
+ ka650merr.merr_errstat = MEM_EMASK;
+ if (m & MEM_CDAL) {
+ cp = "Bus Parity";
+ } else if (m & MEM_RDS) {
+ cp = "Hard ECC";
+ } else if (m & MEM_CRD) {
+ cp = "Soft ECC";
+ }
+ if (cp) {
+ printf("%sMemory %s Error: page 0x%x\n",
+ (m & MEM_DMA) ? "DMA " : "", cp,
+ (m & MEM_PAGE) >> MEM_PAGESHFT);
+ }
+#endif
+}
+
+#define NMC650 15
+char *mc650[] = {
+ 0, "FPA proto err", "FPA resv inst",
+ "FPA Ill Stat 2", "FPA Ill Stat 1", "PTE in P0, TB miss",
+ "PTE in P1, TB miss", "PTE in P0, Mod", "PTE in P1, Mod",
+ "Illegal intr IPL", "MOVC state error", "bus read error",
+ "SCB read error", "bus write error", "PCB write error"
+};
+u_int cache1tag;
+u_int cache1data;
+u_int cdalerr;
+u_int cache2tag;
+
+struct mc650frame {
+ int mc65_bcnt; /* byte count == 0xc */
+ int mc65_summary; /* summary parameter */
+ int mc65_mrvaddr; /* most recent vad */
+ int mc65_istate1; /* internal state */
+ int mc65_istate2; /* internal state */
+ int mc65_pc; /* trapped pc */
+ int mc65_psl; /* trapped psl */
+};
+
+uvaxIII_mchk(cmcf)
+ caddr_t cmcf;
+{
+ register struct mc650frame *mcf = (struct mc650frame *)cmcf;
+ register u_int type = mcf->mc65_summary;
+ register u_int i;
+
+ printf("machine check %x", type);
+ if (type >= 0x80 && type <= 0x83)
+ type -= (0x80 + 11);
+ if (type < NMC650 && mc650[type])
+ printf(": %s", mc650[type]);
+ printf("\n\tvap %x istate1 %x istate2 %x pc %x psl %x\n",
+ mcf->mc65_mrvaddr, mcf->mc65_istate1, mcf->mc65_istate2,
+ mcf->mc65_pc, mcf->mc65_psl);
+ printf("dmaser=0x%b qbear=0x%x dmaear=0x%x\n",
+ ka650merr_ptr->merr_dser, DMASER_BITS, ka650merr_ptr->merr_qbear,
+ ka650merr_ptr->merr_dear);
+ ka650merr_ptr->merr_dser = DSER_CLEAR;
+
+ i = mfpr(PR_CAER);
+ mtpr(CAER_MCC | CAER_DAT | CAER_TAG, PR_CAER);
+ if (i & CAER_MCC) {
+ printf("cache 1 ");
+ if (i & CAER_DAT) {
+ printf("data");
+ i = cache1data;
+ cache1data = time.tv_sec;
+ }
+ if (i & CAER_TAG) {
+ printf("tag");
+ i = cache1tag;
+ cache1tag = time.tv_sec;
+ }
+ } else if ((i & CAER_MCD) || (ka650merr_ptr->merr_errstat & MEM_CDAL)) {
+ printf("CDAL");
+ i = cdalerr;
+ cdalerr = time.tv_sec;
+ }
+ if (time.tv_sec - i < 7) {
+ ka650discache();
+ printf(" parity error: cacheing disabled\n");
+ } else {
+ printf(" parity error: flushing cache\n");
+ ka650encache();
+ }
+ /*
+ * May be able to recover if type is 1-4, 0x80 or 0x81, but
+ * only if FPD is set in the saved PSL, or bit VCR in Istate2
+ * is clear.
+ */
+ if ((type > 0 && type < 5) || type == 11 || type == 12) {
+ if ((mcf->mc65_psl & PSL_FPD)
+ || !(mcf->mc65_istate2 & IS2_VCR)) {
+ uvaxIII_memerr();
+ return 0;
+ }
+ }
+ return -1;
+}
+
+/*
+ * Make sure both caches are off and not in diagnostic mode. Clear the
+ * 2nd level cache (by writing to each quadword entry), then enable it.
+ * Enable 1st level cache too.
+ */
+ka650encache()
+{
+ register int i;
+
+ ka650discache();
+ for (i = 0; i < (KA650_CACHESIZE / sizeof(KA650_CACHE_ptr[0])); i += 2)
+ KA650_CACHE_ptr[i] = 0;
+ ka650cbd_ptr->cbd_cacr = CACR_CEN;
+ mtpr(CADR_SEN2 | CADR_SEN1 | CADR_CENI | CADR_CEND, PR_CADR);
+}
+
+ka650discache()
+{
+ mtpr(0, PR_CADR);
+ ka650cbd_ptr->cbd_cacr = CACR_CPE;
+}
-/* $NetBSD: ka750.c,v 1.7 1995/11/30 00:59:35 jtc Exp $ */
+/* $NetBSD: ka750.c,v 1.8 1995/12/13 18:50:34 ragge Exp $ */
/*-
* Copyright (c) 1982, 1986, 1988 The Regents of the University of California.
#include "sys/device.h"
#include "vm/vm.h"
#include "vm/vm_kern.h"
+
#include "machine/ka750.h"
#include "machine/pte.h"
+#include "machine/cpu.h"
#include "machine/mtpr.h"
#include "vax/uba/ubavar.h"
#include "vax/uba/ubareg.h"
-#include "mba.h"
-#include "uba.h"
-
-int
-ka750_conf()
+/*
+ * ka750_conf() is called by cpu_attach to do the cpu_specific setup.
+ */
+void
+ka750_conf(parent, self, aux)
+ struct device *parent, *self;
+ void *aux;
{
extern char cpu_model[];
strcpy(cpu_model,"VAX 11/750");
- config_rootfound("backplane",(void *)75);
-}
-
-int
-conf_750(){
- extern int cpu_type;
-
printf(": 11/750, hardware rev %d, ucode rev %d\n",
- V750HARDW(cpu_type), V750UCODE(cpu_type));
+ V750HARDW(cpu_type), V750UCODE(cpu_type));
+ printf("%s: ", self->dv_xname);
+ if (mfpr(PR_ACCS) & 255) {
+ printf("FPA present, enabling.\n");
+ mtpr(0x8000, PR_ACCS);
+ } else
+ printf("no FPA\n");
}
/*
* register start counting.
*/
int
-ka750_clock() {
+ka750_clock()
+{
mtpr(-10000, PR_NICR); /* Load in count register */
mtpr(0x800000d1, PR_ICCS); /* Start clock and enable interrupt */
}
-#if NMBA < 1
-/*
- * Dummy routine; should never be called.
- * Should also be somewhere else, but it doesn't matter right now :)
- */
-mbainterrupt(){return;}
-#endif
-
-
-#include "sys/param.h"
extern volatile caddr_t mcraddr[];
-/* $NetBSD: locore.c,v 1.9 1995/11/10 19:05:47 ragge Exp $ */
+/* $NetBSD: locore.c,v 1.10 1995/12/13 18:50:30 ragge Exp $ */
/*
* Copyright (c) 1994 Ludd, University of Lule}, Sweden.
#include "machine/cpu.h"
#include "machine/sid.h"
#include "machine/uvaxII.h"
-#include "machine/loconf.h"
#include "machine/param.h"
#include "machine/vmparam.h"
#include "machine/pcb.h"
u_int proc0paddr;
-volatile int cpunumber, *Sysmap, boothowto, cpu_type;
-volatile char *esym;
-extern volatile int bootdev;
+int cpunumber, *Sysmap, boothowto, cpu_type;
+char *esym;
+extern int bootdev;
/*
* Start is called from boot; the first routine that is called
* management is disabled, and no interrupt system is active.
* We shall be at kernel stack when called; not interrupt stack.
*/
-
-start(how, dev)
+void
+start()
{
- extern u_int *end;
- extern void *scratch;
+ extern u_int *end;
+ extern void *scratch;
register curtop;
- mtpr(0x1f,PR_IPL); /* No interrupts before istack is ok, please */
+ mtpr(0x1f, PR_IPL); /* No interrupts before istack is ok, please */
/*
* We can be running either in system or user space when
proc0paddr = ROUND_PAGE(&end);
mtpr(proc0paddr, PR_PCBB); /* must be set before ksp for some cpus */
- mtpr(proc0paddr+UPAGES*NBPG,PR_KSP); /* new kernel stack */
+ mtpr(proc0paddr + UPAGES * NBPG, PR_KSP); /* new kernel stack */
/*
* Set logical page size and put Sysmap on its place.
*/
- Sysmap=(u_int *)ROUND_PAGE(mfpr(PR_KSP));
+ Sysmap = (u_int *)ROUND_PAGE(mfpr(PR_KSP));
/* Be sure some important internal registers have safe values */
((struct pcb *)proc0paddr)->P0LR = 0;
((struct pcb *)proc0paddr)->P1LR = 0;
((struct pcb *)proc0paddr)->P1BR = (void *)0x80000000;
((struct pcb *)proc0paddr)->iftrap = NULL;
- mtpr(0,PR_P0LR);
- mtpr(0,PR_P0BR);
- mtpr(0,PR_P1LR);
- mtpr(0x80000000,PR_P1BR);
+ mtpr(0, PR_P0LR);
+ mtpr(0, PR_P0BR);
+ mtpr(0, PR_P1LR);
+ mtpr(0x80000000, PR_P1BR);
mtpr(0, PR_SCBB); /* SCB at physical addr */
- mtpr(0,PR_ESP); /* Must be zero, used in page fault routine */
- mtpr(AST_NO,PR_ASTLVL);
+ mtpr(0, PR_ESP); /* Must be zero, used in page fault routine */
+ mtpr(AST_NO, PR_ASTLVL);
cninit();
/* Count up memory etc... early machine dependent routines */
- if((cpunumber=MACHID(mfpr(PR_SID)))>VAX_MAX) cpunumber=0;
- cpu_type=mfpr(PR_SID);
-#if VAX630 || VAX410
- if (cpunumber == VAX_78032)
- cpu_type=(((*UVAXIISID) >> 24) & 0xff)|(cpu_type & 0xff000000);
-#endif
+ if((cpunumber = MACHID(mfpr(PR_SID)))>VAX_MAX) cpunumber=0;
+ cpu_type = mfpr(PR_SID);
pmap_bootstrap();
((struct pcb *)proc0paddr)->framep = scratch;
-/* $NetBSD: machdep.c,v 1.20 1995/11/10 19:05:49 ragge Exp $ */
+/* $NetBSD: machdep.c,v 1.21 1995/12/13 18:45:54 ragge Exp $ */
/*
* Copyright (c) 1994 Ludd, University of Lule}, Sweden.
#include <sys/syscallargs.h>
#include "ppp.h" /* For NERISR_PPP */
-
+extern int virtual_avail, virtual_end;
/*
* We do these external declarations here, maybe they should be done
* somewhere else...
vm_offset_t minaddr, maxaddr;
vm_size_t size;
extern int cpu_type, boothowto, startpmapdebug;
- extern unsigned int avail_end;
+ extern unsigned int avail_start, avail_end;
/*
* Initialize error message buffer.
*/
msgbufmapped = 1;
-#ifdef VAX750
- if (cpunumber == VAX_750)
+#if VAX750 || VAX650
+ if (cpunumber == VAX_750 || cpunumber == VAX_650)
if (!mfpr(PR_TODR))
mtpr(todrstopped = 1, PR_TODR);
#endif
* Find out how much space we need, allocate it, and then give
* everything true virtual addresses.
*/
+
sz = (int) allocsys((caddr_t) 0);
if ((v = (caddr_t) kmem_alloc(kernel_map, round_page(sz))) == 0)
panic("startup: no room for tables");
* Finally, allocate mbuf pool. Since mclrefcnt is an off-size we
* use the more space efficient malloc in place of kmem_alloc.
*/
-
mclrefcnt = (char *) malloc(NMBCLUSTERS + CLBYTES / MCLBYTES,
M_MBUF, M_NOWAIT);
bzero(mclrefcnt, NMBCLUSTERS + CLBYTES / MCLBYTES);
-/* $NetBSD: pmap.c,v 1.18 1995/11/10 18:52:54 ragge Exp $ */
+/* $NetBSD: pmap.c,v 1.19 1995/12/13 18:50:20 ragge Exp $ */
#define DEBUG
/*
* Copyright (c) 1994 Ludd, University of Lule}, Sweden.
pmap_bootstrap()
{
unsigned int junk, sysptsize, istack;
- extern unsigned int proc0paddr, sigcode, esigcode, etext;
- extern struct vmspace vmspace0;
- struct pmap *p0pmap;
+ extern unsigned int proc0paddr, sigcode, esigcode, etext;
+ extern struct vmspace vmspace0;
+ struct pmap *p0pmap;
p0pmap = &vmspace0.vm_pmap;
/*
* Virtual_* and avail_* is used for mapping of system page table.
* First set them to their max values and then decrement them.
+ * The need for kernel virtual memory is linear dependent of the
+ * amount of physical memory also, therefore sysptsize is
+ * a variable here that is changed dependent of the physical
+ * memory size.
*/
+ while (!badaddr(avail_end, 4)) /* Memory is in 64K hunks */
+ avail_end += NBPG * 128;
+ sysptsize += avail_end >> PGSHIFT;
virtual_avail = KERNBASE;
virtual_end = KERNBASE + sysptsize * NBPG;
avail_start = 0;
- while (!badaddr(avail_end, 4)) /* Memory is in 64K hunks */
- avail_end += NBPG * 128;
-
blkclr(Sysmap, sysptsize * 4); /* clear SPT before using it */
/*
* Map kernel. Kernel code is always readable for user,
MAPVIRT(vmmap, 2);
(pt_entry_t *)pte_cmap = kvtopte(vmmap);
-#ifdef VAX750
/*
* We move SCB here from physical address 0 to an address
* somewhere else, so that we can dynamically allocate
mtpr(avail_start, PR_SCBB);
bzero(0, NBPG >> 1);
(cpu_calls[cpunumber].cpu_steal_pages)();
-#else
-#if VAX630
- if (cpu_type == VAX_630)
- avail_end -= 8 * NBPG; /* Avoid console scratchpad */
-#endif
-#endif
+
#ifdef DEBUG
printf("Sysmap %x, istack %x, scratch %x\n",Sysmap,istack,scratch);
printf("etext %x\n", &etext);
/*
* Now everything should be complete, start virtual memory.
*/
- mtpr(SYSPTSIZE, PR_SLR);
+ mtpr(sysptsize, PR_SLR);
mtpr(1, PR_MAPEN);
}
-/* $NetBSD: sbi.c,v 1.3 1995/11/10 19:14:43 ragge Exp $ */
+/* $NetBSD: sbi.c,v 1.4 1995/12/13 18:45:53 ragge Exp $ */
/*
* Copyright (c) 1994 Ludd, University of Lule}, Sweden.
* All rights reserved.
};
break;
#endif
+#ifdef VAX650
+ case VAX_650:
+ maxnex = NNEX630; /* XXX */
+ printf(": Q22\n");
+ break;
+#endif
#if VAX780 || VAX8600
case VAX_780:
case VAX_8600:
break;
}
#endif
-#ifdef VAX630
+#if VAX630 || VAX650
case VAX_78032:
+ case VAX_650:
sa.type = NEX_UBA0;
break;
#endif
-/* $NetBSD: uvaxII.c,v 1.3 1995/11/10 18:52:58 ragge Exp $ */
+/* $NetBSD: uvaxII.c,v 1.4 1995/12/13 18:50:11 ragge Exp $ */
/*-
* Copyright (c) 1988 The Regents of the University of California.
* @(#)ka630.c 7.8 (Berkeley) 5/9/91
*/
-/* All bugs are subject to removal without further notice */
-
#include "sys/param.h"
#include "sys/types.h"
#include "sys/device.h"
void ka630_clkwrite();
#endif
-extern int cpu_type;
-
-int
-uvaxII_conf()
+/*
+ * uvaxII_conf() is called by cpu_attach to do the cpu_specific setup.
+ */
+void
+uvaxII_conf(parent, self, aux)
+ struct device *parent, *self;
+ void *aux;
{
extern char cpu_model[];
switch (cpu_type) {
case VAX_630:
- strcpy(cpu_model,"MicroVAXII");
+ strcpy(cpu_model,"MicroVAX II");
break;
case VAX_410:
strcpy(cpu_model,"MicroVAX 2000");
break;
};
- config_rootfound("backplane",(void*)75);
+ strcpy(cpu_model, "MicroVAX 78032/78132");
}
-int
-conf_uvaxII(){
-
- printf(": UvaxII CPU (78032/78132)\n");
-}
-
-uvaxII_clock(){
-
- mtpr(0x40,PR_ICCS); /* Start clock and enable interrupt */
+uvaxII_clock()
+{
+ mtpr(0x40, PR_ICCS); /* Start clock and enable interrupt */
return 1;
}
*/
uvaxIIcpu_ptr->uvaxII_mser = (UVAXIIMSER_PEN | UVAXIIMSER_MERR |
UVAXIIMSER_LEB);
+
+ /*
+ * Set up cpu_type so that we can differ between 630 and 420.
+ */
+ if (cpunumber == VAX_78032)
+ cpu_type = (((*UVAXIISID) >> 24) & 0xff) |
+ (cpu_type & 0xff000000);
}
-/* $NetBSD: vm_machdep.c,v 1.17 1995/11/10 19:07:16 ragge Exp $ */
+/* $NetBSD: vm_machdep.c,v 1.18 1995/12/13 18:47:59 ragge Exp $ */
#undef SWDEBUG
/*
caddr_t from, to;
int size;
{
- u_int *fpte, *tpte,stor;
+ pt_entry_t *fpte, *tpte;
+ int stor;
fpte = kvtopte(from);
tpte = kvtopte(to);
- stor = (size/NBPG) * sizeof(struct pte);
- bcopy(fpte,tpte,stor);
- bzero(fpte,stor);
- mtpr(0,PR_TBIA);
+ stor = (size >> PGSHIFT) * sizeof(struct pte);
+ bcopy(fpte, tpte, stor);
+ bzero(fpte, stor);
+ mtpr(0, PR_TBIA);
}
#define VIRT2PHYS(x) \
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