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drm/amd/display: Fix hang/underflow when transitioning to ODM4:1
author
jsg
<jsg@openbsd.org>
Thu, 4 Apr 2024 08:09:03 +0000
(08:09 +0000)
committer
jsg
<jsg@openbsd.org>
Thu, 4 Apr 2024 08:09:03 +0000
(08:09 +0000)
From Ilya Bakoulin
ae62f1dde66a6f0eee98defc4c7a346bd5acd239
in linux-6.6.y/6.6.24
e7b2b108cdeab76a7e7324459e50b0c1214c0386
in mainline linux
sys/dev/pci/drm/amd/display/dc/dcn32/dcn32_optc.c
patch
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diff --git
a/sys/dev/pci/drm/amd/display/dc/dcn32/dcn32_optc.c
b/sys/dev/pci/drm/amd/display/dc/dcn32/dcn32_optc.c
index
8abb94f
..
b1fcc91
100644
(file)
--- a/
sys/dev/pci/drm/amd/display/dc/dcn32/dcn32_optc.c
+++ b/
sys/dev/pci/drm/amd/display/dc/dcn32/dcn32_optc.c
@@
-148,6
+148,13
@@
static bool optc32_disable_crtc(struct timing_generator *optc)
REG_UPDATE(OTG_CONTROL,
OTG_MASTER_EN, 0);
+ REG_UPDATE_5(OPTC_DATA_SOURCE_SELECT,
+ OPTC_SEG0_SRC_SEL, 0xf,
+ OPTC_SEG1_SRC_SEL, 0xf,
+ OPTC_SEG2_SRC_SEL, 0xf,
+ OPTC_SEG3_SRC_SEL, 0xf,
+ OPTC_NUM_OF_INPUT_SEGMENT, 0);
+
REG_UPDATE(CONTROL,
VTG0_ENABLE, 0);