-/* $OpenBSD: if_iwm.c,v 1.384 2021/12/03 12:43:17 stsp Exp $ */
+/* $OpenBSD: if_iwm.c,v 1.385 2021/12/20 15:08:10 stsp Exp $ */
/*
* Copyright (c) 2014, 2016 genua gmbh <info@genua.de>
struct iwm_phy_cfg_cmd phy_cfg_cmd;
enum iwm_ucode_type ucode_type = sc->sc_uc_current;
- phy_cfg_cmd.phy_cfg = htole32(sc->sc_fw_phy_config);
+ phy_cfg_cmd.phy_cfg = htole32(sc->sc_fw_phy_config |
+ sc->sc_extra_phy_config);
phy_cfg_cmd.calib_control.event_trigger =
sc->sc_default_calib[ucode_type].event_trigger;
phy_cfg_cmd.calib_control.flow_trigger =
{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_WL_9260_1 },
{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_WL_9560_1 },
{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_WL_9560_2 },
+ { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_WL_9560_3 },
};
int
break;
case PCI_PRODUCT_INTEL_WL_9560_1:
case PCI_PRODUCT_INTEL_WL_9560_2:
+ case PCI_PRODUCT_INTEL_WL_9560_3:
sc->sc_fwname = "iwm-9000-46";
sc->host_interrupt_operation_mode = 0;
sc->sc_device_family = IWM_DEVICE_FAMILY_9000;
sc->sc_nvm_max_section_size = 32768;
sc->sc_mqrx_supported = 1;
sc->sc_integrated = 1;
- sc->sc_xtal_latency = 650;
+ if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_INTEL_WL_9560_3) {
+ sc->sc_xtal_latency = 670;
+ sc->sc_extra_phy_config = IWM_FW_PHY_CFG_SHARED_CLK;
+ } else
+ sc->sc_xtal_latency = 650;
break;
default:
printf("%s: unknown adapter type\n", DEVNAME(sc));
-/* $OpenBSD: if_iwmreg.h,v 1.65 2021/10/11 09:03:22 stsp Exp $ */
+/* $OpenBSD: if_iwmreg.h,v 1.66 2021/12/20 15:08:10 stsp Exp $ */
/******************************************************************************
*
#define IWM_FW_PHY_CFG_TX_CHAIN (0xf << IWM_FW_PHY_CFG_TX_CHAIN_POS)
#define IWM_FW_PHY_CFG_RX_CHAIN_POS 20
#define IWM_FW_PHY_CFG_RX_CHAIN (0xf << IWM_FW_PHY_CFG_RX_CHAIN_POS)
+#define IWM_FW_PHY_CFG_SHARED_CLK (1U << 31)
#define IWM_UCODE_MAX_CS 1
-/* $OpenBSD: if_iwmvar.h,v 1.73 2021/12/03 12:43:17 stsp Exp $ */
+/* $OpenBSD: if_iwmvar.h,v 1.74 2021/12/20 15:08:10 stsp Exp $ */
/*
* Copyright (c) 2014 genua mbh <info@genua.de>
bus_size_t sc_fwdmasegsz;
size_t sc_nvm_max_section_size;
struct iwm_fw_info sc_fw;
- int sc_fw_phy_config;
+ uint32_t sc_fw_phy_config;
+ uint32_t sc_extra_phy_config;
struct iwm_tlv_calib_ctrl sc_default_calib[IWM_UCODE_TYPE_MAX];
struct iwm_nvm_data sc_nvm;