Add GMAC related RK3588 clocks.
authorkettenis <kettenis@openbsd.org>
Mon, 26 Feb 2024 18:54:25 +0000 (18:54 +0000)
committerkettenis <kettenis@openbsd.org>
Mon, 26 Feb 2024 18:54:25 +0000 (18:54 +0000)
ok jmatthew@

sys/dev/fdt/rkclock.c
sys/dev/fdt/rkclock_clocks.h

index b28808a..5e94ab4 100644 (file)
@@ -1,4 +1,4 @@
-/*     $OpenBSD: rkclock.c,v 1.84 2023/11/26 13:47:45 kettenis Exp $   */
+/*     $OpenBSD: rkclock.c,v 1.85 2024/02/26 18:54:25 kettenis Exp $   */
 /*
  * Copyright (c) 2017, 2018 Mark Kettenis <kettenis@openbsd.org>
  *
@@ -4107,6 +4107,11 @@ const struct rkclock rk3588_clocks[] = {
                { RK3588_CLK_GPU_SRC },
                SET_PARENT
        },
+       {
+               RK3588_CLK_GMAC_125M, RK3588_CRU_CLKSEL_CON(83),
+               SEL(15, 15), DIV(14, 8),
+               { RK3588_PLL_GPLL, RK3588_PLL_CPLL }
+       },
        {
                RK3588_CCLK_SRC_SDIO, RK3588_CRU_CLKSEL_CON(172),
                SEL(9, 8), DIV(7, 2),
@@ -4444,6 +4449,14 @@ rk3588_reset(void *cookie, uint32_t *cells, int on)
        uint32_t bit, mask, reg;
 
        switch (idx) {
+       case RK3588_SRST_A_GMAC0:
+               reg = RK3588_CRU_SOFTRST_CON(32);
+               bit = 10;
+               break;
+       case RK3588_SRST_A_GMAC1:
+               reg = RK3588_CRU_SOFTRST_CON(32);
+               bit = 11;
+               break;
        case RK3588_SRST_PCIE0_POWER_UP:
                reg = RK3588_CRU_SOFTRST_CON(32);
                bit = 13;
index 67f61e7..0c9bf1b 100644 (file)
 #define RK3588_ACLK_LOW_TOP_ROOT       258
 #define RK3588_CLK_GPU_SRC             261
 #define RK3588_CLK_GPU                 262
+#define RK3588_CLK_GMAC_125M           310
 #define RK3588_CCLK_SRC_SDIO           395
 #define RK3588_ACLK_VOP_ROOT           600
 #define RK3588_ACLK_VOP                        605
 #define RK3588_PLL_SPLL                        1022
 #define RK3588_XIN24M                  1023
 
+#define RK3588_SRST_A_GMAC0            291
+#define RK3588_SRST_A_GMAC1            292
 #define RK3588_SRST_PCIE0_POWER_UP     294
 #define RK3588_SRST_PCIE1_POWER_UP     295
 #define RK3588_SRST_PCIE2_POWER_UP     296