regen

diff --git a/sys/dev/pci/pcidevs.h b/sys/dev/pci/pcidevs.h
index 076ee38..ced47b1 100644 (file)
--- a/sys/dev/pci/pcidevs.h
+++ b/sys/dev/pci/pcidevs.h
@@ -2,7 +2,7 @@
  * THIS FILE AUTOMATICALLY GENERATED.  DO NOT EDIT.
  *
  * generated from:
- *     OpenBSD: pcidevs,v 1.1752 2014/12/07 03:59:25 deraadt Exp 
+ *     OpenBSD: pcidevs,v 1.1753 2015/01/09 07:27:25 jsg Exp 
  */
 /*     $NetBSD: pcidevs,v 1.30 1997/06/24 06:20:24 thorpej Exp $       */
 
@@ -2939,6 +2939,7 @@
 #define        PCI_PRODUCT_INTEL_CORE4G_HB_2   0x0c00          /* Core 4G Host */
 #define        PCI_PRODUCT_INTEL_CORE4G_PCIE_1 0x0c01          /* Core 4G PCIE */
 #define        PCI_PRODUCT_INTEL_CORE4G_D_SDV_GT1      0x0c02          /* HD Graphics */
+#define        PCI_PRODUCT_INTEL_CORE4G_HB_3   0x0c04          /* Core 4G Host */
 #define        PCI_PRODUCT_INTEL_CORE4G_PCIE_2 0x0c05          /* Core 4G PCIE */
 #define        PCI_PRODUCT_INTEL_CORE4G_M_SDV_GT1      0x0c06          /* HD Graphics */
 #define        PCI_PRODUCT_INTEL_XEONE3_1200V3_HB      0x0c08          /* Xeon E3-1200 v3 Host */
@@ -3896,6 +3897,118 @@
 #define        PCI_PRODUCT_INTEL_82G41_IGD_2   0x2e33          /* G41 Video */
 #define        PCI_PRODUCT_INTEL_82B43_IGD_1   0x2e42          /* B43 Video */
 #define        PCI_PRODUCT_INTEL_82B43_IGD_2   0x2e92          /* B43 Video */
+#define        PCI_PRODUCT_INTEL_E5V3_HB       0x2f00          /* E5 v3 Host */
+#define        PCI_PRODUCT_INTEL_E5V3_PCIE_1   0x2f01          /* E5 v3 PCIE */
+#define        PCI_PRODUCT_INTEL_E5V3_PCIE_2   0x2f04          /* E5 v3 PCIE */
+#define        PCI_PRODUCT_INTEL_E5V3_PCIE_3   0x2f05          /* E5 v3 PCIE */
+#define        PCI_PRODUCT_INTEL_E5V3_PCIE_4   0x2f06          /* E5 v3 PCIE */
+#define        PCI_PRODUCT_INTEL_E5V3_PCIE_5   0x2f07          /* E5 v3 PCIE */
+#define        PCI_PRODUCT_INTEL_E5V3_PCIE_6   0x2f08          /* E5 v3 PCIE */
+#define        PCI_PRODUCT_INTEL_E5V3_PCIE_7   0x2f09          /* E5 v3 PCIE */
+#define        PCI_PRODUCT_INTEL_E5V3_PCIE_8   0x2f0a          /* E5 v3 PCIE */
+#define        PCI_PRODUCT_INTEL_E5V3_PCIE_9   0x2f0b          /* E5 v3 PCIE */
+#define        PCI_PRODUCT_INTEL_E5V3_PCIERING 0x2f1d          /* E5 v3 PCIE Ring */
+#define        PCI_PRODUCT_INTEL_E5V3_SCRATCH_1        0x2f1e          /* E5 v3 Scratch */
+#define        PCI_PRODUCT_INTEL_E5V3_SCRATCH_2        0x2f1f          /* E5 v3 Scratch */
+#define        PCI_PRODUCT_INTEL_E5V3_DMA_0    0x2f20          /* E5 v3 DMA */
+#define        PCI_PRODUCT_INTEL_E5V3_DMA_1    0x2f21          /* E5 v3 DMA */
+#define        PCI_PRODUCT_INTEL_E5V3_DMA_2    0x2f22          /* E5 v3 DMA */
+#define        PCI_PRODUCT_INTEL_E5V3_DMA_3    0x2f23          /* E5 v3 DMA */
+#define        PCI_PRODUCT_INTEL_E5V3_DMA_4    0x2f24          /* E5 v3 DMA */
+#define        PCI_PRODUCT_INTEL_E5V3_DMA_5    0x2f25          /* E5 v3 DMA */
+#define        PCI_PRODUCT_INTEL_E5V3_DMA_6    0x2f26          /* E5 v3 DMA */
+#define        PCI_PRODUCT_INTEL_E5V3_DMA_7    0x2f27          /* E5 v3 DMA */
+#define        PCI_PRODUCT_INTEL_E5V3_ADDRMAP  0x2f28          /* E5 v3 Address Map */
+#define        PCI_PRODUCT_INTEL_E5V3_HOTPLUG  0x2f29          /* E5 v3 Hot Plug */
+#define        PCI_PRODUCT_INTEL_E5V3_ERR      0x2f2a          /* E5 v3 Error Reporting */
+#define        PCI_PRODUCT_INTEL_E5V3_IOAPIC   0x2f2c          /* E5 v3 I/O APIC */
+#define        PCI_PRODUCT_INTEL_E5V3_HA_1     0x2f30          /* E5 v3 Home Agent */
+#define        PCI_PRODUCT_INTEL_E5V3_QPI_0    0x2f32          /* E5 v3 QPI */
+#define        PCI_PRODUCT_INTEL_E5V3_QPI_1    0x2f33          /* E5 v3 QPI */
+#define        PCI_PRODUCT_INTEL_E5V3_PCIEMON  0x2f34          /* E5 v3 PCIE Monitor */
+#define        PCI_PRODUCT_INTEL_E5V3_QPIMON_1 0x2f36          /* E5 v3 QPI Monitor */
+#define        PCI_PRODUCT_INTEL_E5V3_QPIMON_2 0x2f37          /* E5 v3 QPI Monitor */
+#define        PCI_PRODUCT_INTEL_E5V3_TA       0x2f68          /* E5 v3 TA */
+#define        PCI_PRODUCT_INTEL_E5V3_CBROADCAST_1     0x2f6e          /* E5 v3 DDR Broadcast */
+#define        PCI_PRODUCT_INTEL_E5V3_GBROADCAST_1     0x2f6f          /* E5 v3 DDR Broadcast */
+#define        PCI_PRODUCT_INTEL_E5V3_HA_DEBUG_1       0x2f70          /* E5 v3 Home Agent Debug */
+#define        PCI_PRODUCT_INTEL_E5V3_RAS      0x2f71          /* E5 v3 RAS */
+#define        PCI_PRODUCT_INTEL_E5V3_SCRATCH_3        0x2f7d          /* E5 v3 Scratch */
+#define        PCI_PRODUCT_INTEL_E5V3_QPI_2    0x2f80          /* E5 v3 QPI */
+#define        PCI_PRODUCT_INTEL_E5V3_QPIMON_3 0x2f81          /* E5 v3 QPI Monitor */
+#define        PCI_PRODUCT_INTEL_E5V3_QPI_3    0x2f83          /* E5 v3 QPI */
+#define        PCI_PRODUCT_INTEL_E5V3_VCU_1    0x2f88          /* E5 v3 VCU */
+#define        PCI_PRODUCT_INTEL_E5V3_VCU_2    0x2f8a          /* E5 v3 VCU */
+#define        PCI_PRODUCT_INTEL_E5V3_QPI_4    0x2f90          /* E5 v3 QPI */
+#define        PCI_PRODUCT_INTEL_E5V3_QPI_5    0x2f93          /* E5 v3 QPI */
+#define        PCI_PRODUCT_INTEL_E5V3_PCU_1    0x2f98          /* E5 v3 PCU */
+#define        PCI_PRODUCT_INTEL_E5V3_PCU_2    0x2f99          /* E5 v3 PCU */
+#define        PCI_PRODUCT_INTEL_E5V3_PCU_3    0x2f9a          /* E5 v3 PCU */
+#define        PCI_PRODUCT_INTEL_E5V3_PCU_4    0x2f9c          /* E5 v3 PCU */
+#define        PCI_PRODUCT_INTEL_E5V3_HA_2     0x2fa0          /* E5 v3 Home Agent */
+#define        PCI_PRODUCT_INTEL_E5V3_MEM      0x2fa8          /* E5 v3 Memory */
+#define        PCI_PRODUCT_INTEL_E5V3_TAD_1    0x2faa          /* E5 v3 TAD */
+#define        PCI_PRODUCT_INTEL_E5V3_TAD_2    0x2fab          /* E5 v3 TAD */
+#define        PCI_PRODUCT_INTEL_E5V3_TAD_3    0x2fac          /* E5 v3 TAD */
+#define        PCI_PRODUCT_INTEL_E5V3_TAD_4    0x2fad          /* E5 v3 TAD */
+#define        PCI_PRODUCT_INTEL_E5V3_CBROADCAST_2     0x2fae          /* E5 v3 DDR Broadcast */
+#define        PCI_PRODUCT_INTEL_E5V3_GBROADCAST_2     0x2faf          /* E5 v3 DDR Broadcast */
+#define        PCI_PRODUCT_INTEL_E5V3_THERMAL_1        0x2fb0          /* E5 v3 Thermal */
+#define        PCI_PRODUCT_INTEL_E5V3_THERMAL_2        0x2fb1          /* E5 v3 Thermal */
+#define        PCI_PRODUCT_INTEL_E5V3_ERROR_1  0x2fb2          /* E5 v3 Error */
+#define        PCI_PRODUCT_INTEL_E5V3_ERROR_2  0x2fb3          /* E5 v3 Error */
+#define        PCI_PRODUCT_INTEL_E5V3_THERMAL_3        0x2fb4          /* E5 v3 Thermal */
+#define        PCI_PRODUCT_INTEL_E5V3_THERMAL_4        0x2fb5          /* E5 v3 Thermal */
+#define        PCI_PRODUCT_INTEL_E5V3_ERROR_3  0x2fb6          /* E5 v3 Error */
+#define        PCI_PRODUCT_INTEL_E5V3_ERROR_4  0x2fb7          /* E5 v3 Error */
+#define        PCI_PRODUCT_INTEL_E5V3_DDRIO_1  0x2fb8          /* E5 v3 DDRIO */
+#define        PCI_PRODUCT_INTEL_E5V3_DDRIO_2  0x2fb9          /* E5 v3 DDRIO */
+#define        PCI_PRODUCT_INTEL_E5V3_DDRIO_3  0x2fba          /* E5 v3 DDRIO */
+#define        PCI_PRODUCT_INTEL_E5V3_DDRIO_4  0x2fbb          /* E5 v3 DDRIO */
+#define        PCI_PRODUCT_INTEL_E5V3_DDRIO_5  0x2fbc          /* E5 v3 DDRIO */
+#define        PCI_PRODUCT_INTEL_E5V3_DDRIO_6  0x2fbd          /* E5 v3 DDRIO */
+#define        PCI_PRODUCT_INTEL_E5V3_DDRIO_7  0x2fbe          /* E5 v3 DDRIO */
+#define        PCI_PRODUCT_INTEL_E5V3_DDRIO_8  0x2fbf          /* E5 v3 DDRIO */
+#define        PCI_PRODUCT_INTEL_E5V3_PCU_5    0x2fc0          /* E5 v3 PCU */
+#define        PCI_PRODUCT_INTEL_E5V3_THERMAL_5        0x2fd0          /* E5 v3 Thermal */
+#define        PCI_PRODUCT_INTEL_E5V3_THERMAL_6        0x2fd1          /* E5 v3 Thermal */
+#define        PCI_PRODUCT_INTEL_E5V3_ERROR_5  0x2fd2          /* E5 v3 Error */
+#define        PCI_PRODUCT_INTEL_E5V3_ERROR_6  0x2fd3          /* E5 v3 Error */
+#define        PCI_PRODUCT_INTEL_E5V3_THERMAL_7        0x2fd4          /* E5 v3 Thermal */
+#define        PCI_PRODUCT_INTEL_E5V3_THERMAL_8        0x2fd5          /* E5 v3 Thermal */
+#define        PCI_PRODUCT_INTEL_E5V3_ERROR_7  0x2fd6          /* E5 v3 Error */
+#define        PCI_PRODUCT_INTEL_E5V3_ERROR_8  0x2fd7          /* E5 v3 Error */
+#define        PCI_PRODUCT_INTEL_E5V3_UNICAST_1        0x2fe0          /* E5 v3 Unicast */
+#define        PCI_PRODUCT_INTEL_E5V3_UNICAST_2        0x2fe1          /* E5 v3 Unicast */
+#define        PCI_PRODUCT_INTEL_E5V3_UNICAST_3        0x2fe2          /* E5 v3 Unicast */
+#define        PCI_PRODUCT_INTEL_E5V3_UNICAST_4        0x2fe3          /* E5 v3 Unicast */
+#define        PCI_PRODUCT_INTEL_E5V3_UNICAST_5        0x2fe4          /* E5 v3 Unicast */
+#define        PCI_PRODUCT_INTEL_E5V3_UNICAST_6        0x2fe5          /* E5 v3 Unicast */
+#define        PCI_PRODUCT_INTEL_E5V3_UNICAST_7        0x2fe6          /* E5 v3 Unicast */
+#define        PCI_PRODUCT_INTEL_E5V3_UNICAST_8        0x2fe7          /* E5 v3 Unicast */
+#define        PCI_PRODUCT_INTEL_E5V3_UNICAST_9        0x2fe8          /* E5 v3 Unicast */
+#define        PCI_PRODUCT_INTEL_E5V3_UNICAST_10       0x2fe9          /* E5 v3 Unicast */
+#define        PCI_PRODUCT_INTEL_E5V3_UNICAST_11       0x2fea          /* E5 v3 Unicast */
+#define        PCI_PRODUCT_INTEL_E5V3_UNICAST_12       0x2feb          /* E5 v3 Unicast */
+#define        PCI_PRODUCT_INTEL_E5V3_UNICAST_13       0x2fec          /* E5 v3 Unicast */
+#define        PCI_PRODUCT_INTEL_E5V3_UNICAST_14       0x2fed          /* E5 v3 Unicast */
+#define        PCI_PRODUCT_INTEL_E5V3_UNICAST_15       0x2fee          /* E5 v3 Unicast */
+#define        PCI_PRODUCT_INTEL_E5V3_UNICAST_16       0x2fef          /* E5 v3 Unicast */
+#define        PCI_PRODUCT_INTEL_E5V3_UNICAST_17       0x2ff0          /* E5 v3 Unicast */
+#define        PCI_PRODUCT_INTEL_E5V3_UNICAST_18       0x2ff1          /* E5 v3 Unicast */
+#define        PCI_PRODUCT_INTEL_E5V3_UNICAST_19       0x2ff2          /* E5 v3 Unicast */
+#define        PCI_PRODUCT_INTEL_E5V3_UNICAST_20       0x2ff3          /* E5 v3 Unicast */
+#define        PCI_PRODUCT_INTEL_E5V3_UNICAST_21       0x2ff4          /* E5 v3 Unicast */
+#define        PCI_PRODUCT_INTEL_E5V3_UNICAST_22       0x2ff5          /* E5 v3 Unicast */
+#define        PCI_PRODUCT_INTEL_E5V3_UNICAST_23       0x2ff6          /* E5 v3 Unicast */
+#define        PCI_PRODUCT_INTEL_E5V3_UNICAST_24       0x2ff7          /* E5 v3 Unicast */
+#define        PCI_PRODUCT_INTEL_E5V3_RA_1     0x2ff8          /* E5 v3 Ring Agent */
+#define        PCI_PRODUCT_INTEL_E5V3_RA_2     0x2ff9          /* E5 v3 Ring Agent */
+#define        PCI_PRODUCT_INTEL_E5V3_RA_3     0x2ffa          /* E5 v3 Ring Agent */
+#define        PCI_PRODUCT_INTEL_E5V3_RA_4     0x2ffb          /* E5 v3 Ring Agent */
+#define        PCI_PRODUCT_INTEL_E5V3_SAD_1    0x2ffc          /* E5 v3 SAD */
+#define        PCI_PRODUCT_INTEL_E5V3_SAD_2    0x2ffd          /* E5 v3 SAD */
+#define        PCI_PRODUCT_INTEL_E5V3_SAD_3    0x2ffe          /* E5 v3 SAD */
 #define        PCI_PRODUCT_INTEL_RCU32 0x3092          /* RCU32 I2O RAID */
 #define        PCI_PRODUCT_INTEL_3124  0x3124          /* 3124 SATA */
 #define        PCI_PRODUCT_INTEL_31244 0x3200          /* 31244 SATA */
@@ -4392,6 +4505,33 @@
 #define        PCI_PRODUCT_INTEL_9SERIES_KT    0x8cbd          /* 9 Series KT */
 #define        PCI_PRODUCT_INTEL_Z97_LPC       0x8cc4          /* Z97 LPC */
 #define        PCI_PRODUCT_INTEL_H97_LPC       0x8cc6          /* H97 LPC */
+#define        PCI_PRODUCT_INTEL_C610_SATA_1   0x8d00          /* C610 SATA */
+#define        PCI_PRODUCT_INTEL_C610_AHCI_1   0x8d02          /* C610 AHCI */
+#define        PCI_PRODUCT_INTEL_C610_RAID_1   0x8d06          /* C610 RAID */
+#define        PCI_PRODUCT_INTEL_C610_SATA_2   0x8d08          /* C610 SATA */
+#define        PCI_PRODUCT_INTEL_C610_PCIE_1   0x8d10          /* C610 PCIE */
+#define        PCI_PRODUCT_INTEL_C610_PCIE_2   0x8d12          /* C610 PCIE */
+#define        PCI_PRODUCT_INTEL_C610_PCIE_3   0x8d14          /* C610 PCIE */
+#define        PCI_PRODUCT_INTEL_C610_PCIE_4   0x8d16          /* C610 PCIE */
+#define        PCI_PRODUCT_INTEL_C610_PCIE_5   0x8d18          /* C610 PCIE */
+#define        PCI_PRODUCT_INTEL_C610_PCIE_6   0x8d1a          /* C610 PCIE */
+#define        PCI_PRODUCT_INTEL_C610_PCIE_7   0x8d1c          /* C610 PCIE */
+#define        PCI_PRODUCT_INTEL_C610_PCIE_8   0x8d1e          /* C610 PCIE */
+#define        PCI_PRODUCT_INTEL_C610_SMB      0x8d22          /* C610 SMBus */
+#define        PCI_PRODUCT_INTEL_C610_EHCI_1   0x8d26          /* C610 USB */
+#define        PCI_PRODUCT_INTEL_C610_EHCI_2   0x8d2d          /* C610 USB */
+#define        PCI_PRODUCT_INTEL_C610_XHCI     0x8d31          /* C610 xHCI */
+#define        PCI_PRODUCT_INTEL_C610_MEI_1    0x8d3a          /* C610 MEI */
+#define        PCI_PRODUCT_INTEL_C610_MEI_2    0x8d3b          /* C610 MEI */
+#define        PCI_PRODUCT_INTEL_C610_LPC      0x8d44          /* C610 LPC */
+#define        PCI_PRODUCT_INTEL_X99_LPC       0x8d47          /* X99 LPC */
+#define        PCI_PRODUCT_INTEL_C610_SATA_3   0x8d60          /* C610 SATA */
+#define        PCI_PRODUCT_INTEL_C610_AHCI_2   0x8d62          /* C610 AHCI */
+#define        PCI_PRODUCT_INTEL_C610_RAID_2   0x8d66          /* C610 RAID */
+#define        PCI_PRODUCT_INTEL_C610_MS_SPSR  0x8d7c          /* C610 MS SPSR */
+#define        PCI_PRODUCT_INTEL_C610_MS_SMB_1 0x8d7d          /* C610 MS SMBus */
+#define        PCI_PRODUCT_INTEL_C610_MS_SMB_2 0x8d7e          /* C610 MS SMBus */
+#define        PCI_PRODUCT_INTEL_C610_MS_SMB_3 0x8d7f          /* C610 MS SMBus */
 #define        PCI_PRODUCT_INTEL_I2OPCIB       0x9620          /* I2O RAID */
 #define        PCI_PRODUCT_INTEL_RCU21 0x9621          /* RCU21 I2O RAID */
 #define        PCI_PRODUCT_INTEL_RCUxx 0x9622          /* RCUxx I2O RAID */

diff --git a/sys/dev/pci/pcidevs_data.h b/sys/dev/pci/pcidevs_data.h
index 48802e1..e7c47c6 100644 (file)
--- a/sys/dev/pci/pcidevs_data.h
+++ b/sys/dev/pci/pcidevs_data.h
@@ -2,7 +2,7 @@
  * THIS FILE AUTOMATICALLY GENERATED.  DO NOT EDIT.
  *
  * generated from:
- *     OpenBSD: pcidevs,v 1.1752 2014/12/07 03:59:25 deraadt Exp 
+ *     OpenBSD: pcidevs,v 1.1753 2015/01/09 07:27:25 jsg Exp 
  */
 
 /*     $NetBSD: pcidevs,v 1.30 1997/06/24 06:20:24 thorpej Exp $       */
@@ -9283,6 +9283,10 @@ static const struct pci_known_product pci_known_products[] = {
            PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE4G_D_SDV_GT1,
            "HD Graphics",
        },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE4G_HB_3,
+           "Core 4G Host",
+       },
        {
            PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE4G_PCIE_2,
            "Core 4G PCIE",
@@ -13111,6 +13115,454 @@ static const struct pci_known_product pci_known_products[] = {
            PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82B43_IGD_2,
            "B43 Video",
        },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_HB,
+           "E5 v3 Host",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_PCIE_1,
+           "E5 v3 PCIE",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_PCIE_2,
+           "E5 v3 PCIE",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_PCIE_3,
+           "E5 v3 PCIE",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_PCIE_4,
+           "E5 v3 PCIE",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_PCIE_5,
+           "E5 v3 PCIE",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_PCIE_6,
+           "E5 v3 PCIE",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_PCIE_7,
+           "E5 v3 PCIE",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_PCIE_8,
+           "E5 v3 PCIE",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_PCIE_9,
+           "E5 v3 PCIE",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_PCIERING,
+           "E5 v3 PCIE Ring",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_SCRATCH_1,
+           "E5 v3 Scratch",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_SCRATCH_2,
+           "E5 v3 Scratch",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_DMA_0,
+           "E5 v3 DMA",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_DMA_1,
+           "E5 v3 DMA",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_DMA_2,
+           "E5 v3 DMA",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_DMA_3,
+           "E5 v3 DMA",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_DMA_4,
+           "E5 v3 DMA",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_DMA_5,
+           "E5 v3 DMA",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_DMA_6,
+           "E5 v3 DMA",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_DMA_7,
+           "E5 v3 DMA",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_ADDRMAP,
+           "E5 v3 Address Map",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_HOTPLUG,
+           "E5 v3 Hot Plug",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_ERR,
+           "E5 v3 Error Reporting",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_IOAPIC,
+           "E5 v3 I/O APIC",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_HA_1,
+           "E5 v3 Home Agent",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_QPI_0,
+           "E5 v3 QPI",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_QPI_1,
+           "E5 v3 QPI",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_PCIEMON,
+           "E5 v3 PCIE Monitor",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_QPIMON_1,
+           "E5 v3 QPI Monitor",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_QPIMON_2,
+           "E5 v3 QPI Monitor",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_TA,
+           "E5 v3 TA",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_CBROADCAST_1,
+           "E5 v3 DDR Broadcast",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_GBROADCAST_1,
+           "E5 v3 DDR Broadcast",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_HA_DEBUG_1,
+           "E5 v3 Home Agent Debug",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_RAS,
+           "E5 v3 RAS",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_SCRATCH_3,
+           "E5 v3 Scratch",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_QPI_2,
+           "E5 v3 QPI",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_QPIMON_3,
+           "E5 v3 QPI Monitor",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_QPI_3,
+           "E5 v3 QPI",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_VCU_1,
+           "E5 v3 VCU",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_VCU_2,
+           "E5 v3 VCU",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_QPI_4,
+           "E5 v3 QPI",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_QPI_5,
+           "E5 v3 QPI",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_PCU_1,
+           "E5 v3 PCU",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_PCU_2,
+           "E5 v3 PCU",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_PCU_3,
+           "E5 v3 PCU",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_PCU_4,
+           "E5 v3 PCU",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_HA_2,
+           "E5 v3 Home Agent",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_MEM,
+           "E5 v3 Memory",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_TAD_1,
+           "E5 v3 TAD",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_TAD_2,
+           "E5 v3 TAD",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_TAD_3,
+           "E5 v3 TAD",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_TAD_4,
+           "E5 v3 TAD",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_CBROADCAST_2,
+           "E5 v3 DDR Broadcast",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_GBROADCAST_2,
+           "E5 v3 DDR Broadcast",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_THERMAL_1,
+           "E5 v3 Thermal",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_THERMAL_2,
+           "E5 v3 Thermal",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_ERROR_1,
+           "E5 v3 Error",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_ERROR_2,
+           "E5 v3 Error",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_THERMAL_3,
+           "E5 v3 Thermal",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_THERMAL_4,
+           "E5 v3 Thermal",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_ERROR_3,
+           "E5 v3 Error",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_ERROR_4,
+           "E5 v3 Error",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_DDRIO_1,
+           "E5 v3 DDRIO",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_DDRIO_2,
+           "E5 v3 DDRIO",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_DDRIO_3,
+           "E5 v3 DDRIO",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_DDRIO_4,
+           "E5 v3 DDRIO",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_DDRIO_5,
+           "E5 v3 DDRIO",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_DDRIO_6,
+           "E5 v3 DDRIO",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_DDRIO_7,
+           "E5 v3 DDRIO",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_DDRIO_8,
+           "E5 v3 DDRIO",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_PCU_5,
+           "E5 v3 PCU",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_THERMAL_5,
+           "E5 v3 Thermal",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_THERMAL_6,
+           "E5 v3 Thermal",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_ERROR_5,
+           "E5 v3 Error",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_ERROR_6,
+           "E5 v3 Error",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_THERMAL_7,
+           "E5 v3 Thermal",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_THERMAL_8,
+           "E5 v3 Thermal",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_ERROR_7,
+           "E5 v3 Error",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_ERROR_8,
+           "E5 v3 Error",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_UNICAST_1,
+           "E5 v3 Unicast",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_UNICAST_2,
+           "E5 v3 Unicast",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_UNICAST_3,
+           "E5 v3 Unicast",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_UNICAST_4,
+           "E5 v3 Unicast",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_UNICAST_5,
+           "E5 v3 Unicast",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_UNICAST_6,
+           "E5 v3 Unicast",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_UNICAST_7,
+           "E5 v3 Unicast",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_UNICAST_8,
+           "E5 v3 Unicast",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_UNICAST_9,
+           "E5 v3 Unicast",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_UNICAST_10,
+           "E5 v3 Unicast",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_UNICAST_11,
+           "E5 v3 Unicast",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_UNICAST_12,
+           "E5 v3 Unicast",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_UNICAST_13,
+           "E5 v3 Unicast",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_UNICAST_14,
+           "E5 v3 Unicast",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_UNICAST_15,
+           "E5 v3 Unicast",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_UNICAST_16,
+           "E5 v3 Unicast",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_UNICAST_17,
+           "E5 v3 Unicast",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_UNICAST_18,
+           "E5 v3 Unicast",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_UNICAST_19,
+           "E5 v3 Unicast",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_UNICAST_20,
+           "E5 v3 Unicast",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_UNICAST_21,
+           "E5 v3 Unicast",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_UNICAST_22,
+           "E5 v3 Unicast",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_UNICAST_23,
+           "E5 v3 Unicast",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_UNICAST_24,
+           "E5 v3 Unicast",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_RA_1,
+           "E5 v3 Ring Agent",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_RA_2,
+           "E5 v3 Ring Agent",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_RA_3,
+           "E5 v3 Ring Agent",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_RA_4,
+           "E5 v3 Ring Agent",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_SAD_1,
+           "E5 v3 SAD",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_SAD_2,
+           "E5 v3 SAD",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V3_SAD_3,
+           "E5 v3 SAD",
+       },
        {
            PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_RCU32,
            "RCU32 I2O RAID",
@@ -15095,6 +15547,114 @@ static const struct pci_known_product pci_known_products[] = {
            PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_H97_LPC,
            "H97 LPC",
        },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C610_SATA_1,
+           "C610 SATA",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C610_AHCI_1,
+           "C610 AHCI",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C610_RAID_1,
+           "C610 RAID",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C610_SATA_2,
+           "C610 SATA",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C610_PCIE_1,
+           "C610 PCIE",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C610_PCIE_2,
+           "C610 PCIE",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C610_PCIE_3,
+           "C610 PCIE",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C610_PCIE_4,
+           "C610 PCIE",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C610_PCIE_5,
+           "C610 PCIE",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C610_PCIE_6,
+           "C610 PCIE",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C610_PCIE_7,
+           "C610 PCIE",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C610_PCIE_8,
+           "C610 PCIE",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C610_SMB,
+           "C610 SMBus",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C610_EHCI_1,
+           "C610 USB",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C610_EHCI_2,
+           "C610 USB",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C610_XHCI,
+           "C610 xHCI",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C610_MEI_1,
+           "C610 MEI",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C610_MEI_2,
+           "C610 MEI",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C610_LPC,
+           "C610 LPC",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_X99_LPC,
+           "X99 LPC",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C610_SATA_3,
+           "C610 SATA",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C610_AHCI_2,
+           "C610 AHCI",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C610_RAID_2,
+           "C610 RAID",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C610_MS_SPSR,
+           "C610 MS SPSR",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C610_MS_SMB_1,
+           "C610 MS SMBus",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C610_MS_SMB_2,
+           "C610 MS SMBus",
+       },
+       {
+           PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C610_MS_SMB_3,
+           "C610 MS SMBus",
+       },
        {
            PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I2OPCIB,
            "I2O RAID",