rw_init(&adev->grbm_idx_mutex, "grbmidx");
rw_init(&adev->mn_lock, "agpumn");
rw_init(&adev->virt.vf_errors.lock, "vferr");
+ rw_init(&adev->virt.rlcg_reg_lock, "vrlcg");
hash_init(adev->mn_hash);
rw_init(&adev->psp.mutex, "agpsp");
rw_init(&adev->notifier_lock, "agnf");
scratch_reg1 = (void __iomem *)adev->rmmio + 4 * reg_access_ctrl->scratch_reg1;
scratch_reg2 = (void __iomem *)adev->rmmio + 4 * reg_access_ctrl->scratch_reg2;
scratch_reg3 = (void __iomem *)adev->rmmio + 4 * reg_access_ctrl->scratch_reg3;
+
+ mutex_lock(&adev->virt.rlcg_reg_lock);
+
if (reg_access_ctrl->spare_int)
spare_int = (void __iomem *)adev->rmmio + 4 * reg_access_ctrl->spare_int;
}
ret = readl(scratch_reg0);
+
+ mutex_unlock(&adev->virt.rlcg_reg_lock);
+
return ret;
}
/* the ucode id to signal the autoload */
uint32_t autoload_ucode_id;
+
+ struct rwlock rlcg_reg_lock;
};
struct amdgpu_video_codec_info;