More fixes from Scott Reynolds:

>For small writes, use PIO rather than PDMA; this increases the reliability
>of the driver (considerably, on some systems/targets).

diff --git a/sys/arch/mac68k/dev/sbc.c b/sys/arch/mac68k/dev/sbc.c
index 0f4f866..a30640d 100644 (file)
--- a/sys/arch/mac68k/dev/sbc.c
+++ b/sys/arch/mac68k/dev/sbc.c
@@ -1,5 +1,5 @@
-/*     $OpenBSD: sbc.c,v 1.9 1997/04/08 00:26:15 gene Exp $    */
-/*     $NetBSD: sbc.c,v 1.22 1997/03/01 20:18:58 scottr Exp $  */
+/*     $OpenBSD: sbc.c,v 1.10 1997/04/18 21:58:54 gene Exp $   */
+/*     $NetBSD: sbc.c,v 1.24 1997/04/18 17:38:08 scottr Exp $  */
 
 /*
  * Copyright (C) 1996 Scott Reynolds.  All rights reserved.
@@ -75,7 +75,7 @@
 
 int    sbc_debug = 0 /* | SBC_DB_INTR | SBC_DB_DMA */;
 int    sbc_link_flags = 0 /* | SDEV_DB2 */;
-int    sbc_options = SBC_PDMA;
+int    sbc_options = 0 /* | SBC_PDMA */;
 
 static void    sbc_minphys __P((struct buf *bp));
 
@@ -234,16 +234,16 @@ sbc_pdma_in(ncr_sc, phase, datalen, data)
        u_char *data;
 {
        struct sbc_softc *sc = (struct sbc_softc *)ncr_sc;
-       volatile long *long_data = (long *)sc->sc_drq_addr;
-       volatile u_char *byte_data = (u_char *)sc->sc_nodrq_addr;
+       volatile u_int32_t *long_data = (u_int32_t *)sc->sc_drq_addr;
+       volatile u_int8_t *byte_data = (u_int8_t *)sc->sc_nodrq_addr;
        int resid, s;
 
        s = splbio();
        *ncr_sc->sci_mode |= SCI_MODE_DMA;
        *ncr_sc->sci_irecv = 0;
 
-#define R4     *((long *)data)++ = *long_data
-#define R1     *data++ = *byte_data
+#define R4     *((u_int32_t *)data)++ = *long_data++
+#define R1     *data++ = *byte_data++
        for (resid = datalen; resid >= 128; resid -= 128) {
                if (sbc_ready(ncr_sc) == 0)
                        goto interrupt;
@@ -251,6 +251,9 @@ sbc_pdma_in(ncr_sc, phase, datalen, data)
                R4; R4; R4; R4; R4; R4; R4; R4;
                R4; R4; R4; R4; R4; R4; R4; R4;
                R4; R4; R4; R4; R4; R4; R4; R4;
+
+               long_data = (u_int32_t *)sc->sc_drq_addr;
+               byte_data = (u_int8_t *)sc->sc_nodrq_addr;
        }
        while (resid) {
                if (sbc_ready(ncr_sc) == 0)
@@ -276,11 +279,14 @@ sbc_pdma_out(ncr_sc, phase, datalen, data)
        u_char *data;
 {
        struct sbc_softc *sc = (struct sbc_softc *)ncr_sc;
-       volatile long *long_data = (long *)sc->sc_drq_addr;
-       volatile u_char *byte_data = (u_char *)sc->sc_nodrq_addr;
+       volatile u_int32_t *long_data = (u_int32_t *)sc->sc_drq_addr;
+       volatile u_int8_t *byte_data = (u_int8_t *)sc->sc_nodrq_addr;
        int i, s, resid;
        u_char icmd;
 
+       if (datalen < 64)
+               return ncr5380_pio_out(ncr_sc, phase, datalen, data);
+
        s = splbio();
        icmd = *(ncr_sc->sci_icmd) & SCI_ICMD_RMASK;
        *ncr_sc->sci_icmd = icmd | SCI_ICMD_DATA;
@@ -291,8 +297,8 @@ sbc_pdma_out(ncr_sc, phase, datalen, data)
        if (sbc_ready(ncr_sc) == 0)
                goto interrupt;
 
-#define W1     *byte_data = *data++
-#define W4     *long_data = *((long*)data)++
+#define W1     *byte_data++ = *data++
+#define W4     *long_data++ = *((u_int32_t *)data)++
        while (resid >= 64) {
                if (sbc_ready(ncr_sc) == 0)
                        goto interrupt;
@@ -317,6 +323,9 @@ sbc_pdma_out(ncr_sc, phase, datalen, data)
                W4; W4; W4; W4;
                W4; W4; W4;
                resid -= 60;
+
+               long_data = (u_int32_t *)sc->sc_drq_addr;
+               byte_data = (u_int8_t *)sc->sc_nodrq_addr;
        }
        for (; resid; resid--) {
                if (sbc_ready(ncr_sc) == 0)
@@ -371,8 +380,8 @@ sbc_drq_intr(p)
        void *p;
 {
        extern int *nofault, mac68k_buserr_addr;
-       struct sbc_softc *sc = (struct sbc_softc *) p;
-       struct ncr5380_softc *ncr_sc = (struct ncr5380_softc *) p;
+       struct sbc_softc *sc = (struct sbc_softc *)p;
+       struct ncr5380_softc *ncr_sc = (struct ncr5380_softc *)p;
        struct sci_req *sr = ncr_sc->sc_current;
        struct sbc_pdma_handle *dh = sr->sr_dma_hand;
        label_t faultbuf;
@@ -404,11 +413,11 @@ sbc_drq_intr(p)
         */
        nofault = (int *) &faultbuf;
 
-       if (setjmp((label_t *) nofault)) {
+       if (setjmp((label_t *)nofault)) {
                nofault = (int *) 0;
                if ((dh->dh_flags & SBC_DH_DONE) == 0) {
-                       count = ((  (u_long) mac68k_buserr_addr
-                                 - (u_long) sc->sc_drq_addr));
+                       count = ((  (u_long)mac68k_buserr_addr
+                                 - (u_long)sc->sc_drq_addr));
 
                        if ((count < 0) || (count > dh->dh_len)) {
                                printf("%s: complete=0x%x (pending 0x%x)\n",
@@ -437,10 +446,10 @@ sbc_drq_intr(p)
                 * Get the source address aligned.
                 */
                resid =
-                   count = min(dh->dh_len, 4 - (((int) dh->dh_addr) & 0x3));
+                   count = min(dh->dh_len, 4 - (((int)dh->dh_addr) & 0x3));
                if (count && count < 4) {
-                       drq = (volatile u_int8_t *) sc->sc_drq_addr;
-                       data = (u_int8_t *) dh->dh_addr;
+                       drq = (volatile u_int8_t *)sc->sc_drq_addr;
+                       data = (u_int8_t *)dh->dh_addr;
 
 #define W1             *drq++ = *data++
                        while (count) {
@@ -456,8 +465,8 @@ sbc_drq_intr(p)
                 */
                while (dh->dh_len) {
                        dcount = count = min(dh->dh_len, MAX_DMA_LEN);
-                       long_drq = (volatile u_int32_t *) sc->sc_drq_addr;
-                       long_data = (u_int32_t *) dh->dh_addr;
+                       long_drq = (volatile u_int32_t *)sc->sc_drq_addr;
+                       long_data = (u_int32_t *)dh->dh_addr;
 
 #define W4             *long_drq++ = *long_data++
                        while (count >= 64) {
@@ -469,16 +478,16 @@ sbc_drq_intr(p)
                                W4; count -= 4;
                        }
 #undef W4
-                       data = (u_int8_t *) long_data;
-                       drq = (u_int8_t *) long_drq;
+                       data = (u_int8_t *)long_data;
+                       drq = (u_int8_t *)long_drq;
 #else /* notyet */
                /*
                 * Start the transfer.
                 */
                while (dh->dh_len) {
                        dcount = count = min(dh->dh_len, MAX_DMA_LEN);
-                       drq = (volatile u_int8_t *) sc->sc_drq_addr;
-                       data = (u_int8_t *) dh->dh_addr;
+                       drq = (volatile u_int8_t *)sc->sc_drq_addr;
+                       data = (u_int8_t *)dh->dh_addr;
 #endif /* notyet */
 
 #define W1             *drq++ = *data++
@@ -502,7 +511,7 @@ sbc_drq_intr(p)
                        while ((*ncr_sc->sci_csr & SCI_CSR_ACK) == 0)
                                ;
 #endif
-                       drq = (volatile u_int8_t *) sc->sc_drq_addr;
+                       drq = (volatile u_int8_t *)sc->sc_drq_addr;
                }
                tmp = *drq;
 #endif
@@ -511,10 +520,10 @@ sbc_drq_intr(p)
                 * Get the dest address aligned.
                 */
                resid =
-                   count = min(dh->dh_len, 4 - (((int) dh->dh_addr) & 0x3));
+                   count = min(dh->dh_len, 4 - (((int)dh->dh_addr) & 0x3));
                if (count && count < 4) {
-                       data = (u_int8_t *) dh->dh_addr;
-                       drq = (volatile u_int8_t *) sc->sc_drq_addr;
+                       data = (u_int8_t *)dh->dh_addr;
+                       drq = (volatile u_int8_t *)sc->sc_drq_addr;
 
 #define R1             *data++ = *drq++
                        while (count) {
@@ -530,8 +539,8 @@ sbc_drq_intr(p)
                 */
                while (dh->dh_len) {
                        dcount = count = min(dh->dh_len, MAX_DMA_LEN);
-                       long_data = (u_int32_t *) dh->dh_addr;
-                       long_drq = (volatile u_int32_t *) sc->sc_drq_addr;
+                       long_data = (u_int32_t *)dh->dh_addr;
+                       long_drq = (volatile u_int32_t *)sc->sc_drq_addr;
 
 #define R4             *long_data++ = *long_drq++
                        while (count >= 64) {
@@ -543,8 +552,8 @@ sbc_drq_intr(p)
                                R4; count -= 4;
                        }
 #undef R4
-                       data = (u_int8_t *) long_data;
-                       drq = (volatile u_int8_t *) long_drq;
+                       data = (u_int8_t *)long_data;
+                       drq = (volatile u_int8_t *)long_drq;
 
 #define R1             *data++ = *drq++
                        while (count) {
@@ -575,7 +584,7 @@ void
 sbc_dma_alloc(ncr_sc)
        struct ncr5380_softc *ncr_sc;
 {
-       struct sbc_softc *sc = (struct sbc_softc *) ncr_sc;
+       struct sbc_softc *sc = (struct sbc_softc *)ncr_sc;
        struct sci_req *sr = ncr_sc->sc_current;
        struct scsi_xfer *xs = sr->sr_xs;
        struct sbc_pdma_handle *dh;
@@ -672,7 +681,7 @@ void
 sbc_dma_start(ncr_sc)
        struct ncr5380_softc *ncr_sc;
 {
-       struct sbc_softc *sc = (struct sbc_softc *) ncr_sc;
+       struct sbc_softc *sc = (struct sbc_softc *)ncr_sc;
        struct sci_req *sr = ncr_sc->sc_current;
        struct sbc_pdma_handle *dh = sr->sr_dma_hand;
 
@@ -717,7 +726,7 @@ void
 sbc_dma_stop(ncr_sc)
        struct ncr5380_softc *ncr_sc;
 {
-       struct sbc_softc *sc = (struct sbc_softc *) ncr_sc;
+       struct sbc_softc *sc = (struct sbc_softc *)ncr_sc;
        struct sci_req *sr = ncr_sc->sc_current;
        struct sbc_pdma_handle *dh = sr->sr_dma_hand;
        int ntrans;