they have a different ID from "real" Cortex-A17 cores.
ok phessler@, patrick@
-/* $OpenBSD: cpu.c,v 1.36 2017/01/05 16:16:17 patrick Exp $ */
+/* $OpenBSD: cpu.c,v 1.37 2017/04/24 18:15:16 kettenis Exp $ */
/* $NetBSD: cpu.c,v 1.56 2004/04/14 04:01:49 bsh Exp $ */
generic_steppings },
{ CPU_ID_CORTEX_A9_R4, CPU_CLASS_ARMv7, "ARM Cortex A9 R4",
generic_steppings },
+ { CPU_ID_CORTEX_A12, CPU_CLASS_ARMv7, "ARM Cortex A12",
+ generic_steppings },
{ CPU_ID_CORTEX_A15, CPU_CLASS_ARMv7, "ARM Cortex A15",
generic_steppings },
{ CPU_ID_CORTEX_A15_R1, CPU_CLASS_ARMv7, "ARM Cortex A15 R1",
-/* $OpenBSD: cpufunc.c,v 1.50 2017/01/06 00:06:02 jsg Exp $ */
+/* $OpenBSD: cpufunc.c,v 1.51 2017/04/24 18:15:16 kettenis Exp $ */
/* $NetBSD: cpufunc.c,v 1.65 2003/11/05 12:53:15 scw Exp $ */
/*
#endif
/* FALLTHROUGH */
case CPU_ID_CORTEX_A7:
+ case CPU_ID_CORTEX_A12:
case CPU_ID_CORTEX_A15:
case CPU_ID_CORTEX_A17:
/* Set SMP to allow LDREX/STREX */
-/* $OpenBSD: armreg.h,v 1.39 2017/01/04 00:40:49 jsg Exp $ */
+/* $OpenBSD: armreg.h,v 1.40 2017/04/24 18:15:16 kettenis Exp $ */
/* $NetBSD: armreg.h,v 1.27 2003/09/06 08:43:02 rearnsha Exp $ */
/*
#define CPU_ID_CORTEX_A9_R3 0x413fc090
#define CPU_ID_CORTEX_A9_R4 0x414fc090
#define CPU_ID_CORTEX_A9_MASK 0xff0ffff0
+#define CPU_ID_CORTEX_A12 0x410fc0d0
+#define CPU_ID_CORTEX_A12_MASK 0xff0ffff0
#define CPU_ID_CORTEX_A15 0x410fc0f0
#define CPU_ID_CORTEX_A15_R1 0x411fc0f0
#define CPU_ID_CORTEX_A15_R2 0x412fc0f0