drm/i915: Bump GLK CDCLK frequency when driving multiple pipes

From Ville Syrjala
9457636a49265bdec14f3b747a4911ea9b7d468c in linux-6.1.y/6.1.64
0cb89cd42fd22bbdec0b046c48f35775f5b88bdb in mainline linux

diff --git a/sys/dev/pci/drm/i915/display/intel_cdclk.c b/sys/dev/pci/drm/i915/display/intel_cdclk.c
index 52529c2..34c0115 100644 (file)
--- a/sys/dev/pci/drm/i915/display/intel_cdclk.c
+++ b/sys/dev/pci/drm/i915/display/intel_cdclk.c
@@ -2368,6 +2368,18 @@ static int intel_compute_min_cdclk(struct intel_cdclk_state *cdclk_state)
        for_each_pipe(dev_priv, pipe)
                min_cdclk = max(cdclk_state->min_cdclk[pipe], min_cdclk);
 
+       /*
+        * Avoid glk_force_audio_cdclk() causing excessive screen
+        * blinking when multiple pipes are active by making sure
+        * CDCLK frequency is always high enough for audio. With a
+        * single active pipe we can always change CDCLK frequency
+        * by changing the cd2x divider (see glk_cdclk_table[]) and
+        * thus a full modeset won't be needed then.
+        */
+       if (IS_GEMINILAKE(dev_priv) && cdclk_state->active_pipes &&
+           !is_power_of_2(cdclk_state->active_pipes))
+               min_cdclk = max(2 * 96000, min_cdclk);
+
        if (min_cdclk > dev_priv->display.cdclk.max_cdclk_freq) {
                drm_dbg_kms(&dev_priv->drm,
                            "required cdclk (%d kHz) exceeds max (%d kHz)\n",