Rework the secondary CPU spinup code to take advantage of the context

parameter that PSCI gives us.

ok patrick@

diff --git a/sys/arch/arm64/arm64/cpu.c b/sys/arch/arm64/arm64/cpu.c
index 6e9df72..daef07d 100644 (file)
--- a/sys/arch/arm64/arm64/cpu.c
+++ b/sys/arch/arm64/arm64/cpu.c
@@ -1,4 +1,4 @@
-/*     $OpenBSD: cpu.c,v 1.79 2023/01/14 23:38:23 kettenis Exp $       */
+/*     $OpenBSD: cpu.c,v 1.80 2023/01/26 13:09:18 kettenis Exp $       */
 
 /*
  * Copyright (c) 2016 Dale Rahn <drahn@dalerahn.com>
@@ -932,6 +932,7 @@ cpu_clockspeed(int *freq)
 
 void cpu_boot_secondary(struct cpu_info *ci);
 void cpu_hatch_secondary(void);
+void cpu_hatch_secondary_spin(void);
 
 void
 cpu_boot_secondary_processors(void)
@@ -953,6 +954,11 @@ cpu_boot_secondary_processors(void)
 void
 cpu_start_spin_table(struct cpu_info *ci, uint64_t start, uint64_t data)
 {
+       extern paddr_t cpu_hatch_ci;
+
+       pmap_extract(pmap_kernel(), (vaddr_t)ci, &cpu_hatch_ci);
+       cpu_dcache_wb_range((vaddr_t)&cpu_hatch_ci, sizeof(paddr_t));
+
        /* this reuses the zero page for the core */
        vaddr_t start_pg = zero_page + (PAGE_SIZE * ci->ci_cpuid);
        paddr_t pa = trunc_page(data);
@@ -970,40 +976,34 @@ cpu_start_spin_table(struct cpu_info *ci, uint64_t start, uint64_t data)
 int
 cpu_start_secondary(struct cpu_info *ci, int method, uint64_t data)
 {
-       extern uint64_t pmap_avail_kvo;
-       extern paddr_t cpu_hatch_ci;
-       paddr_t startaddr;
+       vaddr_t start_va;
+       paddr_t ci_pa, start_pa;
        uint64_t ttbr1;
-       int rc = 0;
-
-       pmap_extract(pmap_kernel(), (vaddr_t)ci, &cpu_hatch_ci);
+       int32_t status;
 
        __asm("mrs %x0, ttbr1_el1": "=r"(ttbr1));
        ci->ci_ttbr1 = ttbr1;
-
-       cpu_dcache_wb_range((vaddr_t)&cpu_hatch_ci, sizeof(paddr_t));
        cpu_dcache_wb_range((vaddr_t)ci, sizeof(*ci));
 
-       startaddr = (vaddr_t)cpu_hatch_secondary + pmap_avail_kvo;
-
        switch (method) {
-       case 1:
-               /* psci  */
 #if NPSCI > 0
-               rc = (psci_cpu_on(ci->ci_mpidr, startaddr, 0) == PSCI_SUCCESS);
+       case 1:
+               /* psci */
+               start_va = (vaddr_t)cpu_hatch_secondary;
+               pmap_extract(pmap_kernel(), start_va, &start_pa);
+               pmap_extract(pmap_kernel(), (vaddr_t)ci, &ci_pa);
+               status = psci_cpu_on(ci->ci_mpidr, start_pa, ci_pa);
+               return (status == PSCI_SUCCESS);
 #endif
-               break;
        case 2:
                /* spin-table */
-               cpu_start_spin_table(ci, startaddr, data);
-               rc = 1;
-               break;
-       default:
-               /* no method to spin up CPU */
-               ci->ci_flags = 0;       /* mark cpu as not AP */
+               start_va = (vaddr_t)cpu_hatch_secondary_spin;
+               pmap_extract(pmap_kernel(), start_va, &start_pa);
+               cpu_start_spin_table(ci, start_pa, data);
+               return 1;
        }
 
-       return rc;
+       return 0;
 }
 
 void

diff --git a/sys/arch/arm64/arm64/locore.S b/sys/arch/arm64/arm64/locore.S
index 450bbe1..057d226 100644 (file)
--- a/sys/arch/arm64/arm64/locore.S
+++ b/sys/arch/arm64/arm64/locore.S
@@ -1,4 +1,4 @@
-/* $OpenBSD: locore.S,v 1.42 2022/12/23 17:31:30 kettenis Exp $ */
+/* $OpenBSD: locore.S,v 1.43 2023/01/26 13:09:18 kettenis Exp $ */
 /*-
  * Copyright (c) 2012-2014 Andrew Turner
  * All rights reserved.
@@ -393,6 +393,12 @@ sigfillsiz:
        .text
 
 #ifdef MULTIPROCESSOR
+       .globl cpu_hatch_secondary_spin
+cpu_hatch_secondary_spin:
+       /* Fetch physical address of CPU info */
+       adrp    x0, cpu_hatch_ci
+       ldr     x0, [x0, :lo12:cpu_hatch_ci]    
+
        .globl cpu_hatch_secondary
 cpu_hatch_secondary:
        /* Drop to EL1 */
@@ -402,10 +408,6 @@ cpu_hatch_secondary:
        bl      get_virt_delta
 
        /* Set up CPU info */
-       adr     x0, .Lcpu_hatch_ci
-       ldr     x0, [x0]
-       sub     x0, x0, x29
-       ldr     x0, [x0]
        ldr     x1, [x0, #CI_SELF]
        msr     tpidr_el1, x1
 
@@ -428,8 +430,6 @@ cpu_hatch_secondary:
        .align 3
 .Lcpu_init_secondary:
        .xword  cpu_init_secondary
-.Lcpu_hatch_ci:
-       .xword  cpu_hatch_ci
 
        .data
        .align 3