drm/amdgpu: correct MEC number for gfx11 APUs
authorjsg <jsg@openbsd.org>
Wed, 25 Jan 2023 02:46:45 +0000 (02:46 +0000)
committerjsg <jsg@openbsd.org>
Wed, 25 Jan 2023 02:46:45 +0000 (02:46 +0000)
From Lang Yu
6da17ac15e354ce483044c924c801a1b25ec8e4a in linux-6.1.y/6.1.8
0ddadc3a2208aedb1b27dbb76d0b4e722b5b527a in mainline linux

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

index b4dbc09..cf561b8 100644 (file)
@@ -1288,10 +1288,8 @@ static int gfx_v11_0_sw_init(void *handle)
 
        switch (adev->ip_versions[GC_HWIP][0]) {
        case IP_VERSION(11, 0, 0):
-       case IP_VERSION(11, 0, 1):
        case IP_VERSION(11, 0, 2):
        case IP_VERSION(11, 0, 3):
-       case IP_VERSION(11, 0, 4):
                adev->gfx.me.num_me = 1;
                adev->gfx.me.num_pipe_per_me = 1;
                adev->gfx.me.num_queue_per_pipe = 1;
@@ -1299,6 +1297,15 @@ static int gfx_v11_0_sw_init(void *handle)
                adev->gfx.mec.num_pipe_per_mec = 4;
                adev->gfx.mec.num_queue_per_pipe = 4;
                break;
+       case IP_VERSION(11, 0, 1):
+       case IP_VERSION(11, 0, 4):
+               adev->gfx.me.num_me = 1;
+               adev->gfx.me.num_pipe_per_me = 1;
+               adev->gfx.me.num_queue_per_pipe = 1;
+               adev->gfx.mec.num_mec = 1;
+               adev->gfx.mec.num_pipe_per_mec = 4;
+               adev->gfx.mec.num_queue_per_pipe = 4;
+               break;
        default:
                adev->gfx.me.num_me = 1;
                adev->gfx.me.num_pipe_per_me = 1;