-/* $OpenBSD: r92creg.h,v 1.16 2017/09/22 13:41:56 kevlo Exp $ */
+/* $OpenBSD: r92creg.h,v 1.17 2018/09/13 09:28:07 kevlo Exp $ */
/*-
* Copyright (c) 2010 Damien Bergamini <damien.bergamini@free.fr>
#define R92C_TCR_ACRC 0x00000100
#define R92C_TCR_CFENDFORM 0x00000200
#define R92C_TCR_ICV 0x00000400
+#define R92C_TCR_ERRSTEN0 0x00001000
+#define R92C_TCR_ERRSTEN1 0x00002000
+#define R92C_TCR_ERRSTEN2 0x00004000
+#define R92C_TCR_ERRSTEN3 0x00008000
/* Bits for R92C_RCR. */
#define R92C_RCR_AAP 0x00000001
* RTL8192CU ROM image.
*/
struct r92c_rom {
- uint16_t id; /* 0x8192 */
+ uint16_t id; /* 0x8129 */
uint8_t reserved1[5];
uint8_t dbg_sel;
uint16_t reserved2;
* RTL8188EU ROM image.
*/
struct r88e_rom {
- uint8_t reserved1[16];
+ uint16_t id;
+ uint8_t reserved1[14];
struct r88e_tx_pwr txpwr;
uint8_t reserved2[156];
uint8_t channel_plan;
0x403c0001, 0x403d0001, 0x403e0001, 0x403f0001, 0xfb400001,
0xfb410001, 0xfb420001, 0xfb430001, 0xfb440001, 0xfb450001,
0xfb460001, 0xfb470001, 0xfb480001, 0xfa490001, 0xf94a0001,
- 0xf84B0001, 0xf74c0001, 0xf64d0001, 0xf54e0001, 0xf44f0001,
+ 0xf84b0001, 0xf74c0001, 0xf64d0001, 0xf54e0001, 0xf44f0001,
0xf3500001, 0xf2510001, 0xf1520001, 0xf0530001, 0xef540001,
0xee550001, 0xed560001, 0xec570001, 0xeb580001, 0xea590001,
0xe95a0001, 0xe85b0001, 0xe75c0001, 0xe65d0001, 0xe55e0001,
-/* $OpenBSD: rtwn.c,v 1.36 2017/10/26 15:00:28 mpi Exp $ */
+/* $OpenBSD: rtwn.c,v 1.37 2018/09/13 09:28:07 kevlo Exp $ */
/*-
* Copyright (c) 2010 Damien Bergamini <damien.bergamini@free.fr>
R92C_HSSI_PARAM2_READ_EDGE);
DELAY(1000);
- rtwn_bb_write(sc, R92C_HSSI_PARAM2(0),
- reg[0] | R92C_HSSI_PARAM2_READ_EDGE);
- DELAY(1000);
+ if (!(sc->chip & RTWN_CHIP_88E)) {
+ rtwn_bb_write(sc, R92C_HSSI_PARAM2(0),
+ reg[0] | R92C_HSSI_PARAM2_READ_EDGE);
+ DELAY(1000);
+ }
if (rtwn_bb_read(sc, R92C_HSSI_PARAM1(chain)) & R92C_HSSI_PARAM1_PI)
val = rtwn_bb_read(sc, R92C_HSPI_READBACK(chain));
-/* $OpenBSD: if_rtwn.c,v 1.31 2018/08/08 09:16:57 kevlo Exp $ */
+/* $OpenBSD: if_rtwn.c,v 1.32 2018/09/13 09:28:07 kevlo Exp $ */
/*-
* Copyright (c) 2010 Damien Bergamini <damien.bergamini@free.fr>
}
/* Initialize MAC. */
- reg = rtwn_pci_read_1(sc, R92C_APSD_CTRL);
rtwn_pci_write_1(sc, R92C_APSD_CTRL,
rtwn_pci_read_1(sc, R92C_APSD_CTRL) & ~R92C_APSD_CTRL_OFF);
for (ntries = 0; ntries < 200; ntries++) {
rtwn_pci_write_2(sc, R92C_TRXDMA_CTRL, reg);
rtwn_pci_write_4(sc, R92C_TCR,
- R92C_TCR_CFENDFORM | (1 << 12) | (1 << 13));
+ R92C_TCR_CFENDFORM | R92C_TCR_ERRSTEN0 | R92C_TCR_ERRSTEN1);
/* Configure Tx DMA. */
rtwn_pci_write_4(sc, R92C_BKQ_DESA,
DELAY(1);
}
- if (rtwn_bb_read(sc, R92C_HSSI_PARAM2(0)) &
- R92C_HSSI_PARAM2_CCK_HIPWR)
+ if (rtwn_bb_read(sc, R92C_HSSI_PARAM2(0)) & R92C_HSSI_PARAM2_CCK_HIPWR)
sc->sc_sc.sc_flags |= RTWN_FLAG_CCK_HIPWR;
}