needs to be aligned on a 128-byte address.
This fixes an issue seen on the PCI controller, where a DMA transfer
scheduled on a odd slot will fail.
-/* $OpenBSD: ufshcireg.h,v 1.4 2024/01/04 21:02:30 mglocker Exp $ */
+/* $OpenBSD: ufshcireg.h,v 1.5 2024/04/19 20:43:33 mglocker Exp $ */
/*
* Copyright (c) 2022 Marcus Glocker <mglocker@openbsd.org>
struct upiu_command cmd;
struct upiu_response rsp;
struct ufshci_ucd_prdt prdt[UFSHCI_UCD_PRDT_MAX_SEGS];
-};
+} __packed __aligned(128);