drm/amd/display: Only use depth 36 bpp linebuffers on DCN display engines.

From Mario Kleiner
cded1186f7e930045fb4ee17dbfa6bae41f3882c in linux 5.15.y/5.15.56
add61d3c31de6a4b5e11a2ab96aaf4c873481568 in mainline linux

diff --git a/sys/dev/pci/drm/amd/display/dc/core/dc_resource.c b/sys/dev/pci/drm/amd/display/dc/core/dc_resource.c
index be7ec70..3ad72dc 100644 (file)
--- a/sys/dev/pci/drm/amd/display/dc/core/dc_resource.c
+++ b/sys/dev/pci/drm/amd/display/dc/core/dc_resource.c
@@ -1062,12 +1062,13 @@ bool resource_build_scaling_params(struct pipe_ctx *pipe_ctx)
         * on certain displays, such as the Sharp 4k. 36bpp is needed
         * to support SURFACE_PIXEL_FORMAT_GRPH_ARGB16161616 and
         * SURFACE_PIXEL_FORMAT_GRPH_ABGR16161616 with actual > 10 bpc
-        * precision on at least DCN display engines. However, at least
-        * Carrizo with DCE_VERSION_11_0 does not like 36 bpp lb depth,
-        * so use only 30 bpp on DCE_VERSION_11_0. Testing with DCE 11.2 and 8.3
-        * did not show such problems, so this seems to be the exception.
+        * precision on DCN display engines, but apparently not for DCE, as
+        * far as testing on DCE-11.2 and DCE-8 showed. Various DCE parts have
+        * problems: Carrizo with DCE_VERSION_11_0 does not like 36 bpp lb depth,
+        * neither do DCE-8 at 4k resolution, or DCE-11.2 (broken identify pixel
+        * passthrough). Therefore only use 36 bpp on DCN where it is actually needed.
         */
-       if (plane_state->ctx->dce_version > DCE_VERSION_11_0)
+       if (plane_state->ctx->dce_version > DCE_VERSION_MAX)
                pipe_ctx->plane_res.scl_data.lb_params.depth = LB_PIXEL_DEPTH_36BPP;
        else
                pipe_ctx->plane_res.scl_data.lb_params.depth = LB_PIXEL_DEPTH_30BPP;