Update for -Wall -Wstrict-prototypes -Wmissing-prototypes -Wno-uninitialized.
Bring back Step9 and fix an oversight from Ken Nakata <kenn@remus.rutgers.edu>
-/* $NetBSD: fpu_add.c,v 1.1 1995/11/03 04:46:58 briggs Exp $ */
+/* $OpenBSD: fpu_add.c,v 1.2 1996/05/09 22:20:42 niklas Exp $ */
+/* $NetBSD: fpu_add.c,v 1.2 1996/04/30 11:52:09 briggs Exp $ */
/*
* Copyright (c) 1992, 1993
*/
#include <sys/types.h>
+#include <sys/systm.h>
#include <machine/reg.h>
-/* $OpenBSD: fpu_calcea.c,v 1.2 1996/02/27 11:03:17 niklas Exp $ */
-/* $NetBSD: fpu_calcea.c,v 1.3 1996/02/04 02:17:38 briggs Exp $ */
+/* $OpenBSD: fpu_calcea.c,v 1.3 1996/05/09 22:20:43 niklas Exp $ */
+/* $NetBSD: fpu_calcea.c,v 1.4 1996/04/30 11:52:11 briggs Exp $ */
/*
* Copyright (c) 1995 Gordon W. Ross
#include <sys/param.h>
#include <sys/signal.h>
+#include <sys/systm.h>
#include <machine/frame.h>
#include "fpu_emulate.h"
int size, int *res));
static int calc_ea __P((struct insn_ea *ea, char *ptr, char **eaddr));
+int fusword __P((void *));
+
/*
* Helper routines for dealing with "effective address" values.
*/
struct insn_ea *ea;
int modreg;
{
- int data, sig;
+ int sig;
#ifdef DEBUG
if (insn->is_datasize < 0) {
struct insn_ea *ea;
int modreg;
{
- int word, extword, idx;
+ int extword, idx;
int basedisp, outerdisp;
int bd_size, od_size;
int sig;
- extword = fusword(frame->f_pc + insn->is_advance);
+ extword = fusword((void *) (frame->f_pc + insn->is_advance));
if (extword < 0) {
return SIGSEGV;
}
int *reg;
char *src;
int len, step;
- int data, word, sig;
+ int sig;
#ifdef DIAGNOSTIC
if (ea->ea_regnum & ~0xF) {
#endif
if (fpu_debug_level & DL_LOADEA) {
- printf(" load_ea: frame at %08x\n", frame);
+ printf(" load_ea: frame at %p\n", frame);
}
/* The dst is always int or larger. */
len = insn->is_datasize;
}
}
if (fpu_debug_level & DL_LOADEA) {
- printf(" load_ea: src 0x%08x\n", src);
+ printf(" load_ea: src %p\n", src);
}
bcopy(src, dst, len);
} else if (ea->ea_flags & EA_IMMED) {
extention word from the opcode */
src = (char *)frame->f_pc + 4;
if (fpu_debug_level & DL_LOADEA) {
- printf(" load_ea: pc relative pc+4 = 0x%08x\n", src);
+ printf(" load_ea: pc relative pc+4 = %p\n", src);
}
} else /* not PC relative */ {
if (fpu_debug_level & DL_LOADEA) {
/* Grab the register contents. */
src = (char *)*reg;
if (fpu_debug_level & DL_LOADEA) {
- printf(" load_ea: reg indirect reg = 0x%08x\n", src);
+ printf(" load_ea: reg indirect reg = %p\n", src);
}
}
int *reg;
char *dst;
int len, step;
- int data, word, sig;
+ int sig;
#ifdef DIAGNOSTIC
if (ea->ea_regnum & ~0xF) {
}
if (fpu_debug_level & DL_STOREEA) {
- printf(" store_ea: frame at %08x\n", frame);
+ printf(" store_ea: frame at %p\n", frame);
}
/* The src is always int or larger. */
len = insn->is_datasize;
}
}
if (fpu_debug_level & DL_STOREEA) {
- printf(" store_ea: dst 0x%08x\n", dst);
+ printf(" store_ea: dst %p\n", dst);
}
bcopy(src, dst, len);
} else /* One of MANY indirect forms... */ {
return sig;
if (fpu_debug_level & DL_STOREEA) {
- printf(" store_ea: dst addr=0x%08x+%d\n", dst, ea->ea_tdisp);
+ printf(" store_ea: dst addr=%p+%d\n", dst, ea->ea_tdisp);
}
copyout(src, dst + ea->ea_tdisp, len);
ext_bytes = insn->is_datasize;
if (0 < ext_bytes) {
- data = fusword(frame->f_pc + insn->is_advance);
+ data = fusword((void *) (frame->f_pc + insn->is_advance));
if (data < 0) {
return SIGSEGV;
}
dst[0] = data;
}
if (2 < ext_bytes) {
- data = fusword(frame->f_pc + insn->is_advance);
+ data = fusword((void *) (frame->f_pc + insn->is_advance));
if (data < 0) {
return SIGSEGV;
}
dst[0] |= data;
}
if (4 < ext_bytes) {
- data = fusword(frame->f_pc + insn->is_advance);
+ data = fusword((void *) (frame->f_pc + insn->is_advance));
if (data < 0) {
return SIGSEGV;
}
dst[1] = data << 16;
- data = fusword(frame->f_pc + insn->is_advance + 2);
+ data = fusword((void *) (frame->f_pc + insn->is_advance + 2));
if (data < 0) {
return SIGSEGV;
}
dst[1] |= data;
}
if (8 < ext_bytes) {
- data = fusword(frame->f_pc + insn->is_advance);
+ data = fusword((void *) (frame->f_pc + insn->is_advance));
if (data < 0) {
return SIGSEGV;
}
dst[2] = data << 16;
- data = fusword(frame->f_pc + insn->is_advance + 2);
+ data = fusword((void *) (frame->f_pc + insn->is_advance + 2));
if (data < 0) {
return SIGSEGV;
}
int disp, word;
if (size == 1) {
- word = fusword(frame->f_pc + insn->is_advance);
+ word = fusword((void *) (frame->f_pc + insn->is_advance));
if (word < 0) {
return SIGSEGV;
}
}
insn->is_advance += 2;
} else if (size == 2) {
- word = fusword(frame->f_pc + insn->is_advance);
+ word = fusword((void *) (frame->f_pc + insn->is_advance));
if (word < 0) {
return SIGSEGV;
}
disp = word << 16;
- word = fusword(frame->f_pc + insn->is_advance + 2);
+ word = fusword((void *) (frame->f_pc + insn->is_advance + 2));
if (word < 0) {
return SIGSEGV;
}
char *ptr; /* base address (usually a register content) */
char **eaddr; /* pointer to result pointer */
{
- int data, word, sig;
+ int data, word;
if (fpu_debug_level & DL_EA) {
- printf(" calc_ea: reg indirect (reg) = 0x%08x\n", ptr);
+ printf(" calc_ea: reg indirect (reg) = %p\n", ptr);
}
if (ea->ea_flags & EA_OFFSET) {
if (fpu_debug_level & DL_EA) {
printf(" calc_ea: mem indir mode: basedisp=%08x, outerdisp=%08x\n",
ea->ea_basedisp, ea->ea_outerdisp);
- printf(" calc_ea: addr fetched from 0x%08x\n", ptr);
+ printf(" calc_ea: addr fetched from %p\n", ptr);
}
/* memory indirect modes */
word = fusword(ptr);
-/* $NetBSD: fpu_emulate.c,v 1.4 1995/11/05 00:35:17 briggs Exp $ */
+/* $OpenBSD: fpu_emulate.c,v 1.3 1996/05/09 22:20:43 niklas Exp $ */
+/* $NetBSD: fpu_emulate.c,v 1.5 1996/04/30 11:52:13 briggs Exp $ */
/*
* Copyright (c) 1995 Gordon W. Ross
#include <sys/types.h>
#include <sys/signal.h>
+#include <sys/systm.h>
#include <machine/frame.h>
#include "fpu_emulate.h"
static int test_cc __P((struct fpemu *fe, int pred));
static struct fpn *fpu_cmp __P((struct fpemu *fe));
+int fusword __P((void *));
+
#if !defined(DL_DEFAULT)
# if defined(DEBUG_WITH_FPU)
# define DL_DEFAULT DL_ALL
#endif
int fpu_debug_level;
+#if DEBUG
static int global_debug_level = DL_DEFAULT;
+#endif
#define DUMP_INSN(insn) \
if (fpu_debug_level & DL_DUMPINSN) { \
static struct instruction insn;
static struct fpemu fe;
int word, optype, sig;
- int i;
- u_int *pt;
#ifdef DEBUG
/* initialize insn.is_datasize to tell it is *not* initialized */
printf("ENTERING fpu_emulate: FPSR=%08x, FPCR=%08x\n",
fe.fe_fpsr, fe.fe_fpcr);
}
- word = fusword(frame->f_pc);
+ word = fusword((void *) (frame->f_pc));
if (word < 0) {
#ifdef DEBUG
printf(" fpu_emulate: fault reading opcode\n");
insn.is_opcode = word;
optype = (word & 0x01C0);
- word = fusword(frame->f_pc + 2);
+ word = fusword((void *) (frame->f_pc + 2));
if (word < 0) {
#ifdef DEBUG
printf(" fpu_emulate: fault reading word1\n");
{
struct frame *frame = fe->fe_frame;
struct fpframe *fpf = fe->fe_fpframe;
- int word1, sig;
- int reglist, regmask, regnum;
+ int sig;
+ int reglist;
int fpu_to_mem;
/* move to/from control registers */
struct instruction *insn;
{
struct frame *frame = fe->fe_frame;
- struct fpframe *fpf = fe->fe_fpframe;
int advance, sig, branch, displ;
branch = test_cc(fe, insn->is_word1);
u_int16_t count = frame->f_regs[insn->is_opcode & 7];
if (count-- != 0) {
- displ = fusword(frame->f_pc + insn->is_advance);
+ displ = fusword((void *) (frame->f_pc + insn->is_advance));
if (displ < 0) {
#ifdef DEBUG
printf(" fpu_emul_type1: fault reading displacement\n");
struct instruction *insn;
{
struct frame *frame = fe->fe_frame;
- struct fpframe *fpf = fe->fe_fpframe;
int displ, word2;
- int sig, advance;
+ int sig;
/*
* Get branch displacement.
displ = insn->is_word1;
if (insn->is_opcode & 0x40) {
- word2 = fusword(frame->f_pc + insn->is_advance);
+ word2 = fusword((void *) (frame->f_pc + insn->is_advance));
if (word2 < 0) {
#ifdef DEBUG
printf(" fpu_emul_brcc: fault reading word2\n");
-/* $NetBSD: fpu_emulate.h,v 1.3 1996/01/12 04:23:54 briggs Exp $ */
+/* $OpenBSD: fpu_emulate.h,v 1.3 1996/05/09 22:20:44 niklas Exp $ */
+/* $NetBSD: fpu_emulate.h,v 1.4 1996/04/30 11:52:14 briggs Exp $ */
/*
* Copyright (c) 1995 Gordon Ross
*/
#include "fpu_arith_proto.h"
+int fpu_emulate __P((struct frame *frame, struct fpframe *fpf));
+
/*
* "helper" functions
*/
int fpu_store_ea __P((struct frame *frame, struct instruction *insn,
struct insn_ea *ea, char *src));
+/* fpu_subr.c */
+void fpu_norm __P((register struct fpn *fp));
+
/* declarations for debugging */
extern int fpu_debug_level;
-/* $NetBSD: fpu_explode.c,v 1.1 1995/11/03 04:47:07 briggs Exp $ */
+/* $OpenBSD: fpu_explode.c,v 1.2 1996/05/09 22:20:45 niklas Exp $ */
+/* $NetBSD: fpu_explode.c,v 1.2 1996/04/30 11:52:18 briggs Exp $ */
/*
* Copyright (c) 1992, 1993
*/
#include <sys/types.h>
+#include <sys/systm.h>
#include "ieee.h"
#include <machine/reg.h>
-/* $OpenBSD: fpu_fmovecr.c,v 1.2 1996/02/27 11:03:20 niklas Exp $ */
-/* $NetBSD: fpu_fmovecr.c,v 1.3 1996/02/04 02:17:42 briggs Exp $ */
+/* $OpenBSD: fpu_fmovecr.c,v 1.3 1996/05/09 22:20:45 niklas Exp $ */
+/* $NetBSD: fpu_fmovecr.c,v 1.4 1996/04/30 11:52:22 briggs Exp $ */
/*
* Copyright (c) 1995 Ken Nakata
*/
#include <sys/param.h>
+#include <sys/systm.h>
#include <machine/frame.h>
#include "fpu_emulate.h"
static struct fpn constrom[] = {
/* fp_class, fp_sign, fp_exp, fp_sticky, fp_mant[0] ... [3] */
- { FPC_NUM, 0, 1, 0, 0x6487e, 0xd5110b46, 0x11a80000, 0x0 },
- { FPC_NUM, 0, -2, 0, 0x4d104, 0xd427de7f, 0xbcc00000, 0x0 },
- { FPC_NUM, 0, 1, 0, 0x56fc2, 0xa2c515da, 0x54d00000, 0x0 },
- { FPC_NUM, 0, 0, 0, 0x5c551, 0xd94ae0bf, 0x85e00000, 0x0 },
- { FPC_NUM, 0, -2, 0, 0x6f2de, 0xc549b943, 0x8ca80000, 0x0 },
- { FPC_ZERO, 0, 0, 0, 0x0, 0x0, 0x0, 0x0 },
- { FPC_NUM, 0, -1, 0, 0x58b90, 0xbfbe8e7b, 0xcd600000, 0x0 },
- { FPC_NUM, 0, 1, 0, 0x49aec, 0x6eed5545, 0x60b80000, 0x0 },
- { FPC_NUM, 0, 0, 0, 0x40000, 0x0, 0x0, 0x0 },
- { FPC_NUM, 0, 3, 0, 0x50000, 0x0, 0x0, 0x0 },
- { FPC_NUM, 0, 6, 0, 0x64000, 0x0, 0x0, 0x0 },
- { FPC_NUM, 0, 13, 0, 0x4e200, 0x0, 0x0, 0x0 },
- { FPC_NUM, 0, 26, 0, 0x5f5e1, 0x0, 0x0, 0x0 },
- { FPC_NUM, 0, 53, 0, 0x470de, 0x4df82000, 0x0, 0x0 },
- { FPC_NUM, 0, 106, 0, 0x4ee2d, 0x6d415b85, 0xacf00000, 0x0 },
- { FPC_NUM, 0, 212, 0, 0x613c0, 0xfa4ffe7d, 0x36a80000, 0x0 },
- { FPC_NUM, 0, 425, 0, 0x49dd2, 0x3e4c074c, 0x67000000, 0x0 },
- { FPC_NUM, 0, 850, 0, 0x553f7, 0x5fdcefce, 0xf4700000, 0x0 },
- { FPC_NUM, 0, 1700, 0, 0x718cd, 0x5753074, 0x8e380000, 0x0 },
- { FPC_NUM, 0, 3401, 0, 0x64bb3, 0xac340ba8, 0x60b80000, 0x0 },
- { FPC_NUM, 0, 6803, 0, 0x4f459, 0xdaee29ea, 0xef280000, 0x0 },
- { FPC_NUM, 0, 13606, 0, 0x62302, 0x90145104, 0xbcd80000, 0x0 },
+ { FPC_NUM, 0, 1, 0, { 0x6487e, 0xd5110b46, 0x11a80000, 0x0 } },
+ { FPC_NUM, 0, -2, 0, { 0x4d104, 0xd427de7f, 0xbcc00000, 0x0 } },
+ { FPC_NUM, 0, 1, 0, { 0x56fc2, 0xa2c515da, 0x54d00000, 0x0 } },
+ { FPC_NUM, 0, 0, 0, { 0x5c551, 0xd94ae0bf, 0x85e00000, 0x0 } },
+ { FPC_NUM, 0, -2, 0, { 0x6f2de, 0xc549b943, 0x8ca80000, 0x0 } },
+ { FPC_ZERO, 0, 0, 0, { 0x0, 0x0, 0x0, 0x0 } },
+ { FPC_NUM, 0, -1, 0, { 0x58b90, 0xbfbe8e7b, 0xcd600000, 0x0 } },
+ { FPC_NUM, 0, 1, 0, { 0x49aec, 0x6eed5545, 0x60b80000, 0x0 } },
+ { FPC_NUM, 0, 0, 0, { 0x40000, 0x0, 0x0, 0x0 } },
+ { FPC_NUM, 0, 3, 0, { 0x50000, 0x0, 0x0, 0x0 } },
+ { FPC_NUM, 0, 6, 0, { 0x64000, 0x0, 0x0, 0x0 } },
+ { FPC_NUM, 0, 13, 0, { 0x4e200, 0x0, 0x0, 0x0 } },
+ { FPC_NUM, 0, 26, 0, { 0x5f5e1, 0x0, 0x0, 0x0 } },
+ { FPC_NUM, 0, 53, 0, { 0x470de, 0x4df82000, 0x0, 0x0 } },
+ { FPC_NUM, 0, 106, 0, { 0x4ee2d, 0x6d415b85, 0xacf00000, 0x0 } },
+ { FPC_NUM, 0, 212, 0, { 0x613c0, 0xfa4ffe7d, 0x36a80000, 0x0 } },
+ { FPC_NUM, 0, 425, 0, { 0x49dd2, 0x3e4c074c, 0x67000000, 0x0 } },
+ { FPC_NUM, 0, 850, 0, { 0x553f7, 0x5fdcefce, 0xf4700000, 0x0 } },
+ { FPC_NUM, 0, 1700, 0, { 0x718cd, 0x5753074, 0x8e380000, 0x0 } },
+ { FPC_NUM, 0, 3401, 0, { 0x64bb3, 0xac340ba8, 0x60b80000, 0x0 } },
+ { FPC_NUM, 0, 6803, 0, { 0x4f459, 0xdaee29ea, 0xef280000, 0x0 } },
+ { FPC_NUM, 0, 13606, 0, { 0x62302, 0x90145104, 0xbcd80000, 0x0 } },
};
struct fpn *
u_int offset;
{
struct fpn *r;
- int i;
#ifdef DEBUG
if (fp == NULL) {
struct fpemu *fe;
struct instruction *insn;
{
- int dstreg, offset, sig;
+ int dstreg, offset;
u_int *fpreg;
dstreg = (insn->is_word1 >> 7) & 0x7;
-/* $NetBSD: fpu_fscale.c,v 1.2 1995/11/05 00:35:25 briggs Exp $ */
+/* $OpenBSD: fpu_fscale.c,v 1.2 1996/05/09 22:20:46 niklas Exp $ */
+/* $NetBSD: fpu_fscale.c,v 1.3 1996/04/30 11:52:25 briggs Exp $ */
/*
* Copyright (c) 1995 Ken Nakata
#include <sys/types.h>
#include <sys/signal.h>
+#include <sys/systm.h>
#include <machine/frame.h>
#include "fpu_emulate.h"
-/* $NetBSD: fpu_fstore.c,v 1.2 1995/11/05 00:35:29 briggs Exp $ */
+/* $OpenBSD: fpu_fstore.c,v 1.2 1996/05/09 22:20:46 niklas Exp $ */
+/* $NetBSD: fpu_fstore.c,v 1.3 1996/04/30 11:52:27 briggs Exp $ */
/*
* Copyright (c) 1995 Ken Nakata
#include <sys/types.h>
#include <sys/signal.h>
+#include <sys/systm.h>
#include <machine/frame.h>
#include "fpu_emulate.h"
int regnum;
int format;
u_int buf[3];
- u_int flags;
- char regname;
if (fpu_debug_level & DL_FSTORE) {
- printf(" fpu_emul_fstore: frame at %08x fpframe at %08x\n",
+ printf(" fpu_emul_fstore: frame at %p fpframe at %p\n",
frame, fe->fe_fpframe);
}
-/* $NetBSD: fpu_implode.c,v 1.1 1995/11/03 04:47:12 briggs Exp $ */
+/* $OpenBSD: fpu_implode.c,v 1.2 1996/05/09 22:20:47 niklas Exp $ */
+/* $NetBSD: fpu_implode.c,v 1.2 1996/04/30 11:52:30 briggs Exp $ */
/*
* Copyright (c) 1992, 1993
*/
#include <sys/types.h>
+#include <sys/systm.h>
#include "ieee.h"
#include <machine/reg.h>
round(register struct fpemu *fe, register struct fpn *fp)
{
register u_int m0, m1, m2, m3;
- register int gr, s, ret;
+ register int gr, s;
m0 = fp->fp_mant[0];
m1 = fp->fp_mant[1];
-/* $NetBSD: fpu_log.c,v 1.2 1995/11/05 00:35:31 briggs Exp $ */
+/* $OpenBSD: fpu_log.c,v 1.2 1996/05/09 22:20:47 niklas Exp $ */
+/* $NetBSD: fpu_log.c,v 1.3 1996/04/30 11:52:33 briggs Exp $ */
/*
* Copyright (c) 1995 Ken Nakata
*/
#include <sys/types.h>
+#include <sys/systm.h>
#include "fpu_emulate.h"
-/* $NetBSD: fpu_rem.c,v 1.1 1995/11/03 04:47:17 briggs Exp $ */
+/* $OpenBSD: fpu_rem.c,v 1.2 1996/05/09 22:20:48 niklas Exp $ */
+/* $NetBSD: fpu_rem.c,v 1.3 1996/04/30 12:02:54 briggs Exp $ */
/*
* Copyright (c) 1995 Ken Nakata
static struct fpn X, Y;
struct fpn *x, *y, *r;
u_int signX, signY, signQ;
- int i, j, k, l, q;
+ int j, k, l, q;
int Last_Subtract;
CPYFPN(&X, &fe->fe_f1);
l = x->fp_exp - y->fp_exp;
k = 0;
q = 0;
- if (l < 0) {
- goto Step4;
- } else {
+ if (l >= 0) {
CPYFPN(r, x);
r->fp_exp -= l;
j = l;
r->fp_exp++;
}
/* Step 9 */
-
+ goto Step9;
}
Step4:
Last_Subtract = 0;
*/
/* Step 5.1 */
if (r->fp_exp + 1 < y->fp_exp ||
- r->fp_exp + 1 == y->fp_exp &&
- (r->fp_mant[0] < y->fp_mant[0] || r->fp_mant[1] < y->fp_mant[1] ||
- r->fp_mant[2] < y->fp_mant[3] || r->fp_mant[4] < y->fp_mant[4]))
+ (r->fp_exp + 1 == y->fp_exp &&
+ (r->fp_mant[0] < y->fp_mant[0] || r->fp_mant[1] < y->fp_mant[1] ||
+ r->fp_mant[2] < y->fp_mant[3] || r->fp_mant[4] < y->fp_mant[4])))
/* if r < y/2 */
goto Step6;
/* Step 5.2 */
-/* $NetBSD: fpu_subr.c,v 1.1 1995/11/03 04:47:19 briggs Exp $ */
+/* $OpenBSD: fpu_subr.c,v 1.2 1996/05/09 22:20:48 niklas Exp $ */
+/* $NetBSD: fpu_subr.c,v 1.2 1996/04/30 11:52:38 briggs Exp $ */
/*
* Copyright (c) 1992, 1993
*/
#include <sys/types.h>
+#include <sys/systm.h>
#include <machine/reg.h>