-/* $OpenBSD: abl.c,v 1.3 2020/10/25 08:31:40 mglocker Exp $ */
+/* $OpenBSD: abl.c,v 1.4 2022/01/09 05:42:37 jsg Exp $ */
/*
* Copyright (c) 2020 Marcus Glocker <mglocker@openbsd.org>
}
/*
- * We need to check on what type of PCI controler we're running on to
+ * We need to check on what type of PCI controller we're running on to
* access the right I/O space.
*/
pc = pci_lookup_segment(0);
-/* $OpenBSD: acpicpu.c,v 1.90 2021/08/01 19:04:37 kettenis Exp $ */
+/* $OpenBSD: acpicpu.c,v 1.91 2022/01/09 05:42:37 jsg Exp $ */
/*
* Copyright (c) 2005 Marco Peereboom <marco@openbsd.org>
* Copyright (c) 2015 Philip Guenther <guenther@openbsd.org>
/*
* XXX: _PPC Change listener
* PPC changes can occur when for example a machine is disconnected
- * from AC power and can no loger support the highest frequency or
+ * from AC power and can no longer support the highest frequency or
* voltage when driven from the battery.
* Should probably be reimplemented as a list for now we assume only
* one listener
-/* $OpenBSD: acpireg.h,v 1.57 2022/01/02 02:13:33 jsg Exp $ */
+/* $OpenBSD: acpireg.h,v 1.58 2022/01/09 05:42:37 jsg Exp $ */
/*
* Copyright (c) 2005 Thorsten Lockert <tholo@sigmasoft.com>
* Copyright (c) 2005 Marco Peereboom <marco@openbsd.org>
struct acpi_rsdp1 {
uint8_t signature[8];
#define RSDP_SIG "RSD PTR "
-#define rsdp_signaturee rsdp1.signature
+#define rsdp_signature rsdp1.signature
uint8_t checksum; /* make sum == 0 */
#define rsdp_checksum rsdp1.checksum
uint8_t oemid[6];
uint8_t s4bios_req; /* value for S4 */
uint8_t pstate_cnt; /* value for performance (hdr_revision > 2) */
uint32_t pm1a_evt_blk; /* power management 1a */
- uint32_t pm1b_evt_blk; /* power mangement 1b */
+ uint32_t pm1b_evt_blk; /* power management 1b */
uint32_t pm1a_cnt_blk; /* pm control 1a */
uint32_t pm1b_cnt_blk; /* pm control 1b */
uint32_t pm2_cnt_blk; /* pm control 2 */
* 80:95 Guest CR3 bits 15:30 (GCR3TRP)
* 96 IOTLB Enable (I)
* 97 Suppress multiple I/O page faults (I)
- * 98 Supress all I/O page faults (SA)
+ * 98 Suppress all I/O page faults (SA)
* 99:100 Port I/O Control (IoCTL)
* 101 Cache IOTLB Hint
* 102 Snoop Disable (SD)
-/* $OpenBSD: atk0110.c,v 1.17 2021/03/10 21:49:55 patrick Exp $ */
+/* $OpenBSD: atk0110.c,v 1.18 2022/01/09 05:42:37 jsg Exp $ */
/*
* Copyright (c) 2009 Constantine A. Murenin <cnst+openbsd@bugmail.mojo.ru>
uint32_t param2;
};
-/* Return buffer used by the GITM and SITM mehtods */
+/* Return buffer used by the GITM and SITM methods */
struct aibs_ret_buffer {
uint32_t flags;
uint32_t value;
-/* $OpenBSD: tipmic.c,v 1.5 2020/01/09 14:35:19 mpi Exp $ */
+/* $OpenBSD: tipmic.c,v 1.6 2022/01/09 05:42:37 jsg Exp $ */
/*
* Copyright (c) 2018 Mark Kettenis <kettenis@openbsd.org>
*
}
/*
- * Allegdly the GPIOs are virtual and only there to deal with a
+ * Allegedly the GPIOs are virtual and only there to deal with a
* limitation of Microsoft Windows.
*/
-/* $OpenBSD: atascsi.c,v 1.150 2020/10/15 13:22:13 krw Exp $ */
+/* $OpenBSD: atascsi.c,v 1.151 2022/01/09 05:42:37 jsg Exp $ */
/*
* Copyright (c) 2007 David Gwynne <dlg@openbsd.org>
}
/*
- * FREEZE LOCK the device so malicous users can't lock it on us.
+ * FREEZE LOCK the device so malicious users can't lock it on us.
* As there is no harm in issuing this to devices that don't
* support the security feature set we just send it, and don't bother
* checking if the device sends a command abort to tell us it doesn't
}
/*
- * The FLUSH CACHE command completed succesfully; now issue
- * the STANDBY IMMEDATE command.
+ * The FLUSH CACHE command completed successfully; now issue
+ * the STANDBY IMMEDIATE command.
*/
ap = atascsi_lookup_port(link);
xa->datalen = 0;
-/* $OpenBSD: atavar.h,v 1.21 2015/08/17 15:36:29 krw Exp $ */
+/* $OpenBSD: atavar.h,v 1.22 2022/01/09 05:42:37 jsg Exp $ */
/* $NetBSD: atavar.h,v 1.13 1999/03/10 13:11:43 bouyer Exp $ */
/*
struct ataparams id;
};
-/* ATA/ATAPI common attachement datas */
+/* ATA/ATAPI common attachment data */
struct ata_atapi_attach {
u_int8_t aa_type; /* Type of device */
#define T_ATA 0
u_int8_t aa_channel; /* controller's channel */
u_int8_t aa_openings; /* Number of simultaneous commands possible */
struct ata_drive_datas *aa_drv_data;
- void *aa_bus_private; /* infos specifics to this bus */
+ void *aa_bus_private; /* info specific to this bus */
};
/* User config flags that force (or disable) the use of a mode */
-/* $OpenBSD: satareg.h,v 1.2 2008/06/26 05:42:14 ray Exp $ */
+/* $OpenBSD: satareg.h,v 1.3 2022/01/09 05:42:37 jsg Exp $ */
/* $NetBSD: satareg.h,v 1.3 2004/05/23 23:07:59 wiz Exp $ */
/*-
#define SStatus_SPD_mask (0xf << 4)
#define SStatus_SPD_shift 4
/*
- * The IPM value indicates the current interface power managemnt
+ * The IPM value indicates the current interface power management
* state.
*/
#define SStatus_IPM_NODEV (0x0 << 8) /* no device connected */
-/* $OpenBSD: wd.c,v 1.127 2020/01/23 05:46:44 tedu Exp $ */
+/* $OpenBSD: wd.c,v 1.128 2022/01/09 05:42:37 jsg Exp $ */
/* $NetBSD: wd.c,v 1.193 1999/02/28 17:15:27 explorer Exp $ */
/*
}
/*
- * FREEZE LOCK the drive so malicous users can't lock it on us.
+ * FREEZE LOCK the drive so malicious users can't lock it on us.
* As there is no harm in issuing this to drives that don't
* support the security feature set we just send it, and don't
* bother checking if the drive sends a command abort to tell us it
-/* $OpenBSD: atapiscsi.c,v 1.117 2020/09/22 19:32:52 krw Exp $ */
+/* $OpenBSD: atapiscsi.c,v 1.118 2022/01/09 05:42:37 jsg Exp $ */
/*
* This code is derived from code with the copyright below.
wdc_atapi_send_cmd, NULL, NULL, NULL, wdc_atapi_ioctl
};
-/* Inital version shares bus_link structure so it can easily
+/* Initial version shares bus_link structure so it can easily
be "attached to current" wdc driver */
struct cfattach atapiscsi_ca = {
-/* $OpenBSD: audio.c,v 1.193 2021/05/16 15:12:37 deraadt Exp $ */
+/* $OpenBSD: audio.c,v 1.194 2022/01/09 05:42:36 jsg Exp $ */
/*
* Copyright (c) 2015 Alexandre Ratchov <alex@caoua.org>
*
return 0;
/*
- * negociate parameters with the hardware
+ * negotiate parameters with the hardware
*/
error = audio_setpar(sc);
if (error)
-/* $OpenBSD: dt_dev.c,v 1.18 2021/12/21 09:35:08 bluhm Exp $ */
+/* $OpenBSD: dt_dev.c,v 1.19 2022/01/09 05:42:37 jsg Exp $ */
/*
* Copyright (c) 2019 Martin Pieuchot <mpi@openbsd.org>
TAILQ_FOREACH(dp, &sc->ds_pcbs, dp_snext) {
count = dt_pcb_ring_copy(dp, estq, qlen, &dropped);
read += count;
- estq += count; /* pointer aritmetic */
+ estq += count; /* pointer arithmetic */
qlen -= count;
if (qlen == 0)
break;
-/* $OpenBSD: dtvar.h,v 1.10 2021/10/27 09:09:55 jasper Exp $ */
+/* $OpenBSD: dtvar.h,v 1.11 2022/01/09 05:42:37 jsg Exp $ */
/*
* Copyright (c) 2019 Martin Pieuchot <mpi@openbsd.org>
* I immutable after creation
* K kernel lock
* D dt_lock
- * D,S dt_lock for writting and SMR for reading
+ * D,S dt_lock for writing and SMR for reading
* M dtp mutex
*/
struct dt_probe {
int dtp_sysnum; /* [I] related # of syscall */
const char *dtp_argtype[5];/* [I] type of arguments */
int dtp_nargs; /* [I] # of arguments */
- vaddr_t dtp_addr; /* [I] address of breakpint */
+ vaddr_t dtp_addr; /* [I] address of breakpoint */
};
-/* $OpenBSD: amlmmc.c,v 1.11 2021/10/24 17:52:26 mpi Exp $ */
+/* $OpenBSD: amlmmc.c,v 1.12 2022/01/09 05:42:37 jsg Exp $ */
/*
* Copyright (c) 2019 Mark Kettenis <kettenis@openbsd.org>
*
sc->sc_dmat = faa->fa_dmat;
error = amlmmc_alloc_descriptors(sc);
if (error) {
- printf(": can't allocate desctiptors\n");
+ printf(": can't allocate descriptors\n");
goto unmap;
}
error = bus_dmamap_create(sc->sc_dmat, MAXPHYS, AMLMMC_NDESC,
-/* $OpenBSD: amlusbphy.c,v 1.2 2021/10/24 17:52:26 mpi Exp $ */
+/* $OpenBSD: amlusbphy.c,v 1.3 2022/01/09 05:42:37 jsg Exp $ */
/*
* Copyright (c) 2019 Mark Kettenis <kettenis@openbsd.org>
*
HWRITE4(sc, PHY_R3, (0 << PHY_R3_SQUELCH_REF_SHIFT) |
(1 << PHY_R3_HDISC_REF_SHIFT) | (3 << PHY_R3_DISC_THRESH_SHIFT));
- /* Analogg settings. */
+ /* Analog settings. */
HWRITE4(sc, PHY_R14, 0);
HWRITE4(sc, PHY_R13, PHY_R13_UPDATE_PMA_SIGNALS |
(7 << PHY_R13_MIN_COUNT_FOR_SYNC_DET_SHIFT));
-/* $OpenBSD: axppmic.c,v 1.12 2021/12/03 19:17:27 uaa Exp $ */
+/* $OpenBSD: axppmic.c,v 1.13 2022/01/09 05:42:37 jsg Exp $ */
/*
* Copyright (c) 2017 Mark Kettenis <kettenis@openbsd.org>
*
}
}
- /* Enable data collecton on AXP209. */
+ /* Enable data collection on AXP209. */
if (strcmp(name, "x-powers,axp209") == 0) {
uint8_t reg;
-/* $OpenBSD: dwmmc.c,v 1.25 2021/10/24 17:52:26 mpi Exp $ */
+/* $OpenBSD: dwmmc.c,v 1.26 2022/01/09 05:42:37 jsg Exp $ */
/*
* Copyright (c) 2017 Mark Kettenis
*
dwmmc_dma_setup(sc, cmd);
HWRITE4(sc, SDMMC_PLDMND, 1);
- /* Ennable DMA if we did PIO before. */
+ /* Enable DMA if we did PIO before. */
if (!sc->sc_dmamode)
dwmmc_dma_mode(sc);
-/* $OpenBSD: if_fec.c,v 1.13 2021/11/05 15:18:24 patrick Exp $ */
+/* $OpenBSD: if_fec.c,v 1.14 2022/01/09 05:42:37 jsg Exp $ */
/*
* Copyright (c) 2012-2013,2019 Patrick Wildt <patrick@blueri.se>
*
HWRITE4(sc, ENET_RACC, ENET_RACC_SHIFT16);
HWRITE4(sc, ENET_FTRL, ENET_MAX_BUF_SIZE);
- /* RX FIFO treshold and pause */
+ /* RX FIFO threshold and pause */
HWRITE4(sc, ENET_RSEM, 0x84);
HWRITE4(sc, ENET_RSFL, 16);
HWRITE4(sc, ENET_RAEM, 8);
-/* $OpenBSD: if_mvnetareg.h,v 1.2 2020/11/29 13:00:23 kettenis Exp $ */
+/* $OpenBSD: if_mvnetareg.h,v 1.3 2022/01/09 05:42:37 jsg Exp $ */
/* $NetBSD: mvnetareg.h,v 1.8 2013/12/23 02:23:25 kiyohara Exp $ */
/*
* Copyright (c) 2007, 2013 KIYOHARA Takashi
#define MVNETA_PTXS_TBC(x) (((x) >> 16) & 0x3fff)
/* Port TX queues Status Update (MVNETA_PTXSU) */
- /* Number Of Written Descriptoes */
+ /* Number Of Written Descriptors */
#define MVNETA_PTXSU_NOWD(x) (((x) & 0xff) << 0)
/* Number Of Released Buffers */
#define MVNETA_PTXSU_NORB(x) (((x) & 0xff) << 16)
/*
* DMA descriptors
* Despite the documentation saying these descriptors only need to be
- * aligned to 16-byte bondaries, 32-byte alignment seems to be required
+ * aligned to 16-byte boundaries, 32-byte alignment seems to be required
* by the hardware. We'll just pad them out to that to make it easier.
*/
struct mvneta_tx_desc {
-/* $OpenBSD: if_mvppreg.h,v 1.16 2021/06/03 21:42:23 patrick Exp $ */
+/* $OpenBSD: if_mvppreg.h,v 1.17 2022/01/09 05:42:37 jsg Exp $ */
/*
* Copyright (c) 2008, 2019 Mark Kettenis <kettenis@openbsd.org>
* Copyright (c) 2017, 2020 Patrick Wildt <patrick@blueri.se>
/* Maximum number of RXQs used by single port */
#define MVPP2_MAX_RXQ 8
-/* Dfault number of RXQs in use */
+/* Default number of RXQs in use */
#define MVPP2_DEFAULT_RXQ 4
/* Total number of RXQs available to all ports */
-/* $OpenBSD: imxccm.c,v 1.27 2021/10/24 17:52:26 mpi Exp $ */
+/* $OpenBSD: imxccm.c,v 1.28 2022/01/09 05:42:37 jsg Exp $ */
/*
* Copyright (c) 2012-2013 Patrick Wildt <patrick@blueri.se>
*
CCM_ANALOG_PLL_USB2_ENABLE);
return;
case IMX6_CLK_USBPHY1:
- /* PLL outputs should alwas be on. */
+ /* PLL outputs should always be on. */
regmap_write_4(sc->sc_anatop, CCM_ANALOG_PLL_USB1_SET,
CCM_ANALOG_PLL_USB1_EN_USB_CLKS);
imxccm_enable_parent(sc, IMX6_CLK_PLL3_USB_OTG, on);
return;
case IMX6_CLK_USBPHY2:
- /* PLL outputs should alwas be on. */
+ /* PLL outputs should always be on. */
regmap_write_4(sc->sc_anatop, CCM_ANALOG_PLL_USB2_SET,
CCM_ANALOG_PLL_USB2_EN_USB_CLKS);
imxccm_enable_parent(sc, IMX6_CLK_PLL7_USB_HOST, on);
-/* $OpenBSD: imxesdhc.c,v 1.17 2021/10/24 17:52:26 mpi Exp $ */
+/* $OpenBSD: imxesdhc.c,v 1.18 2022/01/09 05:42:37 jsg Exp $ */
/*
* Copyright (c) 2009 Dale Rahn <drahn@openbsd.org>
* Copyright (c) 2006 Uwe Stuehler <uwe@openbsd.org>
cur_freq = sc->clkbase / (pre_div * 2) / (div + 1);
- /* disable force CLK ouput active */
+ /* disable force CLK output active */
HCLR4(sc, SDHC_VEND_SPEC, SDHC_VEND_SPEC_FRC_SDCLK_ON);
/* wait while clock is unstable */
DPRINTF(1,("%s: software reset reg=%#x\n", HDEVNAME(sc), mask));
- /* disable force CLK ouput active */
+ /* disable force CLK output active */
HCLR4(sc, SDHC_VEND_SPEC, SDHC_VEND_SPEC_FRC_SDCLK_ON);
/* reset */
-/* $OpenBSD: mvclock.c,v 1.9 2021/10/24 17:52:26 mpi Exp $ */
+/* $OpenBSD: mvclock.c,v 1.10 2022/01/09 05:42:37 jsg Exp $ */
/*
* Copyright (c) 2018 Mark Kettenis <kettenis@openbsd.org>
*
}
}
- /* Gatable clocks */
+ /* Gateable clocks */
if (mod == 1) {
switch (idx) {
case CP110_GATE_PPV2:
uint32_t mod = cells[0];
uint32_t idx = cells[1];
- /* Gatable clocks */
+ /* Gateable clocks */
if (mod == 1 && idx < 32) {
struct regmap *rm;
uint32_t reg;
-/* $OpenBSD: rkclock.c,v 1.60 2021/12/13 20:59:23 chrisz Exp $ */
+/* $OpenBSD: rkclock.c,v 1.61 2022/01/09 05:42:37 jsg Exp $ */
/*
* Copyright (c) 2017, 2018 Mark Kettenis <kettenis@openbsd.org>
*
/*
* Start out with the current parent. This prevents
- * unecessary switching to a different parent.
+ * unnecessary switching to a different parent.
*/
best_freq = rkclock_freq(sc, clk, mux, freq);
best_mux = mux;
-/* $OpenBSD: rkpcie.c,v 1.15 2021/10/24 17:52:26 mpi Exp $ */
+/* $OpenBSD: rkpcie.c,v 1.16 2022/01/09 05:42:37 jsg Exp $ */
/*
* Copyright (c) 2018 Mark Kettenis <kettenis@openbsd.org>
*
}
}
- /* Passthrought inbound translations unmodified. */
+ /* Passthrough inbound translations unmodified. */
HWRITE4(sc, PCIE_ATR_IB_ADDR0(2), 32 - 1);
HWRITE4(sc, PCIE_ATR_IB_ADDR1(2), 0);
-/* $OpenBSD: rktemp.c,v 1.8 2021/12/19 12:45:14 kettenis Exp $ */
+/* $OpenBSD: rktemp.c,v 1.9 2022/01/09 05:42:37 jsg Exp $ */
/*
* Copyright (c) 2017 Mark Kettenis <kettenis@openbsd.org>
*
int32_t temp0, delta_temp;
int i;
- /* Handle both negative and postive temperature coefficients. */
+ /* Handle both negative and positive temperature coefficients. */
if (sc->sc_temps[0].code > sc->sc_temps[1].code) {
if (code >= sc->sc_temps[0].code)
return sc->sc_temps[0].code;
-/* $OpenBSD: simplefb.c,v 1.14 2021/10/24 17:52:27 mpi Exp $ */
+/* $OpenBSD: simplefb.c,v 1.15 2022/01/09 05:42:37 jsg Exp $ */
/*
* Copyright (c) 2016 Mark Kettenis
*
};
/*
- * Supported pixel formats. Layout ommitted when it matches the
+ * Supported pixel formats. Layout omitted when it matches the
* rasops defaults.
*/
struct simplefb_format simplefb_formats[] = {
-/* $OpenBSD: hidms.c,v 1.7 2021/06/10 13:34:37 jcs Exp $ */
+/* $OpenBSD: hidms.c,v 1.8 2022/01/09 05:42:37 jsg Exp $ */
/* $NetBSD: ums.c,v 1.60 2003/03/11 16:44:00 augustss Exp $ */
/*
* The Microsoft Wireless Notebook Optical Mouse seems to be in worse
* shape than the Wireless Intellimouse 2.0, as its X, Y, wheel, and
* all of its other button positions are all off. It also reports that
- * it has two addional buttons and a tilt wheel.
+ * it has two additional buttons and a tilt wheel.
*/
if (ms->sc_flags & HIDMS_MS_BAD_CLASS) {
/* HIDMS_LEADINGBYTE cleared on purpose */
-/* $OpenBSD: hil.c,v 1.28 2019/12/31 10:05:32 mpi Exp $ */
+/* $OpenBSD: hil.c,v 1.29 2022/01/09 05:42:37 jsg Exp $ */
/*
* Copyright (c) 2003, 2004, Miodrag Vallat.
* All rights reserved.
case HIL_UNPLUGGED:
/*
* Remember that an unplugged event
- * occured; it will be processed upon
+ * occurred; it will be processed upon
* leaving polled mode...
*/
sc->sc_pending = HIL_PENDING_UNPLUGGED;
-/* $OpenBSD: ds1307.c,v 1.3 2021/04/24 10:15:15 mpi Exp $ */
+/* $OpenBSD: ds1307.c,v 1.4 2022/01/09 05:42:37 jsg Exp $ */
/*
* Copyright (c) 2016 Marcus Glocker <mglocker@openbsd.org>
return (-1);
}
if ((data_r & DS1307_SEC_MASK_CH) == 0) {
- /* oscilliator is already enabled */
+ /* oscillator is already enabled */
printf(": rtc is ok\n");
return (0);
}
-/* $OpenBSD: ihidev.c,v 1.24 2021/08/26 21:05:01 jcs Exp $ */
+/* $OpenBSD: ihidev.c,v 1.25 2022/01/09 05:42:37 jsg Exp $ */
/*
* HID-over-i2c driver
*
case DVACT_QUIESCE:
sc->sc_dying = 1;
if (sc->sc_poll && timeout_initialized(&sc->sc_timer)) {
- DPRINTF(("%s: canceling polling\n",
+ DPRINTF(("%s: cancelling polling\n",
sc->sc_dev.dv_xname));
timeout_del_barrier(&sc->sc_timer);
}
-/* $OpenBSD: aac.c,v 1.92 2022/01/07 09:08:15 jsg Exp $ */
+/* $OpenBSD: aac.c,v 1.93 2022/01/09 05:42:37 jsg Exp $ */
/*-
* Copyright (c) 2000 Michael Smith
aif->data.EN.data.ECLE.eventType);
break;
case AifEnDiskSetEvent:
- /* A disk set event occured. */
+ /* A disk set event occurred. */
printf("(DiskSetEvent) event %d "
"diskset %lld creator %lld\n",
aif->data.EN.data.EDS.eventType,
-/* $OpenBSD: aac_tables.h,v 1.5 2009/03/06 07:28:10 grange Exp $ */
+/* $OpenBSD: aac_tables.h,v 1.6 2022/01/09 05:42:37 jsg Exp $ */
/*-
* Copyright (c) 2000 Michael Smith
{ "bad type", 10007 },
{ "jukebox", 10008 },
{ "not mounted", 10009 },
- { "in maintenace mode", 10010 },
+ { "in maintenance mode", 10010 },
{ "stale ACL", 10011 },
{ NULL, 0 },
{ "unknown command status", 0 }
-/* $OpenBSD: aacreg.h,v 1.11 2009/03/06 07:28:10 grange Exp $ */
+/* $OpenBSD: aacreg.h,v 1.12 2022/01/09 05:42:37 jsg Exp $ */
/*-
* Copyright (c) 2000 Michael Smith
/*
* Adapter Status Register
*
- * Phase Staus mailbox is 32bits:
+ * Phase Status mailbox is 32bits:
* <31:16> = Phase Status
* <15:0> = Phase
*
AifEnSMARTEvent, /* SMART Event */
AifEnBatteryNeedsRecond, /* The battery needs reconditioning */
AifEnClusterEvent, /* Some cluster event */
- AifEnDiskSetEvent, /* A disk set event occured. */
+ AifEnDiskSetEvent, /* A disk set event occurred. */
AifDriverNotifyStart=199, /* Notifies for host driver go here */
/* Host driver notifications start here */
AifDenMorphComplete, /* A morph operation completed */
} __packed;
/*
- * 'Ioctl' commads
+ * 'Ioctl' commands
*/
#define AAC_SCSI_MAX_PORTS 10
#define AAC_BUS_NO_EXIST 0
-/* $OpenBSD: aacvar.h,v 1.15 2020/07/22 13:16:04 krw Exp $ */
+/* $OpenBSD: aacvar.h,v 1.16 2022/01/09 05:42:37 jsg Exp $ */
/*-
* Copyright (c) 2000 Michael Smith
};
/*
- * A command contol block, one for each corresponding command index of the
+ * A command control block, one for each corresponding command index of the
* controller.
*/
struct aac_command
struct aac_qstat aac_qstat[AACQ_COUNT]; /* queue statistics */
- /* connected containters */
+ /* connected containers */
TAILQ_HEAD(,aac_container) aac_container_tqh;
aac_lock_t aac_container_lock;
-/* $OpenBSD: acx.c,v 1.125 2021/02/25 02:48:19 dlg Exp $ */
+/* $OpenBSD: acx.c,v 1.126 2022/01/09 05:42:38 jsg Exp $ */
/*
* Copyright (c) 2006 Jonathan Gray <jsg@openbsd.org>
acx_disable_intr(sc);
- /* Stop backgroud scanning */
+ /* Stop background scanning */
timeout_del(&sc->sc_chanscan_timer);
/* Turn off power led */
* beacon frame format
* [8] time stamp
* [2] beacon interval
- * [2] cabability information
+ * [2] capability information
* from here on [tlv] values
*/
-/* $OpenBSD: acx100.c,v 1.27 2017/09/22 13:44:00 kevlo Exp $ */
+/* $OpenBSD: acx100.c,v 1.28 2022/01/09 05:42:38 jsg Exp $ */
/*
* Copyright (c) 2006 Jonathan Gray <jsg@openbsd.org>
uint32_t h_rxring_paddr; /* host rx desc start phyaddr */
/*
- * Memory blocks are controled by hardware
+ * Memory blocks are controlled by hardware
* once after they are initialized
*/
uint32_t rx_memblk_addr; /* start addr of rx mem blocks */
-/* $OpenBSD: acx111.c,v 1.23 2015/11/24 13:45:06 mpi Exp $ */
+/* $OpenBSD: acx111.c,v 1.24 2022/01/09 05:42:38 jsg Exp $ */
/*
* Copyright (c) 2006 Jonathan Gray <jsg@openbsd.org>
/*
* There is no need to setup firmware RX descriptor ring,
- * it is automaticly setup by hardware.
+ * it is automatically setup by hardware.
*/
return (0);
-/* $OpenBSD: acxreg.h,v 1.12 2008/06/01 10:08:35 brad Exp $ */
+/* $OpenBSD: acxreg.h,v 1.13 2022/01/09 05:42:38 jsg Exp $ */
/*
* Copyright (c) 2006 Jonathan Gray <jsg@openbsd.org>
#define ACX_CMD_REG_SIZE 4 /* 4 bytes */
/*
- * Size of infomation register whose location is obtained
+ * Size of information register whose location is obtained
* from ACXREG_INFO_REG_OFFSET IO register
*/
#define ACX_INFO_REG_SIZE 4 /* 4 bytes */
-/* $OpenBSD: aic6360.c,v 1.38 2020/09/22 19:32:52 krw Exp $ */
+/* $OpenBSD: aic6360.c,v 1.39 2022/01/09 05:42:38 jsg Exp $ */
/* $NetBSD: aic6360.c,v 1.52 1996/12/10 21:27:51 thorpej Exp $ */
#ifdef DDB
/*
* Clear INTEN. We enable it again before returning. This makes the
- * interrupt esssentially level-triggered.
+ * interrupt essentially level-triggered.
*/
bus_space_write_1(iot, ioh, DMACNTRL0, 0);
-/* $OpenBSD: aic6915.c,v 1.23 2020/07/10 13:26:37 patrick Exp $ */
+/* $OpenBSD: aic6915.c,v 1.24 2022/01/09 05:42:38 jsg Exp $ */
/* $NetBSD: aic6915.c,v 1.15 2005/12/24 20:27:29 perry Exp $ */
/*-
/*
* sf_stats_update:
*
- * Read the statitistics counters.
+ * Read the statistics counters.
*/
void
sf_stats_update(struct sf_softc *sc)
-/* $OpenBSD: aic6915.h,v 1.4 2009/08/10 20:29:54 deraadt Exp $ */
+/* $OpenBSD: aic6915.h,v 1.5 2022/01/09 05:42:38 jsg Exp $ */
/* $NetBSD: aic6915reg.h,v 1.4 2005/12/11 12:21:25 christos Exp $ */
/*-
/*
* To make matters worse, the manual lies about the indices in the
- * completion queue entires. It claims they are in 8-byte units,
+ * completion queue entries. It claims they are in 8-byte units,
* but they're actually *BYTES*, which means we need to divide by
* 128 to get the actual index.
*/
struct sf_txdesc0 scd_txdescs[SF_NTXDESC];
/*
- * The transmit completion queue entires.
+ * The transmit completion queue entries.
*/
struct sf_tcd scd_txcomp[SF_NTCD];
-/* $OpenBSD: aic79xx.c,v 1.66 2020/07/24 12:43:31 krw Exp $ */
+/* $OpenBSD: aic79xx.c,v 1.67 2022/01/09 05:42:38 jsg Exp $ */
/*
* Copyright (c) 2004 Milos Urbanek, Kenneth R. Westerback & Marco Peereboom
};
/*
- * In most cases we only wish to itterate over real phases, so
+ * In most cases we only wish to iterate over real phases, so
* exclude the last element from the count.
*/
static const u_int num_phases = NUM_ELEMENTS(ahd_phase_table) - 1;
ahd_outb(ahd, SG_STATE, 0);
/*
- * Flush the data FIFO. Strickly only
+ * Flush the data FIFO. Strictly only
* necessary for Rev A parts.
*/
ahd_outb(ahd, DFCNTRL, ahd_inb(ahd, DFCNTRL) | FIFOFLUSH);
* If we raise ATN and the target completes the entire
* stream (P0 asserted during the last packet), the
* hardware will ack all data and return to the ISTART
- * state. When the target reponds to our ATN condition,
+ * state. When the target responds to our ATN condition,
* LQIPHASE_LQ will be asserted. We should respond to
* this with an LQIRETRY to prepare for any future
* packets. NONPACKREQ will not be asserted again
ahd_outb(ahd, SEQCTL0, ahd_inb(ahd, SEQCTL0) & ~STEP);
ahd_outb(ahd, SIMODE1, simode1);
/*
- * SCSIINT seems to glitch occassionally when
+ * SCSIINT seems to glitch occasionally when
* the interrupt masks are restored. Clear SCSIINT
* one more time so that only persistent errors
* are seen as a real interrupt.
/*
* Update the bitmask of targets for which the controller should
- * negotiate with at the next convenient oportunity. This currently
+ * negotiate with at the next convenient opportunity. This currently
* means the next time we send the initial identify messages for
* a new transaction.
*/
/*
* During packetized transfers, the target will
- * give us the oportunity to send command packets
+ * give us the opportunity to send command packets
* without us asserting attention.
*/
if ((tinfo->ppr_options & MSG_EXT_PPR_IU_REQ) == 0)
* has already been setup. The negotiation changes may
* effect whether we select-out with ATN. It is only
* safe to clear ENSELO when the bus is not free and no
- * selection is in progres or completed.
+ * selection is in progress or completed.
*/
saved_modes = ahd_save_modes(ahd);
ahd_set_modes(ahd, AHD_MODE_SCSI, AHD_MODE_SCSI);
/*
* When an initiator transaction with the MK_MESSAGE flag either reconnects
* or enters the initial message out phase, we are interrupted. Fill our
- * outgoing message buffer with the appropriate message and beging handing
+ * outgoing message buffer with the appropriate message and begin handing
* the message phase(s) manually.
*/
void
}
/*
- * Build a wide negotiateion message in our message
+ * Build a wide negotiation message in our message
* buffer based on the input parameters.
*/
void
/*
* Requeue all tagged commands for this target
- * currently in our posession so they can be
+ * currently in our possession so they can be
* converted to untagged commands.
*/
ahd_search_qinfifo(ahd, SCB_GET_TARGET(ahd, scb),
}
/*
- * Process an ingnore wide residue message.
+ * Process an ignore wide residue message.
*/
void
ahd_handle_ign_wide_residue(struct ahd_softc *ahd, struct ahd_devinfo *devinfo)
/*
* Reset the controller and record some information about it
* that is only available just after a reset. If "reinit" is
- * non-zero, this reset occured after initial configuration
+ * non-zero, this reset occurred after initial configuration
* and the caller requests that the chip be fully reinitialized
* to a runable state. Chip interrupts are *not* enabled after
* a reinitialization. The caller must enable interrupts via
* does not disable its parity logic prior to
* the start of the reset. This may cause a
* parity error to be detected and thus a
- * spurious SERR or PERR assertion. Disble
+ * spurious SERR or PERR assertion. Disable
* PERR and SERR responses during the CHIPRST.
*/
mod_cmd = cmd & ~(PCI_COMMAND_PARITY_ENABLE|PCI_COMMAND_SERR_ENABLE);
* table entry for TCL. Return the offset into
* the SCB that contains the entry for TCL.
* saved_scbid is dereferenced and set to the
- * scbid that should be restored once manipualtion
+ * scbid that should be restored once manipulation
* of the TCL entry is complete.
*/
u_int ahd_index_busy_tcl(struct ahd_softc *, u_int *, u_int);
*/
next_fifo = fifo = ahd_inb(ahd, DFFSTAT) & CURRFIFO;
if (next_fifo > CURRFIFO_1)
- /* If disconneced, arbitrarily start with FIFO1. */
+ /* If disconnected, arbitrarily start with FIFO1. */
next_fifo = fifo = 0;
do {
next_fifo ^= CURRFIFO_1;
printf("Invalid Command IU Field\n");
break;
case SIU_PFC_TMF_NOT_SUPPORTED:
- printf("TMF not supportd\n");
+ printf("TMF not supported\n");
break;
case SIU_PFC_TMF_FAILED:
printf("TMF failed\n");
* We can't allow the target to disconnect.
* This will be an untagged transaction and
* having the target disconnect will make this
- * transaction indestinguishable from outstanding
+ * transaction indistinguishable from outstanding
* tagged transactions.
*/
hscb->control = 0;
break;
}
case SCSI_STATUS_OK:
- printf("%s: Interrupted for staus of 0???\n",
+ printf("%s: Interrupted for status of 0???\n",
ahd_name(ahd));
/* FALLTHROUGH */
default:
cur_patch += cur_patch->skip_patch;
} else {
/* Accepted this patch. Advance to the next
- * one and wait for our intruction pointer to
+ * one and wait for our instruction pointer to
* hit this point.
*/
cur_patch++;
}
/*
- * Write count 16bit words from buf, into SEEPROM attache to the
+ * Write count 16bit words from buf, into SEEPROM attached to the
* controller starting at 16bit word address start_addr, using the
* controller's SEEPROM writing state machine.
*/
return (error);
/*
- * Write the data. If we don't get throught the loop at
+ * Write the data. If we don't get through the loop at
* least once, the arguments were invalid.
*/
retval = EINVAL;
* We should be able to determine the SEEPROM type
* from the flexport logic, but unfortunately not
* all implementations have this logic and there is
- * no programatic method for determining if the logic
+ * no programmatic method for determining if the logic
* is present.
*/
return (1);
-/* $OpenBSD: aic79xx.h,v 1.28 2020/07/22 13:16:04 krw Exp $ */
+/* $OpenBSD: aic79xx.h,v 1.29 2022/01/09 05:42:38 jsg Exp $ */
/*
* Copyright (c) 2004 Milos Urbanek, Kenneth R. Westerback & Marco Peereboom
*/
AHD_NONPACKFIFO_BUG = 0x4000,
/*
- * Writing to a DFF SCBPTR register may fail if concurent with
+ * Writing to a DFF SCBPTR register may fail if concurrent with
* a hardware write to the other DFF SCBPTR register. This is
* not currently a concern in our sequencer since all chips with
* this bug have the AHD_NONPACKFIFO_BUG and all writes of concern
* residual sg ptr and the transfer is considered complete. If the
* sequencer determines that there is a residual in the transfer, or
* there is non-zero status, it will set the SG_STATUS_VALID flag in
- * sgptr and dma the scb back into host memory. To sumarize:
+ * sgptr and dma the scb back into host memory. To summarize:
*
* Sequencer:
* o A residual has occurred if SG_FULL_RESID is set in sgptr,
/************************ Target Mode Definitions *****************************/
/*
- * Connection desciptor for select-in requests in target mode.
+ * Connection descriptor for select-in requests in target mode.
*/
struct target_cmd {
uint8_t scsiid; /* Our ID and the initiator's ID */
#endif
/******************** Transfer Negotiation Datastructures *********************/
-#define AHD_TRANS_CUR 0x01 /* Modify current neogtiation status */
+#define AHD_TRANS_CUR 0x01 /* Modify current negotiation status */
#define AHD_TRANS_ACTIVE 0x03 /* Assume this target is on the bus */
#define AHD_TRANS_GOAL 0x04 /* Modify negotiation goal */
#define AHD_TRANS_USER 0x08 /* Modify user negotiation settings */
/*
* Device instance currently on the bus awaiting a continue TIO
- * for a command that was not given the disconnect priveledge.
+ * for a command that was not given the disconnect privilege.
*/
struct ahd_tmode_lstate *pending_device;
uint8_t tqinfifonext;
/*
- * Cached verson of the hs_mailbox so we can avoid
+ * Cached version of the hs_mailbox so we can avoid
* pausing the sequencer during mailbox updates.
*/
uint8_t hs_mailbox;
typedef enum {
AHD_NEG_TO_GOAL, /* Renegotiate only if goal and curr differ. */
AHD_NEG_IF_NON_ASYNC, /* Renegotiate so long as goal is non-async. */
- AHD_NEG_ALWAYS /* Renegotiat even if goal is async. */
+ AHD_NEG_ALWAYS /* Renegotiate even if goal is async. */
} ahd_neg_type;
int ahd_update_neg_request(struct ahd_softc*,
struct ahd_devinfo*,
-/* $OpenBSD: aic79xx_inline.h,v 1.4 2004/08/23 20:16:01 marco Exp $ */
+/* $OpenBSD: aic79xx_inline.h,v 1.5 2022/01/09 05:42:38 jsg Exp $ */
/*
* Copyright (c) 2004 Milos Urbanek, Kenneth R. Westerback & Marco Peereboom
uint32_t
ahd_targetcmd_offset(struct ahd_softc *, u_int);
-/*********************** Miscelaneous Support Functions ***********************/
+/*********************** Miscellaneous Support Functions **********************/
void ahd_complete_scb(struct ahd_softc *, struct scb *);
void ahd_update_residual(struct ahd_softc *, struct scb *);
struct ahd_initiator_tinfo *
-/* $OpenBSD: aic7xxx.c,v 1.96 2021/05/01 16:11:15 visa Exp $ */
+/* $OpenBSD: aic7xxx.c,v 1.97 2022/01/09 05:42:38 jsg Exp $ */
/* $NetBSD: aic7xxx.c,v 1.108 2003/11/02 11:07:44 wiz Exp $ */
/*
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGES.
*
- * $Id: aic7xxx.c,v 1.96 2021/05/01 16:11:15 visa Exp $
+ * $Id: aic7xxx.c,v 1.97 2022/01/09 05:42:38 jsg Exp $
*/
/*
* Ported from FreeBSD by Pascal Renauld, Network Storage Solutions, Inc. - April 2003
#if !defined(SMALL_KERNEL)
static struct ahc_hard_error_entry ahc_hard_errors[] = {
{ ILLHADDR, "Illegal Host Access" },
- { ILLSADDR, "Illegal Sequencer Address referrenced" },
+ { ILLSADDR, "Illegal Sequencer Address referenced" },
{ ILLOPCODE, "Illegal Opcode in sequencer program" },
{ SQPARERR, "Sequencer Parity Error" },
{ DPARERR, "Data-path Parity Error" },
};
/*
- * In most cases we only wish to itterate over real phases, so
+ * In most cases we only wish to iterate over real phases, so
* exclude the last element from the count.
*/
static const u_int num_phases = NUM_ELEMENTS(ahc_phase_table) - 1;
if (lastphase != P_BUSFREE) {
/*
* Renegotiate with this device at the
- * next oportunity just in case this busfree
+ * next opportunity just in case this busfree
* is due to a negotiation mismatch with the
* device.
*/
}
/*
- * Process an ingnore wide residue message.
+ * Process an ignore wide residue message.
*/
static void
ahc_handle_ign_wide_residue(struct ahc_softc *ahc, struct ahc_devinfo *devinfo)
/*
* Reset the controller and record some information about it
* that is only available just after a reset. If "reinit" is
- * non-zero, this reset occured after initial configuration
+ * non-zero, this reset occurred after initial configuration
* and the caller requests that the chip be fully reinitialized
* to a runable state. Chip interrupts are *not* enabled after
* a reinitialization. The caller must enable interrupts via
/*
* Touch all SCB bytes to avoid parity errors
* should one of our debugging routines read
- * an otherwise uninitiatlized byte.
+ * an otherwise uninitialized byte.
*/
for (j = 0; j < scbsize; j++)
ahc_outb(ahc, SCB_BASE+j, 0xFF);
* we have run out of ATIO resources to drain that
* queue, we may not get them all out here. Further,
* the blocked transactions for the reset channel
- * should just be killed off, irrespecitve of whether
+ * should just be killed off, irrespective of whether
* we are blocked on ATIO resources. Write a routine
* to compact the tqinfifo appropriately.
*/
cur_patch += cur_patch->skip_patch;
} else {
/* Accepted this patch. Advance to the next
- * one and wait for our intruction pointer to
+ * one and wait for our instruction pointer to
* hit this point.
*/
cur_patch++;
-/* $OpenBSD: aic7xxx_cam.h,v 1.9 2020/02/06 17:24:18 krw Exp $ */
+/* $OpenBSD: aic7xxx_cam.h,v 1.10 2022/01/09 05:42:38 jsg Exp $ */
/* $NetBSD: aic7xxx_cam.h,v 1.3 2003/04/20 11:17:20 fvdl Exp $ */
/*
CAM_REQ_ABORTED, /* CCB request aborted by the host */
CAM_UA_ABORT, /* Unable to abort CCB request */
CAM_REQ_CMP_ERR, /* CCB request completed with an error */
- CAM_BUSY, /* CAM subsytem is busy */
+ CAM_BUSY, /* CAM subsystem is busy */
CAM_REQ_INVALID, /* CCB request was invalid */
CAM_PATH_INVALID, /* Supplied Path ID is invalid */
CAM_SEL_TIMEOUT, /* Target Selection Timeout */
-/* $OpenBSD: aic7xxxvar.h,v 1.36 2020/07/29 16:57:22 krw Exp $ */
+/* $OpenBSD: aic7xxxvar.h,v 1.37 2022/01/09 05:42:38 jsg Exp $ */
/*
* Core definitions and data structures shareable across OS platforms.
*
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGES.
*
- * $Id: aic7xxxvar.h,v 1.36 2020/07/29 16:57:22 krw Exp $
+ * $Id: aic7xxxvar.h,v 1.37 2022/01/09 05:42:38 jsg Exp $
*
* $FreeBSD: src/sys/dev/aic7xxx/aic7xxx.h,v 1.50 2003/12/17 00:02:09 gibbs Exp $
*/
/************************ Target Mode Definitions *****************************/
/*
- * Connection desciptor for select-in requests in target mode.
+ * Connection descriptor for select-in requests in target mode.
*/
struct target_cmd {
uint8_t scsiid; /* Our ID and the initiator's ID */
-/* $OpenBSD: ami.c,v 1.260 2020/10/15 00:01:24 krw Exp $ */
+/* $OpenBSD: ami.c,v 1.261 2022/01/09 05:42:38 jsg Exp $ */
/*
* Copyright (c) 2001 Michael Shalayeff
* - 467 and 475 model cards, docs
* American Megatrends Inc.;
*
- * - uninterruptable electric power for cvs
+ * - uninterruptible electric power for cvs
* Theo de Raadt.
*/
}
}
- /* count unsued disks */
+ /* count unused disks */
for(i = 0; i < sc->sc_channels * 16; i++) {
if (sc->sc_plist[i])
continue; /* skip claimed drives */
-/* $OpenBSD: ar5210.c,v 1.47 2016/01/12 09:28:09 stsp Exp $ */
+/* $OpenBSD: ar5210.c,v 1.48 2022/01/09 05:42:38 jsg Exp $ */
/*
* Copyright (c) 2004, 2005, 2006, 2007 Reyk Floeter <reyk@openbsd.org>
ar5k_ar5210_set_mcast_filter(struct ath_hal *hal, u_int32_t filter0,
u_int32_t filter1)
{
- /* Set the multicat filter */
+ /* Set the multicast filter */
AR5K_REG_WRITE(AR5K_AR5210_MCAST_FIL0, filter0);
AR5K_REG_WRITE(AR5K_AR5210_MCAST_FIL1, filter1);
}
ar5k_ar5210_set_rx_filter(struct ath_hal *hal, u_int32_t filter)
{
/*
- * The AR5210 uses promiscous mode to detect radar activity
+ * The AR5210 uses promiscuous mode to detect radar activity
*/
if (filter & HAL_RX_FILTER_PHYRADAR) {
filter &= ~HAL_RX_FILTER_PHYRADAR;
int i;
/*
- * Wait for beaconn queue to be done
+ * Wait for beacon queue to be done
*/
for (i = (AR5K_TUNE_BEACON_INTERVAL / 2); i > 0 &&
(AR5K_REG_READ(AR5K_AR5210_BSR) &
-/* $OpenBSD: ar5210reg.h,v 1.13 2007/03/12 01:04:52 reyk Exp $ */
+/* $OpenBSD: ar5210reg.h,v 1.14 2022/01/09 05:42:38 jsg Exp $ */
/*
* Copyright (c) 2004, 2005, 2006, 2007 Reyk Floeter <reyk@openbsd.org>
#define _AR5K_AR5210_REG_H
/*
- * First tansmit queue descriptor pointer register ("data queue")
+ * First transmit queue descriptor pointer register ("data queue")
*/
#define AR5K_AR5210_TXDP0 0x0000
-/* $OpenBSD: ar5210var.h,v 1.15 2016/01/12 09:28:09 stsp Exp $ */
+/* $OpenBSD: ar5210var.h,v 1.16 2022/01/09 05:42:38 jsg Exp $ */
/*
* Copyright (c) 2004, 2005, 2006, 2007 Reyk Floeter <reyk@openbsd.org>
/*
* Internal RX/TX descriptor structures
- * (rX: reserved fields possibily used by future versions of the ar5k chipset)
+ * (rX: reserved fields possibly used by future versions of the ar5k chipset)
*/
struct ar5k_ar5210_rx_desc {
-/* $OpenBSD: ar5211.c,v 1.50 2018/01/31 11:27:03 stsp Exp $ */
+/* $OpenBSD: ar5211.c,v 1.51 2022/01/09 05:42:38 jsg Exp $ */
/*
* Copyright (c) 2004, 2005, 2006, 2007 Reyk Floeter <reyk@openbsd.org>
ar5k_ar5211_set_mcast_filter(struct ath_hal *hal, u_int32_t filter0,
u_int32_t filter1)
{
- /* Set the multicat filter */
+ /* Set the multicast filter */
AR5K_REG_WRITE(AR5K_AR5211_MCAST_FIL0, filter0);
AR5K_REG_WRITE(AR5K_AR5211_MCAST_FIL1, filter1);
}
HAL_BOOL ret;
/*
- * Wait for beaconn queue to be done
+ * Wait for beacon queue to be done
*/
ret = ar5k_register_timeout(hal,
AR5K_AR5211_QCU_STS(HAL_TX_QUEUE_ID_BEACON),
b = 1;
/*
- * XXX The AR5211 tranceiver supports frequencies from 4920 to 6100GHz
+ * XXX The AR5211 transceiver supports frequencies from 4920 to 6100GHz
* XXX and from 2312 to 2732GHz. There are problems with the current
* XXX ieee80211 implementation because the IEEE channel mapping
* XXX does not support negative channel numbers (2312MHz is channel
-/* $OpenBSD: ar5211var.h,v 1.10 2007/03/12 01:04:52 reyk Exp $ */
+/* $OpenBSD: ar5211var.h,v 1.11 2022/01/09 05:42:38 jsg Exp $ */
/*
* Copyright (c) 2004, 2005, 2006, 2007 Reyk Floeter <reyk@openbsd.org>
/*
* Internal RX/TX descriptor structures
- * (rX: reserved fields possibily used by future versions of the ar5k chipset)
+ * (rX: reserved fields possibly used by future versions of the ar5k chipset)
*/
struct ar5k_ar5211_rx_desc {
-/* $OpenBSD: ar5212.c,v 1.59 2018/02/03 17:17:31 stsp Exp $ */
+/* $OpenBSD: ar5212.c,v 1.60 2022/01/09 05:42:38 jsg Exp $ */
/*
* Copyright (c) 2004, 2005, 2006, 2007 Reyk Floeter <reyk@openbsd.org>
ar5k_ar5212_set_mcast_filter(struct ath_hal *hal, u_int32_t filter0,
u_int32_t filter1)
{
- /* Set the multicat filter */
+ /* Set the multicast filter */
AR5K_REG_WRITE(AR5K_AR5212_MCAST_FIL0, filter0);
AR5K_REG_WRITE(AR5K_AR5212_MCAST_FIL1, filter1);
}
HAL_BOOL ret;
/*
- * Wait for beaconn queue to be done
+ * Wait for beacon queue to be done
*/
ret = ar5k_register_timeout(hal,
AR5K_AR5212_QCU_STS(HAL_TX_QUEUE_ID_BEACON),
b = 1;
/*
- * XXX The AR5212 tranceiver supports frequencies from 4920 to 6100GHz
+ * XXX The AR5212 transceiver supports frequencies from 4920 to 6100GHz
* XXX and from 2312 to 2732GHz. There are problems with the current
* XXX ieee80211 implementation because the IEEE channel mapping
* XXX does not support negative channel numbers (2312MHz is channel
-/* $OpenBSD: ar5212var.h,v 1.15 2008/07/30 07:15:39 reyk Exp $ */
+/* $OpenBSD: ar5212var.h,v 1.16 2022/01/09 05:42:38 jsg Exp $ */
/*
* Copyright (c) 2004, 2005, 2006, 2007 Reyk Floeter <reyk@openbsd.org>
/*
* Internal RX/TX descriptor structures
- * (rX: reserved fields possibily used by future versions of the ar5k chipset)
+ * (rX: reserved fields possibly used by future versions of the ar5k chipset)
*/
struct ar5k_ar5212_rx_desc {
-/* $OpenBSD: ar5416.c,v 1.22 2021/04/15 18:25:43 stsp Exp $ */
+/* $OpenBSD: ar5416.c,v 1.23 2022/01/09 05:42:38 jsg Exp $ */
/*-
* Copyright (c) 2009 Damien Bergamini <damien.bergamini@free.fr>
cckinc = (sc->flags & ATHN_FLAG_OLPC) ? -2 : 0;
memset(power, 0, sizeof(power));
- /* Shuffle target powers accross transmit rates. */
+ /* Shuffle target powers across transmit rates. */
power[ATHN_POWER_OFDM6 ] =
power[ATHN_POWER_OFDM9 ] =
power[ATHN_POWER_OFDM12] =
ar5008_write_txpower(sc, power);
/*
- * Write transmit power substraction for dynamic chain changing
+ * Write transmit power subtraction for dynamic chain changing
* and per-packet transmit power.
*/
AR_WRITE(sc, AR_PHY_POWER_TX_SUB,
-/* $OpenBSD: ar9003.c,v 1.53 2021/04/15 18:25:43 stsp Exp $ */
+/* $OpenBSD: ar9003.c,v 1.54 2022/01/09 05:42:38 jsg Exp $ */
/*-
* Copyright (c) 2010 Damien Bergamini <damien.bergamini@free.fr>
y5 = (y5 * tmp) / order5x;
y5 = y5 / order5xrem;
- /* Third oder. */
+ /* Third order. */
y3 = (alpha * tmp) / order3x;
y3 = (y3 * tmp) / order3x;
y3 = (y3 * tmp) / order3x;
y5 = (y5 * tmp) / order5x;
y5 = y5 / order5xrem;
- /* Third oder. */
+ /* Third order. */
if (beta > 0) /* XXX alpha? */
y3 = (alpha * tmp - order3x) / order3x;
else
-/* $OpenBSD: ar9285.c,v 1.29 2021/04/15 18:25:43 stsp Exp $ */
+/* $OpenBSD: ar9285.c,v 1.30 2022/01/09 05:42:38 jsg Exp $ */
/*-
* Copyright (c) 2009-2010 Damien Bergamini <damien.bergamini@free.fr>
}
memset(power, 0, sizeof(power));
- /* Shuffle target powers accross transmit rates. */
+ /* Shuffle target powers across transmit rates. */
power[ATHN_POWER_OFDM6 ] =
power[ATHN_POWER_OFDM9 ] =
power[ATHN_POWER_OFDM12 ] =
-/* $OpenBSD: ar9287.c,v 1.29 2021/04/15 18:25:43 stsp Exp $ */
+/* $OpenBSD: ar9287.c,v 1.30 2022/01/09 05:42:38 jsg Exp $ */
/*-
* Copyright (c) 2009 Damien Bergamini <damien.bergamini@free.fr>
}
memset(power, 0, sizeof(power));
- /* Shuffle target powers accross transmit rates. */
+ /* Shuffle target powers across transmit rates. */
power[ATHN_POWER_OFDM6 ] =
power[ATHN_POWER_OFDM9 ] =
power[ATHN_POWER_OFDM12 ] =
-/* $OpenBSD: ar9380.c,v 1.27 2021/04/15 18:25:43 stsp Exp $ */
+/* $OpenBSD: ar9380.c,v 1.28 2022/01/09 05:42:38 jsg Exp $ */
/*-
* Copyright (c) 2011 Damien Bergamini <damien.bergamini@free.fr>
}
memset(power, 0, sizeof(power));
- /* Shuffle target powers accross transmit rates. */
+ /* Shuffle target powers across transmit rates. */
power[ATHN_POWER_OFDM6 ] =
power[ATHN_POWER_OFDM9 ] =
power[ATHN_POWER_OFDM12] =
-/* $OpenBSD: atw.c,v 1.98 2020/07/10 13:22:19 patrick Exp $ */
+/* $OpenBSD: atw.c,v 1.99 2022/01/09 05:42:38 jsg Exp $ */
/* $NetBSD: atw.c,v 1.69 2004/07/23 07:07:55 dyoung Exp $ */
/*-
/*
* Load the DMA map. Copy and try (once) again if the packet
- * didn't fit in the alloted number of segments.
+ * didn't fit in the allotted number of segments.
*/
for (first = 1;
(error = bus_dmamap_load_mbuf(sc->sc_dmat, dmamap, m0,
-/* $OpenBSD: bwfmreg.h,v 1.24 2021/12/27 17:12:34 patrick Exp $ */
+/* $OpenBSD: bwfmreg.h,v 1.25 2022/01/09 05:42:38 jsg Exp $ */
/*
* Copyright (c) 2010-2016 Broadcom Corporation
* Copyright (c) 2016,2017 Patrick Wildt <patrick@blueri.se>
uint16_t pad_1;
struct bwfm_sta_rateset_v7 rateset_adv;
uint16_t wpauth; /* authentication type */
- uint8_t algo; /* crypto alogorithm */
+ uint8_t algo; /* crypto algorithm */
uint8_t pad_2;
uint32_t tx_rspec;/* Rate of last successful tx frame */
uint32_t rx_rspec;/* Rate of last successful rx frame */
-/* $OpenBSD: bwi.c,v 1.131 2021/05/16 15:10:19 deraadt Exp $ */
+/* $OpenBSD: bwi.c,v 1.132 2022/01/09 05:42:38 jsg Exp $ */
/*
* Copyright (c) 2007 The DragonFly Project. All rights reserved.
}
}
- /* At least one MAC shold exist */
+ /* At least one MAC should exist */
if (!BWI_REGWIN_EXIST(&sc->sc_mac[0].mac_regwin)) {
printf("%s: no MAC was found\n", sc->sc_dev.dv_xname);
return (ENXIO);
else if (modtype == IEEE80211_MODTYPE_DS)
bwi_ds_plcp_header(plcp, pkt_len, rate);
else
- panic("unsupport modulation type %u", modtype);
+ panic("unsupported modulation type %u", modtype);
}
enum bwi_modtype
if (!bwi_regwin_is_enabled(sc, bus))
bwi_regwin_enable(sc, bus, 0);
- /* Disable interripts */
+ /* Disable interrupts */
CSR_WRITE_4(sc, BWI_INTRVEC, 0);
return (bwi_regwin_switch(sc, old, NULL));
-/* $OpenBSD: bwireg.h,v 1.10 2019/05/10 16:44:36 bcook Exp $ */
+/* $OpenBSD: bwireg.h,v 1.11 2022/01/09 05:42:38 jsg Exp $ */
/*
* Copyright (c) 2007 The DragonFly Project. All rights reserved.
0x1a1d, 0x1719, 0x1616, 0x1414, 0x1414, 0x1400, 0x1414, 0x1614, \
0x1716, 0x1a19, 0x1f1d, 0x2521, 0x2a27, 0x2f2a, 0x332d, 0x3b35, \
0x5140, 0x6c62, 0x0077
-/* G PHY Revsion 7 */
+/* G PHY Revision 7 */
#define BWI_PHY_NOISE_SCALE_11G_REV7 \
0xa4a4, 0xa4a4, 0xa4a4, 0xa4a4, 0xa4a4, 0xa4a4, 0xa4a4, 0xa4a4, \
0xa4a4, 0xa4a4, 0xa4a4, 0xa4a4, 0xa4a4, 0xa400, 0xa4a4, 0xa4a4, \
-/* $OpenBSD: cac.c,v 1.74 2021/03/07 06:21:38 jsg Exp $ */
+/* $OpenBSD: cac.c,v 1.75 2022/01/09 05:42:38 jsg Exp $ */
/* $NetBSD: cac.c,v 1.15 2000/11/08 19:20:35 ad Exp $ */
/*
ccb->ccb_xs = xs;
if (!xs || xs->flags & SCSI_POLL) {
- /* Synchronous commands musn't wait. */
+ /* Synchronous commands mustn't wait. */
mtx_enter(&sc->sc_ccb_mtx);
if ((*sc->sc_cl->cl_fifo_full)(sc)) {
mtx_leave(&sc->sc_ccb_mtx);
-/* $OpenBSD: cacreg.h,v 1.6 2008/10/29 21:17:15 brad Exp $ */
+/* $OpenBSD: cacreg.h,v 1.7 2022/01/09 05:42:38 jsg Exp $ */
/* $NetBSD: cacreg.h,v 1.5 2001/01/10 16:48:04 ad Exp $ */
/*-
u_int8_t memfail; /* cache mem failure */
u_int8_t expfail; /* expansion failure */
u_int8_t rebldfail; /* rebuild failure */
-#define CAC_LD_RBLD_READ 0x01 /* read faild */
+#define CAC_LD_RBLD_READ 0x01 /* read failed */
#define CAC_LD_RBLD_WRITE 0x02 /* write fail */
u_int8_t bigfailed[16]; /* bigmap vers of same of the above */
u_int8_t bigremapcnt[256];
-/* $OpenBSD: cd1190reg.h,v 1.4 2008/11/29 01:55:06 ray Exp $ */
+/* $OpenBSD: cd1190reg.h,v 1.5 2022/01/09 05:42:38 jsg Exp $ */
/*-
* Copyright (c) 1998 Iain Hibbert.
#define CD1190_SCR_STATUS (CD1190_SCR_IP3 | CD1190_SCR_IP2 | CD1190_SCR_IP1)
-/* Outout signals - Active High?
+/* Output signals - Active High?
*
* IP3 - SLIN
* IP2 - *INIT / *RESET
/* Strobe Width Register */
#define CD1190_SWR 0x02
-/* Timer Multipler Register */
+/* Timer Multiplier Register */
#define CD1190_TMR 0x05
/* Timer Prescale Register */
-/* $OpenBSD: ciss.c,v 1.89 2020/09/22 19:32:52 krw Exp $ */
+/* $OpenBSD: ciss.c,v 1.90 2022/01/09 05:42:38 jsg Exp $ */
/*
* Copyright (c) 2005,2006 Michael Shalayeff
}
/*
- * submit a command and optionally wait for completition.
+ * submit a command and optionally wait for completion.
* wait arg abuses SCSI_POLL|SCSI_NOSLEEP flags to request
* to wait (SCSI_POLL) and to allow tsleep() (!SCSI_NOSLEEP)
* instead of busy loop waiting
-/* $OpenBSD: cissreg.h,v 1.11 2010/06/03 01:02:13 dlg Exp $ */
+/* $OpenBSD: cissreg.h,v 1.12 2022/01/09 05:42:38 jsg Exp $ */
/*
* Copyright (c) 2005,2006 Michael Shalayeff
u_int8_t memfail; /* cache mem failure */
u_int8_t expfail; /* expansion failure */
u_int8_t rebldfail; /* rebuild failure */
-#define CISS_LD_RBLD_READ 0x01 /* read faild */
+#define CISS_LD_RBLD_READ 0x01 /* read failed */
#define CISS_LD_RBLD_WRITE 0x02 /* write fail */
u_int8_t bigfailed[16]; /* bigmap vers of same of the above */
u_int8_t bigremapcnt[256];
-/* $OpenBSD: cs4231reg.h,v 1.7 2010/06/30 11:21:35 jakemsr Exp $ */
+/* $OpenBSD: cs4231reg.h,v 1.8 2022/01/09 05:42:38 jsg Exp $ */
/* $NetBSD: cs4231reg.h,v 1.4 1996/02/16 08:12:33 mycroft Exp $ */
/*-
#define CS_IRQ_STATUS 0x18
#define CS_IRQ_PU 0x01 /* Playback Underrun */
#define CS_IRQ_PO 0x02 /* Playback Overrun */
-#define CS_IRQ_CO 0x04 /* Capture Overrrun */
+#define CS_IRQ_CO 0x04 /* Capture Overrun */
#define CS_IRQ_CU 0x08 /* Capture Underrun */
#define CS_IRQ_PI 0x10 /* Playback Interrupt */
#define CS_IRQ_CI 0x20 /* Capture Interrupt */
-/* $OpenBSD: dc21040reg.h,v 1.15 2005/11/07 00:03:09 brad Exp $ */
+/* $OpenBSD: dc21040reg.h,v 1.16 2022/01/09 05:42:38 jsg Exp $ */
/* $NetBSD: dc21040reg.h,v 1.11 1997/06/08 18:44:02 thorpej Exp $ */
/*-
/* XXX The following only works with 21x4x chips which have
* the descriptor swap bit. 21040 chips need to have the
- * descriptor in LE order regardles.............
+ * descriptor in LE order regardless.............
*/
#if defined(BYTE_ORDER) && BYTE_ORDER == BIG_ENDIAN
#define TULIP_BITFIELD2(a, b) b, a
-/* $OpenBSD: dcreg.h,v 1.53 2015/11/25 03:56:32 dlg Exp $ */
+/* $OpenBSD: dcreg.h,v 1.54 2022/01/09 05:42:38 jsg Exp $ */
/*
* Copyright (c) 1997, 1998, 1999
/*
* The first two general purpose pins control speed selection and
* 100Mbps loopback on the 82c168 chip. The control bits should always
- * be set (to make the data pins outputs) and the speed selction and
+ * be set (to make the data pins outputs) and the speed selection and
* loopback bits set accordingly when changing media. Physically, this
* will set the state of a relay mounted on the card.
*/
-/* $OpenBSD: dp8390.c,v 1.62 2020/07/10 13:22:19 patrick Exp $ */
+/* $OpenBSD: dp8390.c,v 1.63 2022/01/09 05:42:38 jsg Exp $ */
/* $NetBSD: dp8390.c,v 1.13 1998/07/05 06:49:11 jonathan Exp $ */
/*
if (sc->sc_media_fini != NULL)
(*sc->sc_media_fini)(sc);
- /* Delete all reamining media. */
+ /* Delete all remaining media. */
ifmedia_delete_instance(&sc->sc_media, IFM_INST_ANY);
ether_ifdetach(ifp);
-/* $OpenBSD: dp8390var.h,v 1.12 2010/08/29 18:01:21 deraadt Exp $ */
+/* $OpenBSD: dp8390var.h,v 1.13 2022/01/09 05:42:38 jsg Exp $ */
/* $NetBSD: dp8390var.h,v 1.8 1998/08/12 07:19:09 scottr Exp $ */
/*
#define DP8390_ATTACHED 0x0040 /* attach has succeeded */
/*
- * ASIX AX88796 doesn't have remote DMA conmplete bit in ISR, so don't
+ * ASIX AX88796 doesn't have remote DMA complete bit in ISR, so don't
* check ISR.RDC
*/
#define DP8390_NO_REMOTE_DMA_COMPLETE 0x0080
-/* $OpenBSD: dwiic.c,v 1.13 2021/11/07 14:07:43 stsp Exp $ */
+/* $OpenBSD: dwiic.c,v 1.14 2022/01/09 05:42:38 jsg Exp $ */
/*
* Synopsys DesignWare I2C controller
*
if (x == 0 && cmdlen > 0 && I2C_OP_READ_P(op))
cmd |= DW_IC_DATA_CMD_RESTART;
/*
- * Generate STOP conditon on the last byte of the
+ * Generate STOP condition on the last byte of the
* transfer.
*/
if (x == (len - 1) && I2C_OP_STOP_P(op))
-/* $OpenBSD: fxpvar.h,v 1.37 2013/12/06 21:03:03 deraadt Exp $ */
+/* $OpenBSD: fxpvar.h,v 1.38 2022/01/09 05:42:38 jsg Exp $ */
/* $NetBSD: if_fxpvar.h,v 1.1 1997/06/05 02:01:58 thorpej Exp $ */
/*
/*
* Bit-mask describing minimum size frame that will be bundled.
- * This is only effetive if the Intel microcode is loaded.
+ * This is only effective if the Intel microcode is loaded.
* This is not present in all microcode revisions. Disabled by default,
- * to reduce recieving immediately interrupts from all frames with size less
+ * to reduce receiving immediately interrupts from all frames with size less
* than 128 bytes.
*/
#ifndef FXP_MIN_SIZE_MASK
-/* $OpenBSD: hmereg.h,v 1.9 2008/06/26 05:42:15 ray Exp $ */
+/* $OpenBSD: hmereg.h,v 1.10 2022/01/09 05:42:38 jsg Exp $ */
/* $NetBSD: hmereg.h,v 1.8 2001/04/30 12:22:42 bouyer Exp $ */
/*-
#define HME_SEB_STAT_TXEACK 0x04000000 /* error during tx dma */
#define HME_SEB_STAT_TXLERR 0x08000000 /* late error during tx dma */
#define HME_SEB_STAT_TXPERR 0x10000000 /* parity error during tx dma */
-#define HME_SEB_STAT_TXTERR 0x20000000 /* tag error durig tx dma */
+#define HME_SEB_STAT_TXTERR 0x20000000 /* tag error during tx dma */
#define HME_SEB_STAT_SLVERR 0x40000000 /* pio access error */
#define HME_SEB_STAT_SLVPERR 0x80000000 /* pio access parity error */
#define HME_SEB_STAT_BITS \
-/* $OpenBSD: i82596.c,v 1.54 2020/07/10 13:22:19 patrick Exp $ */
+/* $OpenBSD: i82596.c,v 1.55 2022/01/09 05:42:38 jsg Exp $ */
/* $NetBSD: i82586.c,v 1.18 1998/08/15 04:42:42 mycroft Exp $ */
/*-
* sun-4/200's, and VME based suns. The byte order is all wrong for a
* SUN, making life difficult. Programming this chip is mostly the same,
* but certain details differ from system to system. This driver is
- * written so that different "ie" interfaces can be controled by the same
+ * written so that different "ie" interfaces can be controlled by the same
* driver.
*/
* i82596_setup_bufs: set up the buffers
*
* We have a block of KVA at sc->buf_area which is of size sc->buf_area_sz.
- * this is to be used for the buffers. The chip indexs its control data
+ * this is to be used for the buffers. The chip indexes its control data
* structures with 16 bit offsets, and it indexes actual buffers with
* 24 bit addresses. So we should allocate control buffers first so that
* we don't overflow the 16 bit offset field. The number of transmit
-/* $OpenBSD: i82596var.h,v 1.13 2015/09/18 09:54:08 miod Exp $ */
+/* $OpenBSD: i82596var.h,v 1.14 2022/01/09 05:42:38 jsg Exp $ */
/* $NetBSD: i82586var.h,v 1.10 1998/08/15 04:42:42 mycroft Exp $ */
/*-
* driver in `sc_scb'.
*
* The following functions provide the glue necessary to deal with
- * host and bus idiosyncracies:
+ * host and bus idiosyncrasies:
*
* hwreset - board reset
* hwinit - board initialization
#define PIC_ICW3 0x01 /* Initialization Command Word 3 (w) */
#define ICW3_CASCADE(x) (1U << (x)) /* cascaded mode enable */
-#define ICW3_SIC(x) ((x) << 0) /* slave identifcation code */
+#define ICW3_SIC(x) ((x) << 0) /* slave identification code */
#define PIC_ICW4 0x01 /* Initialization Command Word 4 (w) */
#define ICW4_8086 (1U << 0) /* 8086 mode */
-/* $OpenBSD: i82802reg.h,v 1.4 2009/10/23 12:48:49 jsg Exp $ */
+/* $OpenBSD: i82802reg.h,v 1.5 2022/01/09 05:42:38 jsg Exp $ */
/*
* Copyright (c) 2000 Michael Shalayeff
/*
* Register Based Locking Value Definitions
- * (tabe 4-6)
+ * (table 4-6)
*/
#define I82802_LV_FULL 0x00
#define I82802_LV_WRITE 0x01
-/* $OpenBSD: if_wi.c,v 1.175 2021/02/25 02:48:20 dlg Exp $ */
+/* $OpenBSD: if_wi.c,v 1.176 2022/01/09 05:42:38 jsg Exp $ */
/*
* Copyright (c) 1997, 1998, 1999
* wait for some more time if the scan is still in progress.
*
* XXX This doesn't work with wi@usb because it isn't safe
- * to call wi_read_record_usb() while beeing in the timeout
+ * to call wi_read_record_usb() while being in the timeout
* handler.
*/
wreq.wi_len = WI_MAX_DATALEN;
-/* $OpenBSD: if_wi_ieee.h,v 1.30 2014/08/24 18:01:27 zhuk Exp $ */
+/* $OpenBSD: if_wi_ieee.h,v 1.31 2022/01/09 05:42:38 jsg Exp $ */
/*
* Copyright (c) 1997, 1998, 1999
u_int8_t wi_addr4[6];
u_int16_t wi_dat_len;
/*
- * another wierdity with the drivers. they append a 802.3 header which
+ * another oddity with the drivers. they append a 802.3 header which
* is somewhat redundant, since all the same data is provided in the
* 802.11 header.
*/
-/* $OpenBSD: lancereg.h,v 1.2 2008/06/26 05:42:15 ray Exp $ */
+/* $OpenBSD: lancereg.h,v 1.3 2022/01/09 05:42:38 jsg Exp $ */
/* $NetBSD: lancereg.h,v 1.11 2003/11/02 11:07:45 wiz Exp $ */
/*-
#define LE_C4_APAD_XMT 0x0800 /* auto pad transmit */
#define LE_C4_ASTRP_RCV 0x0400 /* auto strip receive */
#define LE_C4_MFCO 0x0200 /* missed frame counter overflow */
-#define LE_C4_MFCOM 0x0100 /* missed frame coutner overflow mask */
+#define LE_C4_MFCOM 0x0100 /* missed frame counter overflow mask */
#define LE_C4_UINTCMD 0x0080 /* user interrupt command */
#define LE_C4_UINT 0x0040 /* user interrupt */
#define LE_C4_RCVCCO 0x0020 /* receive collision counter overflow */
#define LE_MODE_PROM 0x8000 /* promiscuous mode */
/* 0x7f80 reserved, must be zero */
/* 0x4000 - 0x0080 are not available on LANCE 7990 */
-#define LE_MODE_DRCVBC 0x4000 /* disable receive brodcast */
+#define LE_MODE_DRCVBC 0x4000 /* disable receive broadcast */
#define LE_MODE_DRCVPA 0x2000 /* disable physical address detection */
#define LE_MODE_DLNKTST 0x1000 /* disable link status */
#define LE_MODE_DAPC 0x0800 /* disable automatic polarity correction */
-/* $OpenBSD: lemacreg.h,v 1.2 2003/10/21 18:58:49 jmc Exp $ */
+/* $OpenBSD: lemacreg.h,v 1.3 2022/01/09 05:42:38 jsg Exp $ */
/* $NetBSD: lemacreg.h,v 1.2 2001/06/13 10:46:03 wiz Exp $ */
/*
#define LEMAC_TX_ISA 0x01 /* Insert Source Address (no) */
#define LEMAC_TX_IFC 0x02 /* Insert Frame Check (yes) */
#define LEMAC_TX_PAD 0x04 /* Zero PAD to minimum length (yes) */
-#define LEMAC_TX_LAB 0x08 /* Less Agressive Backoff (no) */
+#define LEMAC_TX_LAB 0x08 /* Less Aggressive Backoff (no) */
#define LEMAC_TX_QMD 0x10 /* Q-Mode (yes) */
#define LEMAC_TX_STP 0x20 /* Stop on Error (no) */
#define LEMAC_TX_SQE 0x40 /* SQE Enable (yes) */
-/* $OpenBSD: malo.c,v 1.121 2020/07/10 13:26:37 patrick Exp $ */
+/* $OpenBSD: malo.c,v 1.122 2022/01/09 05:42:38 jsg Exp $ */
/*
* Copyright (c) 2006 Claudio Jeker <claudio@openbsd.org>
/*
* we loaded the firmware into card memory now tell the CPU
* to fetch the code and execute it. The memory mapped via the
- * first bar is internaly mapped to 0xc0000000.
+ * first bar is internally mapped to 0xc0000000.
*/
malo_send_cmd(sc, 0xc000bef8);
-/* $OpenBSD: mfireg.h,v 1.50 2020/02/13 15:11:32 krw Exp $ */
+/* $OpenBSD: mfireg.h,v 1.51 2022/01/09 05:42:38 jsg Exp $ */
/*
* Copyright (c) 2006 Marco Peereboom <marco@peereboom.us>
*
uint8_t mip_reserved[24];
} __packed;
-/* host interface infor */
+/* host interface info */
struct mfi_info_host {
uint8_t mih_type;
#define MFI_INFO_HOST_PCIX 0x01
-/* $OpenBSD: mtd8xx.c,v 1.34 2021/03/07 06:21:38 jsg Exp $ */
+/* $OpenBSD: mtd8xx.c,v 1.35 2022/01/09 05:42:38 jsg Exp $ */
/*
* Copyright (c) 2003 Oleg Safiullin <form@pdp11.org.ru>
mtd_setmulti(sc);
if (mtd_list_rx_init(sc)) {
- printf("%s: can't allocate memeory for rx buffers\n",
+ printf("%s: can't allocate memory for rx buffers\n",
sc->sc_dev.dv_xname);
splx(s);
return;
-/* $OpenBSD: ncr53c9x.c,v 1.78 2021/03/07 06:21:38 jsg Exp $ */
+/* $OpenBSD: ncr53c9x.c,v 1.79 2022/01/09 05:42:38 jsg Exp $ */
/* $NetBSD: ncr53c9x.c,v 1.56 2000/11/30 14:41:46 thorpej Exp $ */
/*
* The recommended timeout is 250ms. This register is loaded
* with a value calculated as follows, from the docs:
*
- * (timout period) x (CLK frequency)
+ * (timeout period) x (CLK frequency)
* reg = -------------------------------------
* 8192 x (Clock Conversion Factor)
*
-/* $OpenBSD: ne2000.c,v 1.27 2015/11/24 17:11:39 mpi Exp $ */
+/* $OpenBSD: ne2000.c,v 1.28 2022/01/09 05:42:38 jsg Exp $ */
/* $NetBSD: ne2000.c,v 1.12 1998/06/10 01:15:50 thorpej Exp $ */
/*-
dsc->sc_reg_map[i] = i;
/*
- * NIC memory doens't start at zero on an NE board.
+ * NIC memory doesn't start at zero on an NE board.
* The start address is tied to the bus width.
* (It happens to be computed the same way as mem size.)
*/
-/* $OpenBSD: oosiop.c,v 1.34 2020/09/22 19:32:52 krw Exp $ */
+/* $OpenBSD: oosiop.c,v 1.35 2022/01/09 05:42:38 jsg Exp $ */
/* $NetBSD: oosiop.c,v 1.4 2003/10/29 17:45:55 tsutsui Exp $ */
/*
#define DATAIN_TRAP 0xdead0001
#define DATAOUT_TRAP 0xdead0002
-/* Possible TP and SCF conbination */
+/* Possible TP and SCF combination */
static const struct {
u_int8_t tp;
u_int8_t scf;
-/* $OpenBSD: pgt.c,v 1.101 2022/01/03 12:01:32 jsg Exp $ */
+/* $OpenBSD: pgt.c,v 1.102 2022/01/09 05:42:38 jsg Exp $ */
/*
* Copyright (c) 2006 Claudio Jeker <claudio@openbsd.org>
if (sc->sc_flags & (SC_DYING | SC_NEEDS_RESET))
return;
/*
- * If we're goign to kick the device out of power-save mode
+ * If we're going to kick the device out of power-save mode
* just to update the BSSID and such, we should not do it
* very often; need to determine in what way to do that.
*/
-/* $OpenBSD: rt2560.c,v 1.88 2020/07/20 07:45:44 stsp Exp $ */
+/* $OpenBSD: rt2560.c,v 1.89 2022/01/09 05:42:38 jsg Exp $ */
/*-
* Copyright (c) 2005, 2006
}
#endif
- /* turn assocation led on */
+ /* turn association led on */
rt2560_update_led(sc, 1, 0);
if (ic->ic_opmode == IEEE80211_M_STA) {
struct mbuf *mnew, *m;
int hw, error;
- /* retrieve last decriptor index processed by cipher engine */
+ /* retrieve last descriptor index processed by cipher engine */
hw = (RAL_READ(sc, RT2560_SECCSR0) - sc->rxq.physaddr) /
RT2560_RX_DESC_SIZE;
-/* $OpenBSD: rtl81x9reg.h,v 1.102 2021/05/07 00:37:36 jsg Exp $ */
+/* $OpenBSD: rtl81x9reg.h,v 1.103 2022/01/09 05:42:38 jsg Exp $ */
/*
* Copyright (c) 1997, 1998
#define RL_TDESC_STAT_COLCNT 0x000F0000 /* collision count */
#define RL_TDESC_STAT_EXCESSCOL 0x00100000 /* excessive collisions */
-#define RL_TDESC_STAT_LINKFAIL 0x00200000 /* link faulure */
+#define RL_TDESC_STAT_LINKFAIL 0x00200000 /* link failure */
#define RL_TDESC_STAT_OWINCOL 0x00400000 /* out-of-window collision */
#define RL_TDESC_STAT_TXERRSUM 0x00800000 /* transmit error summary */
-#define RL_TDESC_STAT_UNDERRUN 0x02000000 /* TX underrun occured */
+#define RL_TDESC_STAT_UNDERRUN 0x02000000 /* TX underrun occurred */
#define RL_TDESC_STAT_OWN 0x80000000
/*
-/* $OpenBSD: rtw.c,v 1.101 2019/09/12 12:55:07 stsp Exp $ */
+/* $OpenBSD: rtw.c,v 1.102 2022/01/09 05:42:39 jsg Exp $ */
/* $NetBSD: rtw.c,v 1.29 2004/12/27 19:49:16 dyoung Exp $ */
/*-
* descriptor in a single beacon interval, since that will
* enable multiple-BSS support. Since the NIC does not
* clear the OWN bit, there is no natural place for it to
- * stop processing BEACON desciptors. Maybe it will *not*
+ * stop processing BEACON descriptors. Maybe it will *not*
* stop processing them! I do not want to chance the NIC
* looping around and around a saturated beacon ring, so
* I will leave one descriptor unOWNed at all times.
/*
* Load the DMA map. Copy and try (once) again if the packet
- * didn't fit in the alloted number of segments.
+ * didn't fit in the allotted number of segments.
*/
for (first = 1;
((rc = bus_dmamap_load_mbuf(dmat, dmam, m0,
-/* $OpenBSD: rtwn.c,v 1.51 2020/07/10 13:22:20 patrick Exp $ */
+/* $OpenBSD: rtwn.c,v 1.52 2022/01/09 05:42:39 jsg Exp $ */
/*-
* Copyright (c) 2010 Damien Bergamini <damien.bergamini@free.fr>
/* Enable TSF synchronization. */
rtwn_tsf_sync_enable(sc);
- /* Intialize rate adaptation. */
+ /* Initialize rate adaptation. */
rtwn_ra_init(sc);
/* Turn link LED on. */
-/* $OpenBSD: rtwreg.h,v 1.14 2009/08/16 18:21:57 jsg Exp $ */
+/* $OpenBSD: rtwreg.h,v 1.15 2022/01/09 05:42:42 jsg Exp $ */
/* $NetBSD: rtwreg.h,v 1.12 2005/01/16 11:50:43 dyoung Exp $ */
/*-
* Copyright (c) 2004, 2005 David Young. All rights reserved.
*/
#define RTW_IMR 0x3c /* Interrupt Mask Register, 16b */
-#define RTW_ISR 0x3e /* Interrupt status register, 16b */
+#define RTW_ISR 0x3e /* Interrupt Status Register, 16b */
-#define RTW_INTR_TXFOVW (1<<15) /* Tx FIFO underrflow */
+#define RTW_INTR_TXFOVW (1<<15) /* Tx FIFO underflow */
#define RTW_INTR_TIMEOUT (1<<14) /* Time Out: 1 indicates
* RTW_TSFTR[0:31] = RTW_TINT
*/
-/* $OpenBSD: sili.c,v 1.59 2019/05/21 09:19:25 stsp Exp $ */
+/* $OpenBSD: sili.c,v 1.60 2022/01/09 05:42:42 jsg Exp $ */
/*
* Copyright (c) 2007 David Gwynne <dlg@openbsd.org>
"active %08x\n", PORTNAME(sp), err_port,
sactive ? "NCQ " : "", err_code, err_slot, sp->sp_active);
- /* Clear the failed commmand in saved PSS so cmd_done runs. */
+ /* Clear the failed command in saved PSS so cmd_done runs. */
pss_saved &= ~(1 << err_slot);
/* Track errored commands until we finish recovery */
sp->sp_err_cmds |= (1 << err_slot);
DPRINTF(SILI_D_VERBOSE, "%s: timing out slot %d, active %08x\n",
PORTNAME(sp), timeout_slot, sp->sp_active);
- /* Clear the failed commmand in saved PSS so cmd_done runs. */
+ /* Clear the failed command in saved PSS so cmd_done runs. */
pss_saved &= ~(1 << timeout_slot);
ccb = &sp->sp_ccbs[timeout_slot];
-/* $OpenBSD: siop.c,v 1.87 2021/03/07 06:21:38 jsg Exp $ */
+/* $OpenBSD: siop.c,v 1.88 2022/01/09 05:42:42 jsg Exp $ */
/* $NetBSD: siop.c,v 1.79 2005/11/18 23:10:32 bouyer Exp $ */
/*
goto scintr;
}
/*
- * else we have to restart it ourselve, at the
+ * else we have to restart it ourselves, at the
* interrupted instruction.
*/
bus_space_write_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh,
-/* $OpenBSD: siop_common.c,v 1.43 2021/03/07 06:21:38 jsg Exp $ */
+/* $OpenBSD: siop_common.c,v 1.44 2022/01/09 05:42:42 jsg Exp $ */
/* $NetBSD: siop_common.c,v 1.37 2005/02/27 00:27:02 perry Exp $ */
/*
offset = tables->msg_in[5];
options = tables->msg_in[7];
if (options != MSG_EXT_PPR_PROT_DT) {
- /* should't happen */
+ /* shouldn't happen */
printf("%s: ppr negotiation for target %d: "
"no DT option\n", sc->sc_dev.dv_xname, target);
siop_target->status = TARST_ASYNC;
siop_ctoh32(sc, siop_cmd->siop_tables->data[i].count);
/*
* if CMDFL_RESID is set, the last table (pointed by offset) is a
- * partial transfers. If not, offset points to the entry folloing
+ * partial transfers. If not, offset points to the entry following
* the last full transfer.
*/
if (siop_cmd->flags & CMDFL_RESID) {
} else {
/*
* now we really had a short xfer, by one byte.
- * handle it just as if we had a phase mistmatch
+ * handle it just as if we had a phase mismatch
* (there is a resid of one for this table).
* Update scratcha1 to reflect the fact that
* this xfer isn't complete.
-/* $OpenBSD: smc83c170.c,v 1.29 2020/07/10 13:26:37 patrick Exp $ */
+/* $OpenBSD: smc83c170.c,v 1.30 2022/01/09 05:42:42 jsg Exp $ */
/* $NetBSD: smc83c170.c,v 1.59 2005/02/27 00:27:02 perry Exp $ */
/*-
/*
* Load the DMA map. If this fails, the packet either
- * didn't fit in the alloted number of frags, or we were
+ * didn't fit in the allotted number of frags, or we were
* short on resources. In this case, we'll copy and try
* again.
*/
txcon &= ~(TXCON_LOOPBACK_D1|TXCON_LOOPBACK_D2);
bus_space_write_4(sc->sc_st, sc->sc_sh, EPIC_TXCON, txcon);
- /* On some cards we need manualy set fullduplex led */
+ /* On some cards we need manually set fullduplex led */
if (sc->sc_hwflags & EPIC_DUPLEXLED_ON_694) {
miicfg = bus_space_read_4(sc->sc_st, sc->sc_sh, EPIC_MIICFG);
if (IFM_OPTIONS(sc->sc_mii.mii_media_active) & IFM_FDX)
-/* $OpenBSD: smc83c170reg.h,v 1.2 2008/06/26 05:42:16 ray Exp $ */
+/* $OpenBSD: smc83c170reg.h,v 1.3 2022/01/09 05:42:42 jsg Exp $ */
/* $NetBSD: smc83c170reg.h,v 1.9 2003/11/08 16:08:13 tsutsui Exp $ */
/*-
* LAN2 [3-0] n8
*
* The LAN address is automatically recalled from the EEPROM after a
- * hard reseet.
+ * hard reset.
*/
#define EPIC_IDCHK 0x4c /* BOARD ID/CHECKSUM */
-/* $OpenBSD: smc83c170var.h,v 1.4 2015/09/11 13:02:28 stsp Exp $ */
+/* $OpenBSD: smc83c170var.h,v 1.5 2022/01/09 05:42:42 jsg Exp $ */
/* $NetBSD: smc83c170var.h,v 1.9 2005/02/04 02:10:37 perry Exp $ */
/*-
#define EPIC_CDFLOFF(x) EPIC_CDOFF(ecd_txfrags[(x)])
/*
- * Software state for transmit and receive desciptors.
+ * Software state for transmit and receive descriptors.
*/
struct epic_descsoft {
struct mbuf *ds_mbuf; /* head of mbuf chain */
-/* $OpenBSD: smc91cxx.c,v 1.50 2021/03/07 06:21:38 jsg Exp $ */
+/* $OpenBSD: smc91cxx.c,v 1.51 2022/01/09 05:42:42 jsg Exp $ */
/* $NetBSD: smc91cxx.c,v 1.11 1998/08/08 23:51:41 mycroft Exp $ */
/*-
/*
* Core driver for the SMC 91Cxx family of Ethernet chips.
*
- * Memory allocation interrupt logic is drived from an SMC 91C90 driver
+ * Memory allocation interrupt logic is derived from an SMC 91C90 driver
* written for NetBSD/amiga by Michael Hitch.
*/
if (packetno & ARR_FAILED || timo == 0) {
/*
* No transmit memory is available. Record the number
- * of requestd pages and enable the allocation completion
+ * of requested pages and enable the allocation completion
* interrupt. Set up the watchdog timer in case we miss
* the interrupt. Mark the interface as active so that
* no one else attempts to transmit while we're allocating
-/* $OpenBSD: smc91cxxreg.h,v 1.3 2006/01/23 14:42:55 martin Exp $ */
+/* $OpenBSD: smc91cxxreg.h,v 1.4 2022/01/09 05:42:42 jsg Exp $ */
/* $NetBSD: smc91cxxreg.h,v 1.2 1997/09/02 00:10:58 thorpej Exp $ */
/*
* the Ethernet Protocol Handler jumbled together. In auto-release
* mode this information is simply discarded after each TX. This info
* is copied to the status word of in-memory packets after transmit
- * where relevent statuses can be checked.
+ * where relevant statuses can be checked.
*/
#define EPH_STATUS_REG_W 0x02
/*
* The contents of this port are used by the adapter
- * to decode its I/O address. We use it as a varification
+ * to decode its I/O address. We use it as a verification
* that the adapter is detected properly when probing.
*/
#define BASE_ADDR_REG_W 0x02 /* The selected I/O Base addr. */
-/* $OpenBSD: tcic2reg.h,v 1.4 2013/11/26 20:33:16 deraadt Exp $ */
+/* $OpenBSD: tcic2reg.h,v 1.5 2022/01/09 05:42:42 jsg Exp $ */
/* $NetBSD: tcic2reg.h,v 1.1 1999/03/23 20:04:14 bad Exp $ */
/*-
#define TCIC_MCTL_WSCNT_MASK 0x0f /* wait state counter */
/* Bits in the ICTL window registers */
-#define TCIC_ICTL_ENA (1 << 15) /* enable this windo */
+#define TCIC_ICTL_ENA (1 << 15) /* enable this window */
#define TCIC_ICTL_SS_SHIFT 12
#define TCIC_ICTL_SS_MASK (7 << TCIC_ICTL_SS_SHIFT) /* which socket does this window map to */
#define TCIC_ICTL_AUTOSZ 0 /* auto size 8/16 bit acc. */
-/* $OpenBSD: ti.c,v 1.28 2020/12/12 11:48:52 jan Exp $ */
+/* $OpenBSD: ti.c,v 1.29 2022/01/09 05:42:42 jsg Exp $ */
/*
* Copyright (c) 1997, 1998, 1999
*
* The Tigon 2 contains 2 R4000 CPUs and requires a newer firmware
* revision, which supports new features such as extended commands,
- * extended jumbo receive ring desciptors and a mini receive ring.
+ * extended jumbo receive ring descriptors and a mini receive ring.
*
* Alteon Networks is to be commended for releasing such a vast amount
* of development material for the Tigon NIC without requiring an NDA
-/* $OpenBSD: tireg.h,v 1.5 2017/08/18 09:22:14 jsg Exp $ */
+/* $OpenBSD: tireg.h,v 1.6 2022/01/09 05:42:42 jsg Exp $ */
/*
* Copyright (c) 1997, 1998, 1999
#define TI_FIRMWARE_FIX 0xd
/*
- * Miscelaneous Local Control register.
+ * Miscellaneous Local Control registers.
*/
#define TI_MLC_EE_WRITE_ENB 0x00000010
#define TI_MLC_SRAM_BANK_SIZE 0x00000300 /* Tigon 2 only */
volatile u_int32_t nicInterrupts; /* 82 */
volatile u_int32_t nicAvoidedInterrupts; /* 83 */
/*
- * BD Coalessing Thresholds
+ * BD Coalescing Thresholds
*/
volatile u_int32_t nicEventThresholdHit; /* 84 */
volatile u_int32_t nicSendThresholdHit; /* 85 */
* The first thing in the packet is a 14-byte Ethernet header.
* This means that the packet is misaligned. To compensate,
* we actually offset the data 2 bytes into the cluster. This
- * alignes the packet after the Ethernet header at a 32-bit
+ * aligns the packet after the Ethernet header at a 32-bit
* boundary.
*/
/*
* Number of DMA segments in a TxCB. Note that this is carefully
* chosen to make the total struct size an even power of two. It's
- * critical that no TxCB be split across a page boundry since
+ * critical that no TxCB be split across a page boundary since
* no attempt is made to allocate physically contiguous memory.
*
*/
u_int16_t ti_cmd_saved_prodidx;
u_int16_t ti_std; /* current std ring head */
u_int16_t ti_mini; /* current mini ring head */
- u_int16_t ti_jumbo; /* current jumo ring head */
+ u_int16_t ti_jumbo; /* current jumbo ring head */
SLIST_HEAD(__ti_mchead, ti_mc_entry) ti_mc_listhead;
SLIST_HEAD(__ti_txmaphead, ti_txmap_entry) ti_tx_map_listhead;
u_int32_t ti_stat_ticks;
-/* $OpenBSD: trm.c,v 1.43 2020/09/22 19:32:52 krw Exp $
+/* $OpenBSD: trm.c,v 1.44 2022/01/09 05:42:42 jsg Exp $
* ------------------------------------------------------------
* O.S : OpenBSD
* File Name : trm.c
bval = sc->sc_AdaptSCSIID;
bus_space_write_1(iot, ioh, TRM_S1040_SCSI_HOSTID, bval);
/*
- * set ansynchronous transfer
+ * set asynchronous transfer
*/
bus_space_write_1(iot, ioh, TRM_S1040_SCSI_OFFSET, 0);
/*
-/* $OpenBSD: wd33c93.c,v 1.19 2020/09/22 19:32:53 krw Exp $ */
+/* $OpenBSD: wd33c93.c,v 1.20 2022/01/09 05:42:42 jsg Exp $ */
/* $NetBSD: wd33c93.c,v 1.24 2010/11/13 13:52:02 uebayasi Exp $ */
/*
do {
GET_SBIC_asr(sc, asr); /* XXX */
if (asr & SBIC_ASR_DBR) {
- printf("%s: %s: asr %02x canceled!\n",
+ printf("%s: %s: asr %02x cancelled!\n",
sc->sc_dev.dv_xname, __func__, asr);
break;
}
* We only really need to do anything when the target goes to MSG out
* If the device ignored ATN, it's probably old and brain-dead,
* but we'll try to support it anyhow.
- * If it doesn't support message out, it definately doesn't
+ * If it doesn't support message out, it definitely doesn't
* support synchronous transfers, so no point in even asking...
*/
if (csr == (SBIC_CSR_MIS_2 | MESG_OUT_PHASE)) {
*/
if (acb->xs->flags & SCSI_POLL ||
sc->sc_flags & SBICF_NODMA) {
- /* Perfrom transfer using PIO */
+ /* Perform transfer using PIO */
ssize_t resid;
SBIC_DEBUG(DMA, ("PIO xfer: %d(%p:%zx)\n", sc->target,
-/* $OpenBSD: wd33c93var.h,v 1.3 2020/07/25 13:50:49 krw Exp $ */
+/* $OpenBSD: wd33c93var.h,v 1.4 2022/01/09 05:42:42 jsg Exp $ */
/* $NetBSD: wd33c93var.h,v 1.10 2009/05/12 14:25:18 cegger Exp $ */
/*
#define T_NOSYNC 0x10 /* Force ASYNC mode */
#define T_NODISC 0x20 /* Don't allow disconnect */
#define T_TAG 0x40 /* Turn on TAG QUEUEs */
-#define T_WANTSYNC 0x80 /* Negotiatious should aim for sync */
+#define T_WANTSYNC 0x80 /* Negotiations should aim for sync */
u_char period; /* Period suggestion */
u_char offset; /* Offset suggestion */
struct wd33c93_linfo *lun[SBIC_NLUN]; /* LUN list for this target */
/* Data about the current nexus (updated for every cmd switch) */
void * sc_daddr; /* Current data pointer */
ssize_t sc_dleft; /* Data left to transfer */
- ssize_t sc_tcnt; /* number of bytes transfered */
+ ssize_t sc_tcnt; /* number of bytes transferred */
/* Lists of command blocks */
TAILQ_HEAD(acb_list, wd33c93_acb) ready_list;
-/* $OpenBSD: wdcvar.h,v 1.56 2017/07/12 13:40:59 mikeb Exp $ */
+/* $OpenBSD: wdcvar.h,v 1.57 2022/01/09 05:42:42 jsg Exp $ */
/* $NetBSD: wdcvar.h,v 1.17 1999/04/11 20:50:29 bouyer Exp $ */
/*-
#define WDC_CAPABILITY_NO_EXTRA_RESETS 0x0100 /* only reset once */
#define WDC_CAPABILITY_PREATA 0x0200 /* ctrl can be a pre-ata one */
#define WDC_CAPABILITY_IRQACK 0x0400 /* callback to ack interrupt */
-#define WDC_CAPABILITY_SINGLE_DRIVE 0x800 /* Don't proble second drive */
+#define WDC_CAPABILITY_SINGLE_DRIVE 0x800 /* Don't probe second drive */
#define WDC_CAPABILITY_NO_ATAPI_DMA 0x1000 /* Don't do DMA with ATAPI */
#define WDC_CAPABILITY_SATA 0x2000 /* SATA controller */
u_int8_t PIO_cap; /* highest PIO mode supported */
u_int8_t DMA_cap; /* highest DMA mode supported */
u_int8_t UDMA_cap; /* highest UDMA mode supported */
int nchannels; /* Number of channels on this controller */
- struct channel_softc **channels; /* channels-specific datas (array) */
+ struct channel_softc **channels; /* channel-specific data (array) */
u_int16_t quirks; /* per-device oddities */
#define WDC_QUIRK_NOSHORTDMA 0x0001 /* can't do short DMA transfers */
#define WDC_QUIRK_NOATA 0x0002 /* skip attaching ATA disks */
#define C_PRIVATEXFER 0x0400 /* privately managed xfer */
#define C_SCSIXFER 0x0800 /* SCSI managed xfer */
- /* Informations about our location */
+ /* Information about our location */
struct channel_softc *chp;
u_int8_t drive;
-/* $OpenBSD: xl.c,v 1.136 2020/12/12 11:48:52 jan Exp $ */
+/* $OpenBSD: xl.c,v 1.137 2022/01/09 05:42:42 jsg Exp $ */
/*
* Copyright (c) 1997, 1998, 1999
* of 0x1578 for its capabilities word, which is somewhat
* nonsensical. Another way to distinguish a 3c90x chip
* from a 3c90xB/C chip is to check for the 'supportsLargePackets'
- * bit. This will only be set for 3c90x boomerage chips.
+ * bit. This will only be set for 3c90x boomerang chips.
*/
xl_read_eeprom(sc, (caddr_t)&sc->xl_caps, XL_EE_CAPS, 1, 0);
if (sc->xl_caps & XL_CAPS_NO_TXLENGTH ||
-/* $OpenBSD: ad1848.c,v 1.45 2016/09/14 06:12:19 ratchov Exp $ */
+/* $OpenBSD: ad1848.c,v 1.46 2022/01/09 05:42:42 jsg Exp $ */
/* $NetBSD: ad1848.c,v 1.45 1998/01/30 02:02:38 augustss Exp $ */
/*
/*
* This function doesn't set the mute flags but does use them.
* The mute flags reflect the mutes that have been applied by the user.
- * However, the driver occasionally wants to mute devices (e.g. when chaing
+ * However, the driver occasionally wants to mute devices (e.g. when changing
* sampling rate). These operations should not affect the mute flags.
*/
void
-/* $OpenBSD: aps.c,v 1.26 2017/03/02 10:38:10 natano Exp $ */
+/* $OpenBSD: aps.c,v 1.27 2022/01/09 05:42:42 jsg Exp $ */
/*
* Copyright (c) 2005 Jonathan Gray <jsg@openbsd.org>
* Copyright (c) 2008 Can Erkin Acar <canacar@openbsd.org>
/*
* EC interface on Thinkpad Laptops, from Linux HDAPS driver notes.
- * From Renesans H8S/2140B Group Hardware Manual
+ * From Renesas H8S/2140B Group Hardware Manual
* http://documentation.renesas.com/eng/products/mpumcu/rej09b0300_2140bhm.pdf
*
* EC uses LPC Channel 3 registers TWR0..15
-/* $OpenBSD: ess.c,v 1.25 2021/03/07 06:17:03 jsg Exp $ */
+/* $OpenBSD: ess.c,v 1.26 2022/01/09 05:42:42 jsg Exp $ */
/* $NetBSD: ess.c,v 1.44.4.1 1999/06/21 01:18:00 thorpej Exp $ */
/*
* register 0x69 independently of mixer register
* 0x68. This determines which chip we have:
*
- * - can modify idependently indicates ES888
+ * - can modify independently indicates ES888
* - register 0x69 is an alias of 0x68 indicates ES1888
*/
reg1 = ess_read_mix_reg(sc, 0x68);
/*
- * Calculate the filter constant for the reuqested sampling rate.
+ * Calculate the filter constant for the requested sampling rate.
*/
u_int
ess_srtofc(u_int rate)
-/* $OpenBSD: essreg.h,v 1.3 2001/01/29 06:27:59 mickey Exp $ */
+/* $OpenBSD: essreg.h,v 1.4 2022/01/09 05:42:42 jsg Exp $ */
/* $NetBSD: essreg.h,v 1.12 1999/06/18 20:25:23 augustss Exp $ */
/*
* Copyright 1997
*/
/*
-** @(#) $RCSfile: essreg.h,v $ $Revision: 1.3 $ (SHARK) $Date: 2001/01/29 06:27:59 $
+** @(#) $RCSfile: essreg.h,v $ $Revision: 1.4 $ (SHARK) $Date: 2022/01/09 05:42:42 $
**
**++
**
* input or DMA completion. They seem to have neglected the fact
* that it would be nice to have a MIDI transmission complete interrupt.
* Worse, the DMA engine is half-duplex. This means you need to do
- * (timed) programmed I/O to be able to record and play simulataneously.
+ * (timed) programmed I/O to be able to record and play simultaneously.
*/
#define ESS_ACMD_DAC8WRITE 0x10 /* direct-mode 8-bit DAC write */
#define ESS_ACMD_DAC16WRITE 0x11 /* direct-mode 16-bit DAC write */
-/* $OpenBSD: gusreg.h,v 1.6 2008/06/26 05:42:16 ray Exp $ */
+/* $OpenBSD: gusreg.h,v 1.7 2022/01/09 05:42:42 jsg Exp $ */
/* $NetBSD: gusreg.h,v 1.6 1997/10/09 07:57:22 jtc Exp $ */
/*-
#define GUSMASK_BOTH_RQ 0x40 /* Combine both RQ lines */
/*
- * GUS bitmaks for DMA control
+ * GUS bitmasks for DMA control
*/
#define GUSMASK_DMA_ENABLE 0x01 /* Enable DMA transfer */
#define GUSMASK_DMA_READ 0x02 /* 1=read, 0=write */
-#define GUSMASK_DMA_WRITE 0x00 /* for consistancy */
+#define GUSMASK_DMA_WRITE 0x00 /* for consistency */
#define GUSMASK_DMA_WIDTH 0x04 /* Data transfer width */
#define GUSMASK_DMA_R0 0x00 /* Various DMA speeds */
#define GUSMASK_DMA_R1 0x08
-/* $OpenBSD: hsq.c,v 1.5 2008/11/22 10:33:33 deraadt Exp $ */
+/* $OpenBSD: hsq.c,v 1.6 2022/01/09 05:42:42 jsg Exp $ */
/*-
* Copyright (c) 1999 Denis A. Doroshenko. All rights reserved.
* 1/0. Let us call this register UER -- UARTs Enable Register.
* When a byte is read it is mask of bits for UARTs, that have some
* event(s), which are analyzed using that UART's IIR. Let us call
- * this register UIR -- UARTs Interrrupt Register.
+ * this register UIR -- UARTs Interrupt Register.
*
- * Note: four higher bits of the UIR are alway 1 for 4-channel mux,
+ * Note: four higher bits of the UIR are always 1 for 4-channel mux,
* I have no idea what could that mean, it would be better to have
* them zeroed.
*
* Shitty feature: UER's value upon power up is absolutely random,
- * so that UARTs can work and can not and you don't uderstand what's up...
+ * so that UARTs can work and can not and you don't understand what's up...
* Thus, we have to set its value to 0x0f to get all four UARTs
* interrupting, just after we've attached the mux...
*
-/* $OpenBSD: if_ec.c,v 1.17 2017/07/26 05:25:21 deraadt Exp $ */
+/* $OpenBSD: if_ec.c,v 1.18 2022/01/09 05:42:44 jsg Exp $ */
/* $NetBSD: if_ec.c,v 1.9 1998/07/05 06:49:12 jonathan Exp $ */
/*-
/* Now we can use the NIC_{GET,PUT}() macros. */
/*
- * Reset NIC and ASIC. Enable on-board transeiver throughout
+ * Reset NIC and ASIC. Enable on-board transceiver throughout
* reset sequence since it will lock up if the cable isn't
* connected if we don't.
*/
/*
* Unmap PROM - select NIC registers. The proper setting of the
- * transciever is set in later in ec_init_card() via dp8390_init().
+ * transceiver is set in later in ec_init_card() via dp8390_init().
*/
bus_space_write_1(asict, asich, ELINK2_CR, ELINK2_CR_XSEL);
ELINK2_GACFR_RSEL | ELINK2_GACFR_MBS0);
/*
- * Intialize "Vector Pointer" registers. These gawd-awful things
+ * Initialize "Vector Pointer" registers. These gawd-awful things
* are compared to 20 bits of the address on the ISA, and if they
* match, the shared memory is disabled. We se them to 0xffff0...
* allegedly the reset vector.
-/* $OpenBSD: if_elreg.h,v 1.2 1997/11/07 08:06:50 niklas Exp $ */
+/* $OpenBSD: if_elreg.h,v 1.3 2022/01/09 05:42:44 jsg Exp $ */
/* $NetBSD: if_elreg.h,v 1.4 1994/10/27 04:17:29 cgd Exp $ */
/*
#define EL_RBC 0xa /* Receive buffer clear */
#define EL_RBH 0xb /* Receive buffer ptr high byte */
#define EL_EAW 0xc /* Ethernet address window */
-#define EL_AS 0xe /* Auxillary status register */
-#define EL_AC 0xe /* Auxillary command register */
+#define EL_AS 0xe /* Auxiliary status register */
+#define EL_AC 0xe /* Auxiliary command register */
#define EL_BUF 0xf /* Data buffer */
/* Receive status register bits */
#define EL_TXC_DCOLL16 0x04 /* Detect collision 16 */
#define EL_TXC_DSUCCESS 0x08 /* Detect success */
-/* Auxillary status register bits */
+/* Auxiliary status register bits */
#define EL_AS_RXBUSY 0x01 /* Receive busy */
#define EL_AS_DMADONE 0x10 /* DMA finished */
#define EL_AS_TXBUSY 0x80 /* Transmit busy */
-/* Auxillary command register bits */
+/* Auxiliary command register bits */
#define EL_AC_HOST 0x00 /* System bus can access buffer */
#define EL_AC_IRQE 0x01 /* IRQ enable */
#define EL_AC_TXBAD 0x02 /* Transmit frames with bad FCS */
-/* $OpenBSD: if_wereg.h,v 1.3 2006/03/04 19:33:21 miod Exp $ */
+/* $OpenBSD: if_wereg.h,v 1.4 2022/01/09 05:42:44 jsg Exp $ */
/* $NetBSD: if_wereg.h,v 1.1 1997/11/03 21:22:50 thorpej Exp $ */
/*
* Compile-time config flags
*/
/*
- * This sets the default for enabling/disablng the transceiver.
+ * This sets the default for enabling/disabling the transceiver.
*/
#define WE_FLAGS_DISABLE_TRANSCEIVER 0x0001
-/* $OpenBSD: lm78_isa.c,v 1.10 2015/03/14 03:38:47 jsg Exp $ */
+/* $OpenBSD: lm78_isa.c,v 1.11 2022/01/09 05:42:44 jsg Exp $ */
/*
* Copyright (c) 2005, 2006 Mark Kettenis
return;
}
- /* Bus-independant attachment */
+ /* Bus-independent attachment */
sc->sc_lmsc.lm_writereg = lm_isa_writereg;
sc->sc_lmsc.lm_readreg = lm_isa_readreg;
-/* $OpenBSD: pcppi.c,v 1.17 2021/03/07 06:17:04 jsg Exp $ */
+/* $OpenBSD: pcppi.c,v 1.18 2022/01/09 05:42:44 jsg Exp $ */
/* $NetBSD: pcppi.c,v 1.1 1998/04/15 20:26:18 drochner Exp $ */
/*
*
* We don't want to have any chance of changing speaker output (which
* this test might, if it crashes in the middle, or something;
- * normally it's be to quick to produce anthing audible), but
+ * normally it's too quick to produce anything audible), but
* many "combo chip" mock-PPI's don't seem to support the top bit
* of Port B as a settable bit. The bottom bit has to be settable,
* since the speaker driver hardware still uses it.
-/* $OpenBSD: sbdsp.c,v 1.39 2021/03/07 06:17:04 jsg Exp $ */
+/* $OpenBSD: sbdsp.c,v 1.40 2022/01/09 05:42:44 jsg Exp $ */
/*
* Copyright (c) 1991-1993 Regents of the University of California.
}
/*
- * Turn on the speaker. The SBK documention says this operation
+ * Turn on the speaker. The SBK documentation says this operation
* can take up to 1/10 of a second. Higher level layers should
* probably let the task sleep for this amount of time after
* calling here. Otherwise, things might not work (because
-/* $OpenBSD: sbreg.h,v 1.6 2002/07/02 19:38:55 nate Exp $ */
+/* $OpenBSD: sbreg.h,v 1.7 2022/01/09 05:42:44 jsg Exp $ */
/* $NetBSD: sbreg.h,v 1.24 1997/08/24 23:24:51 augustss Exp $ */
/*
/*
* SoundBlaster register definitions.
* See "The Developer Kit for Sound Blaster Series, User's Guide" for more
- * complete information (avialable from Creative Labs, Inc.). We refer
+ * complete information (available from Creative Labs, Inc.). We refer
* to this documentation as "SBK".
*
* We handle two types of cards: the basic SB version 2.0+, and
* input or DMA completion. They seem to have neglected the fact
* that it would be nice to have a MIDI transmission complete interrupt.
* Worse, the DMA engine is half-duplex. This means you need to do
- * (timed) programmed I/O to be able to record and play simulataneously.
+ * (timed) programmed I/O to be able to record and play simultaneously.
*/
#define SB_DSP_DACWRITE 0x10 /* programmed I/O write to DAC */
#define SB_DSP_WDMA 0x14 /* begin 8-bit linear DMA output */
-/* $OpenBSD: tcic2_isa.c,v 1.9 2021/03/07 06:17:04 jsg Exp $ */
+/* $OpenBSD: tcic2_isa.c,v 1.10 2022/01/09 05:42:44 jsg Exp $ */
/* $NetBSD: tcic2_isa.c,v 1.2 1999/04/08 16:14:29 bad Exp $ */
#undef TCICISADEBUG
sc->memh = memh;
/*
- * determine chip type and initialise some chip type dependend
+ * determine chip type and initialise some chip type dependent
* parameters in softc.
*/
sc->chipid = tcic_chipid(iot, ioh);
-/* $OpenBSD: atphy.c,v 1.11 2016/07/09 15:59:22 kettenis Exp $ */
+/* $OpenBSD: atphy.c,v 1.12 2022/01/09 05:42:44 jsg Exp $ */
/*-
* Copyright (c) 2008, Pyun YongHyeon <yongari@FreeBSD.org>
* Due to an unknown reason powering down PHY resulted
* in unexpected results such as inaccessibility of
* hardware of freshly rebooted system. Disable
- * powering down PHY until I got more information for
- * Attansic/Atheros PHY hardwares.
+ * powering down PHY until I get more information for
+ * Attansic/Atheros PHY hardware.
*/
PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_ISO);
goto done;
-/* $OpenBSD: bmtphyreg.h,v 1.3 2005/02/04 23:23:56 brad Exp $ */
+/* $OpenBSD: bmtphyreg.h,v 1.4 2022/01/09 05:42:44 jsg Exp $ */
/* $NetBSD: bmtphyreg.h,v 1.1 2001/06/02 21:42:10 thorpej Exp $ */
/*-
#define INTR_LINK_CHANGE 0x0002 /* link change */
#define INTR_INTR_STATUS 0x0001 /* interrupt status */
-#define MII_BMTPHY_AUX2 0x1b /* auliliary mode 2 */
+#define MII_BMTPHY_AUX2 0x1b /* auxiliary mode 2 */
#define AUX2_BLOCK_RXDV 0x0200 /* block RXDV mode enabled */
#define AUX2_ANPDQ 0x0100 /* auto-neg parallel detection Q mode */
-/* $OpenBSD: brgphyreg.h,v 1.18 2020/04/14 21:00:27 kettenis Exp $ */
+/* $OpenBSD: brgphyreg.h,v 1.19 2022/01/09 05:42:44 jsg Exp $ */
/*
* Copyright (c) 2000
#define BRGPHY_5708S_BMCR_2500 0x20
-/* Autoneg Next Page Transmit 1 Regiser */
+/* Autoneg Next Page Transmit 1 Register */
#define BRGPHY_5708S_ANEG_NXT_PG_XMIT1 0x0B
#define BRGPHY_5708S_ANEG_NXT_PG_XMIT1_25G 0x0001
-/* $OpenBSD: ciphyreg.h,v 1.3 2015/07/19 06:28:12 yuo Exp $ */
+/* $OpenBSD: ciphyreg.h,v 1.4 2022/01/09 05:42:44 jsg Exp $ */
/* $FreeBSD: ciphyreg.h,v 1.1 2004/09/10 20:57:45 wpaul Exp $ */
/*
* Copyright (c) 2004
/* Vendor-specific PHY registers */
-/* 100baseTX status extention register */
+/* 100baseTX status extension register */
#define CIPHY_MII_100STS 0x10
#define CIPHY_100STS_DESLCK 0x8000 /* descrambler locked */
#define CIPHY_100STS_LKCERR 0x4000 /* lock error detected/lock lost */
#define CIPHY_100STS_SSDERR 0x0200 /* false carrier error detected */
#define CIPHY_100STS_ESDERR 0x0100 /* premature end of stream error */
-/* 1000BT status extention register #2 */
+/* 1000BT status extension register #2 */
#define CIPHY_MII_1000STS2 0x11
#define CIPHY_1000STS2_DESLCK 0x8000 /* descrambler locked */
#define CIPHY_1000STS2_LKCERR 0x4000 /* lock error detected/lock lost */
#define CIPHY_1000STS2_TXERR 0x0400 /* transmit error detected */
#define CIPHY_1000STS2_SSDERR 0x0200 /* false carrier error detected */
#define CIPHY_1000STS2_ESDERR 0x0100 /* premature end of stream error */
-#define CIPHY_1000STS2_CARREXT 0x0080 /* carrier extention err detected */
-#define CIPHY_1000STS2_BCM5400 0x0040 /* non-complient BCM5400 detected */
+#define CIPHY_1000STS2_CARREXT 0x0080 /* carrier extension err detected */
+#define CIPHY_1000STS2_BCM5400 0x0040 /* non-compliant BCM5400 detected */
/* Bypass control register */
#define CIPHY_MII_BYPASS 0x12
#define CIPHY_LED_LINKACTBLINK 0x0004 /* enable link/activity LED blink */
#define CIPHY_LED_BLINKRATE 0x0002 /* blink rate 0=10hz, 1=5hz */
-/* Auxilliary control and status register */
+/* Auxiliary control and status register */
#define CIPHY_MII_AUXCSR 0x1C
#define CIPHY_AUXCSR_ANEGDONE 0x8000 /* Autoneg complete */
#define CIPHY_AUXCSR_ANEGOFF 0x4000 /* Autoneg disabled */
-/* $OpenBSD: eephy.c,v 1.58 2020/11/03 21:49:41 patrick Exp $ */
+/* $OpenBSD: eephy.c,v 1.59 2022/01/09 05:42:44 jsg Exp $ */
/*
* Principal Author: Parag Patel
* Copyright (c) 2001
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
- * Additonal Copyright (c) 2001 by Traakan Software under same licence.
+ * Additional Copyright (c) 2001 by Traakan Software under same licence.
* Secondary Author: Matthew Jacob
*/
mii_phy_setmedia(sc);
/*
- * If autonegitation is not enabled, we need a
+ * If autonegotiation is not enabled, we need a
* software reset for the settings to take effect.
*/
if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) {
-/* $OpenBSD: eephyreg.h,v 1.8 2020/11/03 21:49:42 patrick Exp $ */
+/* $OpenBSD: eephyreg.h,v 1.9 2022/01/09 05:42:44 jsg Exp $ */
/*
* Principal Author: Parag Patel
* Copyright (c) 2001
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
- * Additonal Copyright (c) 2001 by Traakan Software under same licence.
+ * Additional Copyright (c) 2001 by Traakan Software under same licence.
* Secondary Author: Matthew Jacob
*/
-/* $OpenBSD: lxtphy.c,v 1.21 2021/03/05 09:37:20 jsg Exp $ */
+/* $OpenBSD: lxtphy.c,v 1.22 2022/01/09 05:42:44 jsg Exp $ */
/* $NetBSD: lxtphy.c,v 1.19 2000/02/02 23:34:57 thorpej Exp $ */
/*-
/*
* Get link status from the CSR; we need to read the CSR
* for media type anyhow, and the link status in the CSR
- * doens't latch, so fewer register reads are required.
+ * doesn't latch, so fewer register reads are required.
*/
csr = PHY_READ(sc, MII_LXTPHY_CSR);
if (csr & CSR_LINK)
-/* $OpenBSD: lxtphyreg.h,v 1.2 2008/06/26 05:42:16 ray Exp $ */
+/* $OpenBSD: lxtphyreg.h,v 1.3 2022/01/09 05:42:44 jsg Exp $ */
/* $NetBSD: lxtphyreg.h,v 1.1 1998/10/24 00:33:17 thorpej Exp $ */
/*-
/* All bits user-defined */
#define MII_LXTPHY_IER 0x11 /* Interrupt Enable Register */
-#define IER_MIIDRVLVL 0x0008 /* Rediced MII driver levels */
+#define IER_MIIDRVLVL 0x0008 /* Reduced MII driver levels */
#define IER_LNK_CRITERIA 0x0004 /* Enhanced Link Loss Criteria */
#define IER_INTEN 0x0002 /* Interrupt Enable */
#define IER_TINT 0x0001 /* Force Interrupt */
-/* $OpenBSD: mii.c,v 1.23 2015/12/29 18:35:39 mmcc Exp $ */
+/* $OpenBSD: mii.c,v 1.24 2022/01/09 05:42:44 jsg Exp $ */
/* $NetBSD: mii.c,v 1.19 2000/02/02 17:09:44 thorpej Exp $ */
/*-
*/
/*
- * MII bus layer, glues MII-capable network interface drivers to sharable
+ * MII bus layer, glues MII-capable network interface drivers to shareable
* PHY drivers. This exports an interface compatible with BSD/OS 3.0's,
* plus some NetBSD extensions.
*/
-/* $OpenBSD: tlphyreg.h,v 1.3 2010/07/23 07:47:13 jsg Exp $ */
+/* $OpenBSD: tlphyreg.h,v 1.4 2022/01/09 05:42:44 jsg Exp $ */
/* $NetBSD: tlphyreg.h,v 1.1 1998/08/10 23:59:58 thorpej Exp $ */
/*
#define MII_TLPHY_ID 0x10 /* ThunderLAN PHY ID */
#define ID_10BASETAUI 0x0001 /* 10baseT/AUI PHY */
-#define MII_TLPHY_CTRL 0x11 /* Control regiseter */
+#define MII_TLPHY_CTRL 0x11 /* Control register */
#define CTRL_ILINK 0x8000 /* Ignore link */
#define CTRL_SWPOL 0x4000 /* swap polarity */
#define CTRL_AUISEL 0x2000 /* Select AUI */
-/* $OpenBSD: fdt.c,v 1.27 2021/05/06 19:45:16 kettenis Exp $ */
+/* $OpenBSD: fdt.c,v 1.28 2022/01/09 05:42:45 jsg Exp $ */
/*
* Copyright (c) 2009 Dariusz Swiderski <sfires@sfires.net>
#ifdef DEBUG
/*
- * Debug methods for printing whole tree, particular odes and properies
+ * Debug methods for printing whole tree, particular nodes and properties
*/
void *
fdt_print_property(void *node, int level)
-/* $OpenBSD: agp_ali.c,v 1.15 2014/05/27 12:40:00 kettenis Exp $ */
+/* $OpenBSD: agp_ali.c,v 1.16 2022/01/09 05:42:45 jsg Exp $ */
/* $NetBSD: agp_ali.c,v 1.2 2001/09/15 00:25:00 thorpej Exp $ */
if (gatt != NULL)
break;
/*
- * almost certainly error allocating contigious dma memory
+ * almost certainly error allocating contiguous dma memory
* so reduce aperture so that the gatt size reduces.
*/
asc->asc_apsize /= 2;
-/* $OpenBSD: agp_amd.c,v 1.21 2015/09/09 19:47:11 deraadt Exp $ */
+/* $OpenBSD: agp_amd.c,v 1.22 2022/01/09 05:42:45 jsg Exp $ */
/* $NetBSD: agp_amd.c,v 1.6 2001/10/06 02:48:50 thorpej Exp $ */
/*-
break;
/*
- * almost certainly error allocating contigious dma memory
+ * almost certainly error allocating contiguous dma memory
* so reduce aperture so that the gatt size reduces.
*/
asc->asc_apsize /= 2;
-/* $OpenBSD: agp_intel.c,v 1.23 2014/05/27 12:40:00 kettenis Exp $ */
+/* $OpenBSD: agp_intel.c,v 1.24 2022/01/09 05:42:45 jsg Exp $ */
/* $NetBSD: agp_intel.c,v 1.3 2001/09/15 00:25:00 thorpej Exp $ */
/*-
break;
/*
- * almost certainly error allocating contigious dma memory
+ * almost certainly error allocating contiguous dma memory
* so reduce aperture so that the gatt size reduces.
*/
isc->isc_apsize /= 2;
-/* $OpenBSD: agp_sis.c,v 1.18 2014/05/27 12:40:00 kettenis Exp $ */
+/* $OpenBSD: agp_sis.c,v 1.19 2022/01/09 05:42:45 jsg Exp $ */
/* $NetBSD: agp_sis.c,v 1.2 2001/09/15 00:25:00 thorpej Exp $ */
/*-
break;
/*
- * Probably failed to alloc congigious memory. Try reducing the
+ * Probably failed to alloc contiguous memory. Try reducing the
* aperture so that the gatt size reduces.
*/
ssc->ssc_apsize /= 2;
-/* $OpenBSD: agp_via.c,v 1.20 2014/05/27 12:40:00 kettenis Exp $ */
+/* $OpenBSD: agp_via.c,v 1.21 2022/01/09 05:42:45 jsg Exp $ */
/* $NetBSD: agp_via.c,v 1.2 2001/09/15 00:25:00 thorpej Exp $ */
/*-
break;
/*
- * Probably failed to alloc congigious memory. Try reducing the
+ * Probably failed to alloc contiguous memory. Try reducing the
* aperture so that the gatt size reduces.
*/
vsc->vsc_apsize /= 2;
-/* $OpenBSD: agpvar.h,v 1.33 2015/12/19 16:07:20 kettenis Exp $ */
+/* $OpenBSD: agpvar.h,v 1.34 2022/01/09 05:42:45 jsg Exp $ */
/* $NetBSD: agpvar.h,v 1.4 2001/10/01 21:54:48 fvdl Exp $ */
/*-
int agp_release(void *);
/*
- * Enable the agp hardware with the relavent mode. The mode bits are
+ * Enable the agp hardware with the relevant mode. The mode bits are
* defined in <dev/pci/agpreg.h>
*/
int agp_enable(void *, u_int32_t);
-/* $OpenBSD: ahc_pci.c,v 1.60 2021/03/05 12:40:13 jsg Exp $ */
+/* $OpenBSD: ahc_pci.c,v 1.61 2022/01/09 05:42:45 jsg Exp $ */
/* $NetBSD: ahc_pci.c,v 1.43 2003/08/18 09:16:22 taca Exp $ */
/*
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGES.
*
- * $Id: ahc_pci.c,v 1.60 2021/03/05 12:40:13 jsg Exp $
+ * $Id: ahc_pci.c,v 1.61 2022/01/09 05:42:45 jsg Exp $
*
* //depot/aic7xxx/aic7xxx/aic7xxx_pci.c#57 $
*
/*
- * Test for the presense of external sram in an
+ * Test for the presence of external sram in an
* "unshared" configuration.
*/
static int
-/* $OpenBSD: ahd_pci.c,v 1.26 2020/07/24 12:43:31 krw Exp $ */
+/* $OpenBSD: ahd_pci.c,v 1.27 2022/01/09 05:42:45 jsg Exp $ */
/*
* Copyright (c) 2004 Milos Urbanek, Kenneth R. Westerback & Marco Peereboom
* Next create a situation where write combining
* or read prefetching could be initiated by the
* CPU or host bridge. Our device does not support
- * either, so look for data corruption and/or flaged
+ * either, so look for data corruption and/or flagged
* PCI errors. First pause without causing another
* chip reset.
*/
-/* $OpenBSD: ami_pci.c,v 1.43 2008/10/28 11:43:10 marco Exp $ */
+/* $OpenBSD: ami_pci.c,v 1.44 2022/01/09 05:42:45 jsg Exp $ */
/*
* Copyright (c) 2001 Michael Shalayeff
sc->sc_flags |= AMI_BROKEN;
} else {
/* this device existed at _match() should never happen */
- panic("ami device dissapeared between match() and attach()");
+ panic("ami device disappeared between match() and attach()");
}
printf("%s: %s, %s", sc->sc_dev.dv_xname, model, lhc);
-/* $OpenBSD: arc.c,v 1.120 2020/09/22 19:32:53 krw Exp $ */
+/* $OpenBSD: arc.c,v 1.121 2022/01/09 05:42:45 jsg Exp $ */
/*
* Copyright (c) 2006 David Gwynne <dlg@openbsd.org>
bd->bd_lun = diskinfo->scsi_attr.lun;
#endif
/*
- * the firwmare doesnt seem to fill scsi_attr in, so fake it with
+ * the firmware doesnt seem to fill scsi_attr in, so fake it with
* the diskid.
*/
bd->bd_channel = 0;
break;
case BIOC_SVINVALID:
- /* FALLTRHOUGH */
+ /* FALLTHROUGH */
default:
sc->sc_sensors[i].value = 0; /* unknown */
sc->sc_sensors[i].status = SENSOR_S_UNKNOWN;
-/* $OpenBSD: auacerreg.h,v 1.1 2008/08/28 10:21:23 mikeb Exp $ */
+/* $OpenBSD: auacerreg.h,v 1.2 2022/01/09 05:42:45 jsg Exp $ */
/* $NetBSD: auacer.h,v 1.1 2004/10/10 16:37:07 augustss Exp $ */
/*-
/*
* according to the dev/audiovar.h AU_RING_SIZE is 2^16, what fits
* in our limits perfectly, i.e. setting it to higher value
- * in your kernel config would improve perfomance, still 2^21 is the max
+ * in your kernel config would improve performance, still 2^21 is the max
*/
#define ALI_DMALIST_MAX 32
#define ALI_DMASEG_MAX (65536*2) /* 64k samples, 2x16 bit samples */
-/* $OpenBSD: auich.c,v 1.112 2019/08/22 09:47:29 miko Exp $ */
+/* $OpenBSD: auich.c,v 1.113 2022/01/09 05:42:45 jsg Exp $ */
/*
* Copyright (c) 2000,2001 Michael Shalayeff
bus_space_write_1(sc->iot, sc->aud_ioh, AUICH_PCMI + AUICH_LVI,
civ & AUICH_LVI_MASK);
- /* start, but don't request any interupts */
+ /* start, but don't request any interrupts */
microuptime(&t1);
bus_space_write_1(sc->iot, sc->aud_ioh, AUICH_PCMI + AUICH_CTRL,
AUICH_RPBM);
-/* $OpenBSD: auixp.c,v 1.43 2020/06/27 00:33:59 jsg Exp $ */
+/* $OpenBSD: auixp.c,v 1.44 2022/01/09 05:42:45 jsg Exp $ */
/* $NetBSD: auixp.c,v 1.9 2005/06/27 21:13:09 thorpej Exp $ */
/*
* codec support problem.
* - 32 bit recording works but can't try out playing: see above.
* - no suspend/resume support yet.
- * - multiple codecs are `supported' but not tested; the implemetation needs
+ * - multiple codecs are `supported' but not tested; the implementation needs
* some cleaning up.
*/
-/* $OpenBSD: azalia.c,v 1.266 2021/10/30 03:24:59 jsg Exp $ */
+/* $OpenBSD: azalia.c,v 1.267 2022/01/09 05:42:45 jsg Exp $ */
/* $NetBSD: azalia.c,v 1.20 2006/05/07 08:31:44 kent Exp $ */
/*-
/* make sure built-in mic is connected to an adc */
if (this->mic != -1 && this->mic_adc == -1) {
if (azalia_codec_select_micadc(this)) {
- DPRINTF(("%s: cound not select mic adc\n", __func__));
+ DPRINTF(("%s: could not select mic adc\n", __func__));
}
}
if (i < w->nconnections) {
conn = i;
} else {
- /* Couldn't get a unique DAC. Try to get a diferent
+ /* Couldn't get a unique DAC. Try to get a different
* DAC than the first pin's DAC.
*/
if (this->spkr_dac == this->opins[0].conv) {
-/* $OpenBSD: bktr_audio.c,v 1.13 2019/12/16 04:50:48 cheloha Exp $ */
+/* $OpenBSD: bktr_audio.c,v 1.14 2022/01/09 05:42:58 jsg Exp $ */
/* $FreeBSD: src/sys/dev/bktr/bktr_audio.c,v 1.8 2000/10/31 13:09:56 roger Exp $ */
/*
* This is part of the Driver for Video Capture Cards (Frame grabbers)
else
#endif /* AUDIOMUX_DISCOVER */
- /* check for existance of audio MUXes */
+ /* check for existence of audio MUXes */
if ( !bktr->card.audiomuxs[ 4 ] )
return( -1 );
msp_dpl_write(bktr, bktr->msp_addr, 0x12, 0x0008,0x0020);/* Loudspeaker set stereo*/
/*
set spatial effect strength to 50% enlargement
- set spatial effect mode b, stereo basewidth enlargment only
+ set spatial effect mode b, stereo basewidth enlargement only
*/
msp_dpl_write(bktr, bktr->msp_addr, 0x12, 0x0005,0x3f28);
} else if (stereo > 0x8000) { /* bilingual mode */
msp_dpl_write(bktr, bktr->msp_addr, 0x12, 0x0008,0x0030);/* Loudspeaker */
/*
set spatial effect strength to 50% enlargement
- set spatial effect mode a, stereo basewidth enlargment
+ set spatial effect mode a, stereo basewidth enlargement
and pseudo stereo effect with automatic high-pass filter
*/
msp_dpl_write(bktr, bktr->msp_addr, 0x12, 0x0005,0x3f08);
-/* $OpenBSD: bktr_core.c,v 1.42 2020/05/29 04:42:25 deraadt Exp $ */
+/* $OpenBSD: bktr_core.c,v 1.43 2022/01/09 05:42:58 jsg Exp $ */
/* $FreeBSD: src/sys/dev/bktr/bktr_core.c,v 1.114 2000/10/31 13:09:56 roger Exp $ */
/*
*
* bktr_core : This deals with the Bt848/849/878/879 PCI Frame Grabber,
* Handles all the open, close, ioctl and read userland calls.
- * Sets the Bt848 registers and generates RISC pograms.
+ * Sets the Bt848 registers and generates RISC programs.
* Controls the i2c bus and GPIO interface.
* Contains the interface to the kernel.
* (eg probe/attach and open/close/ioctl)
}
bktr->max_clip_node = i;
- /* make sure that the list contains a valid clip secquence */
+ /* make sure that the list contains a valid clip sequence */
/* the clip rectangles should be sorted by x then by y as the
second order sort key */
/* Tuner is MUX0, RCA is MUX1, S-Video is MUX2 */
/* On the Hauppauge bt878 boards, */
/* Tuner is MUX0, RCA is MUX3 */
- /* Unfortunatly Meteor driver codes DEV_RCA as DEV_0, so we */
+ /* Unfortunately Meteor driver codes DEV_RCA as DEV_0, so we */
/* stick with this system in our Meteor Emulation */
switch(*(unsigned int *)arg & METEOR_DEV_MASK) {
buffer = target_buffer;
- /* contruct sync : for video packet format */
+ /* construct sync : for video packet format */
/* sync, mode indicator packed data */
*dma_prog++ = htole32(OP_SYNC | BKTR_RESYNC | BKTR_FM1);
*dma_prog++ = htole32(0); /* NULL WORD */
t1 = buffer;
- /* contruct sync : for video packet format */
+ /* construct sync : for video packet format */
/* sync, mode indicator packed data*/
*dma_prog++ = htole32(OP_SYNC | BKTR_RESYNC | BKTR_FM3);
*dma_prog++ = htole32(0); /* NULL WORD */
-/* $OpenBSD: bktr_core.h,v 1.3 2004/06/29 12:24:57 mickey Exp $ */
+/* $OpenBSD: bktr_core.h,v 1.4 2022/01/09 05:42:58 jsg Exp $ */
/* $FreeBSD: src/sys/dev/bktr/bktr_core.h,v 1.4 2000/06/26 09:41:32 roger Exp $ */
/*
*
* bktr_core : This deals with the Bt848/849/878/879 PCI Frame Grabber,
* Handles all the open, close, ioctl and read userland calls.
- * Sets the Bt848 registers and generates RISC pograms.
+ * Sets the Bt848 registers and generates RISC programs.
* Controls the i2c bus and GPIO interface.
* Contains the interface to the kernel.
* (eg probe/attach and open/close/ioctl)
-/* $OpenBSD: bktr_tuner.c,v 1.9 2020/01/11 08:24:08 cheloha Exp $ */
+/* $OpenBSD: bktr_tuner.c,v 1.10 2022/01/09 05:42:58 jsg Exp $ */
/* $FreeBSD: src/sys/dev/bktr/bktr_tuner.c,v 1.9 2000/10/19 07:33:28 roger Exp $ */
/*
#include <dev/pci/bktr/bktr_core.h>
#if defined( TUNER_AFC )
-#define AFC_DELAY 10000 /* 10 millisend delay */
+#define AFC_DELAY 10000 /* 10 millisecond delay */
#define AFC_BITS 0x07
#define AFC_FREQ_MINUS_125 0x00
#define AFC_FREQ_MINUS_62 0x01
* High band 450.00 to 855.25 MHz
*
*
- * Now we need to set the PLL on the tuner to the required freuqncy.
+ * Now we need to set the PLL on the tuner to the required frequency.
* It has a programmable divisor.
* For TV we want
* N = 16 (freq RF(pc) + freq IF(pc)) pc is picture carrier and RF and IF
* where:
* pc is picture carrier, fRF & fIF are in MHz
*
- * fortunatly, frequency is passed in as MHz * 16
+ * fortunately, frequency is passed in as MHz * 16
* and the TBL_IF frequency is also stored in MHz * 16
*/
N = frequency + TBL_IF;
-/* $OpenBSD: cmpci.c,v 1.45 2018/09/14 08:37:34 miko Exp $ */
+/* $OpenBSD: cmpci.c,v 1.46 2022/01/09 05:42:45 jsg Exp $ */
/* $NetBSD: cmpci.c,v 1.25 2004/10/26 06:32:20 xtraeme Exp $ */
/*
sc->sc_reg_misc = bus_space_read_4(sc->sc_iot, sc->sc_ioh,
CMPCI_REG_MISC) & ~CMPCI_REG_SPDIF48K;
- /* extra capabilitites check */
+ /* extra capabilities check */
d = bus_space_read_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_INTR_CTRL) &
CMPCI_REG_CHIP_MASK2;
if (d) {
v = 1;
break;
- /* volume with inital value 0 */
+ /* volume with initial value 0 */
case CMPCI_CD_VOL:
case CMPCI_LINE_IN_VOL:
case CMPCI_AUX_IN_VOL:
-/* $OpenBSD: cs4280.c,v 1.53 2020/01/24 03:29:55 tedu Exp $ */
+/* $OpenBSD: cs4280.c,v 1.54 2022/01/09 05:42:45 jsg Exp $ */
/* $NetBSD: cs4280.c,v 1.5 2000/06/26 04:56:23 simonb Exp $ */
/*
DPRINTFN(5,("read_codec: add=0x%02x ", add));
/*
- * Make sure that there is not data sitting around from a preivous
+ * Make sure that there is not data sitting around from a previous
* uncompleted access.
*/
BA0READ4(sc, CS4280_ACSDA);
config_mountroot(self, cs4280_attachhook);
- /* AC 97 attachement */
+ /* AC 97 attachment */
sc->host_if.arg = sc;
sc->host_if.attach = cs4280_attach_codec;
sc->host_if.read = cs4280_read_codec;
}
-/* Download Proceessor Code and Data image */
+/* Download Processor Code and Data image */
int
cs4280_download(struct cs4280_softc *sc, const u_int32_t *src, u_int32_t offset,
delay(100);
/* Clear RSTSP bit in SPCR */
BA1WRITE4(sc, CS4280_SPCR, 0);
- /* enable DMA reqest */
+ /* enable DMA request */
BA1WRITE4(sc, CS4280_SPCR, SPCR_DRQEN);
}
-/* $OpenBSD: cs4280reg.h,v 1.1 2000/06/30 03:28:08 art Exp $ */
+/* $OpenBSD: cs4280reg.h,v 1.2 2022/01/09 05:42:45 jsg Exp $ */
/* $NetBSD: cs4280reg.h,v 1.3 2000/05/15 01:35:29 thorpej Exp $ */
/*
#define CCI_MASK 0xffff0000
#define CS4280_CD 0x02e0 /* Capture Delay */
#define CD_MASK 0xfffc000
-#define CS4280_CPI 0x02f4 /* Capture Phase Incremnt */
+#define CS4280_CPI 0x02f4 /* Capture Phase Increment */
#define CS4280_CGL 0x0134 /* Capture Group Length */
#define CGL_MASK 0x0000ffff
#define CS4280_CNT 0x0340 /* Capture Number of Triplets */
-/* $OpenBSD: cs4281.c,v 1.38 2021/03/05 12:40:13 jsg Exp $ */
+/* $OpenBSD: cs4281.c,v 1.39 2022/01/09 05:42:45 jsg Exp $ */
/* $Tera: cs4281.c,v 1.18 2000/12/27 14:24:45 tacha Exp $ */
/*
DPRINTFN(5,("read_codec: add=0x%02x ", ac97_addr));
/*
- * Make sure that there is not data sitting around from a preivous
+ * Make sure that there is not data sitting around from a previous
* uncompleted access.
*/
BA0READ4(sc, CS4281_ACSDA);
-/* $OpenBSD: cz.c,v 1.25 2021/01/01 10:21:26 jan Exp $ */
+/* $OpenBSD: cz.c,v 1.26 2022/01/09 05:42:45 jsg Exp $ */
/* $NetBSD: cz.c,v 1.15 2001/01/20 19:10:36 thorpej Exp $ */
/*-
channel = CZ_FWCTL_READ(cz, BRDCTL_FWCMD_CHANNEL);
param = CZ_FWCTL_READ(cz, BRDCTL_FWCMD_PARAM);
- /* now clear this interrupt, posslibly enabling another */
+ /* now clear this interrupt, possibly enabling another */
CZ_PLX_WRITE(cz, PLX_LOCAL_PCI_DOORBELL, command);
if (cz->cz_ports == NULL) {
-/* $OpenBSD: czreg.h,v 1.2 2003/11/16 20:30:06 avsm Exp $ */
+/* $OpenBSD: czreg.h,v 1.3 2022/01/09 05:42:45 jsg Exp $ */
/* $NetBSD$ */
/*-
*/
/*
- * PLX Local Address Base values for the board RAM and FPGA regsiters.
+ * PLX Local Address Base values for the board RAM and FPGA registers.
*
* These values are specific to the Cyclades-Z.
*/
#define C_CM_TINACT 0x51 /* sets inactivity detection */
#define C_CM_IRQ_ENBL 0x52 /* enables generation of interrupts */
#define C_CM_IRQ_DSBL 0x53 /* disables generation of interrupts */
-#define C_CM_ACK_ENBL 0x54 /* enables acknolowdged interrupt
+#define C_CM_ACK_ENBL 0x54 /* enables acknowledged interrupt
mode */
-#define C_CM_ACK_DSBL 0x55 /* disables acknolowdged intr mode */
+#define C_CM_ACK_DSBL 0x55 /* disables acknowledged intr mode */
#define C_CM_FLUSH_RX 0x56 /* flushes Rx buffer */
#define C_CM_FLUSH_TX 0x57 /* flushes Tx buffer */
#define C_CM_Q_ENABLE 0x58 /* enables queue access from the
-/* $OpenBSD: emuxki.c,v 1.54 2020/06/17 00:03:13 mortimer Exp $ */
+/* $OpenBSD: emuxki.c,v 1.55 2022/01/09 05:42:45 jsg Exp $ */
/* $NetBSD: emuxki.c,v 1.1 2001/10/17 18:39:41 jdolecek Exp $ */
/*-
#include <dev/pci/emuxkireg.h>
#include <dev/pci/emuxkivar.h>
-/* autconf goo */
+/* autoconf goo */
int emuxki_match(struct device *, void *, void *);
void emuxki_attach(struct device *, struct device *, void *);
int emuxki_detach(struct device *, int);
-/* $OpenBSD: envyreg.h,v 1.19 2019/04/30 20:38:04 ratchov Exp $ */
+/* $OpenBSD: envyreg.h,v 1.20 2022/01/09 05:42:45 jsg Exp $ */
/*
* Copyright (c) 2007 Alexandre Ratchov <alex@caoua.org>
*
#define ENVY_CCI_DATA 0x4
/*
- * CCS regisers to access iic bus
+ * CCS registers to access iic bus
*/
#define ENVY_I2C_DEV 0x10
#define ENVY_I2C_DEV_SHIFT 0x01
-/* $OpenBSD: gcu.c,v 1.4 2015/03/19 00:18:11 deraadt Exp $ */
+/* $OpenBSD: gcu.c,v 1.5 2022/01/09 05:42:45 jsg Exp $ */
/*
* Copyright (c) 2009 Dariusz Swiderski <sfires@sfires.net>
*/
/*
- * Driver for a GCU device that apears on embeded intel systems, like 80579
+ * Driver for a GCU device that appears on embedded intel systems, like 80579
*/
#include <sys/param.h>
-/* $OpenBSD: glxpcib.c,v 1.14 2014/12/10 12:27:57 mikeb Exp $ */
+/* $OpenBSD: glxpcib.c,v 1.15 2022/01/09 05:42:45 jsg Exp $ */
/*
* Copyright (c) 2007 Marc Balmer <mbalmer@openbsd.org>
#define AMD5536_PMS_SSC_SET_PI 0x00010000
/*
- * MSR registers we want to preserve accross suspend/resume
+ * MSR registers we want to preserve across suspend/resume
*/
const uint32_t glxpcib_msrlist[] = {
GLIU_PAE,
-/* $OpenBSD: ichreg.h,v 1.7 2005/12/18 12:09:04 grange Exp $ */
+/* $OpenBSD: ichreg.h,v 1.8 2022/01/09 05:42:46 jsg Exp $ */
/*
* Copyright (c) 2004, 2005 Alexander Yurchenko <grange@openbsd.org>
#define ICH_WDT_GIS_ACTIVE (1 << 0) /* interrupt active */
#define ICH_WDT_RELOAD 0x0c /* reload register */
#define ICH_WDT_RELOAD_RLD (1 << 8) /* safe reload */
-#define ICH_WDT_RELOAD_TIMEOUT (1 << 9) /* timeout occured */
+#define ICH_WDT_RELOAD_TIMEOUT (1 << 9) /* timeout occurred */
#endif /* !_DEV_PCI_ICHREG_H_ */
-/* $OpenBSD: if_alcreg.h,v 1.7 2020/01/24 03:29:55 tedu Exp $ */
+/* $OpenBSD: if_alcreg.h,v 1.8 2022/01/09 05:42:46 jsg Exp $ */
/*-
* Copyright (c) 2009, Pyun YongHyeon <yongari@FreeBSD.org>
* All rights reserved.
uint32_t updated;
};
-/* CMB(Coalesing message block) */
+/* CMB (Coalescing Message Block) */
struct cmb {
uint32_t cons;
};
-/* $OpenBSD: if_alereg.h,v 1.3 2014/11/27 14:52:04 brad Exp $ */
+/* $OpenBSD: if_alereg.h,v 1.4 2022/01/09 05:42:46 jsg Exp $ */
/*-
* Copyright (c) 2008, Pyun YongHyeon <yongari@FreeBSD.org>
* All rights reserved.
/*
* TODO : Should get real jumbo MTU size.
* The hardware seems to have trouble in dealing with large
- * frame length. If you encounter unstability issue, use
+ * frame length. If you encounter instability issue, use
* lower MTU size.
*/
#define ALE_JUMBO_FRAMELEN 8132
-/* $OpenBSD: if_bce.c,v 1.53 2020/07/10 13:22:20 patrick Exp $ */
+/* $OpenBSD: if_bce.c,v 1.54 2022/01/09 05:42:46 jsg Exp $ */
/* $NetBSD: if_bce.c,v 1.3 2003/09/29 01:53:02 mrg Exp $ */
/*
*/
/*
* XXX PAGE_SIZE is wasteful; we only need 1KB + 1KB, but
- * due to the limition above. ??
+ * due to the limitation above. ??
*/
if ((error = bus_dmamem_alloc_range(sc->bce_dmatag, 2 * PAGE_SIZE,
PAGE_SIZE, 2 * PAGE_SIZE, &seg, 1, &rseg, BUS_DMA_NOWAIT,
/* Cancel any pending I/O. */
bce_stop(ifp);
- /* enable pci inerrupts, bursts, and prefetch */
+ /* enable pci interrupts, bursts, and prefetch */
/* remap the pci registers to the Sonics config registers */
}
}
-/* Add a receive buffer to the indiciated descriptor. */
+/* Add a receive buffer to the indicated descriptor. */
void
bce_add_rxbuf(struct bce_softc *sc, int idx)
{
-/* $OpenBSD: if_bge.c,v 1.396 2021/06/18 06:53:42 jsg Exp $ */
+/* $OpenBSD: if_bge.c,v 1.397 2022/01/09 05:42:46 jsg Exp $ */
/*
* Copyright (c) 2001 Wind River Systems
sc->bge_mfw_flags |= BGE_MFW_ON_APE;
- /* Fetch the APE firwmare type and version. */
+ /* Fetch the APE firmware type and version. */
apedata = APE_READ_4(sc, BGE_APE_FW_VERSION);
features = APE_READ_4(sc, BGE_APE_FW_FEATURES);
if ((features & BGE_APE_FW_FEATURE_NCSI) != 0) {
}
/*
- * Intialize a standard receive ring descriptor.
+ * Initialize a standard receive ring descriptor.
*/
int
bge_newbuf(struct bge_softc *sc, int i)
* The BD ring replenish thresholds control how often the
* hardware fetches new BD's from the producer rings in host
* memory. Setting the value too low on a busy system can
- * starve the hardware and recue the throughpout.
+ * starve the hardware and recue the throughput.
*
* Set the BD ring replenish thresholds. The recommended
* values are 1/8th the number of descriptors allocated to
/*
* Disable all receive return rings by setting the
- * 'ring diabled' bit in the flags field of all the receive
+ * 'ring disabled' bit in the flags field of all the receive
* return ring control blocks, located in NIC memory.
*/
if (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5717 ||
*/
CSR_WRITE_4(sc, BGE_RXLP_CFG, 0x181);
- /* Inialize RX list placement stats mask. */
+ /* Initialize RX list placement stats mask. */
CSR_WRITE_4(sc, BGE_RXLP_STATS_ENABLE_MASK, 0x007BFFFF);
CSR_WRITE_4(sc, BGE_RXLP_STATS_CTL, 0x1);
/*
* Enable fix for read DMA FIFO overruns.
* The fix is to limit the number of RX BDs
- * the hardware would fetch at a fime.
+ * the hardware would fetch at a time.
*/
CSR_WRITE_4(sc, rdmareg, dmactl |
BGE_RDMA_RSRVCTRL_FIFO_OFLW_FIX);
pm_ctl &= ~(PCI_PWR_D0|PCI_PWR_D1|PCI_PWR_D2|PCI_PWR_D3);
pm_ctl |= (1 << 8) | PCI_PWR_D0 ; /* D0 state */
pci_conf_write(pc, pa->pa_tag, BGE_PCI_PWRMGMT_CMD, pm_ctl);
- DELAY(1000); /* 27 usec is allegedly sufficent */
+ DELAY(1000); /* 27 usec is allegedly sufficient */
/*
* Save ASIC rev.
-/* $OpenBSD: if_bgereg.h,v 1.134 2021/08/31 08:06:56 jasper Exp $ */
+/* $OpenBSD: if_bgereg.h,v 1.135 2022/01/09 05:42:46 jsg Exp $ */
/*
* Copyright (c) 2001 Wind River Systems
/* SERDES configuration register */
#define BGE_SERDESCFG_RXR 0x00000007 /* phase interpolator */
#define BGE_SERDESCFG_RXG 0x00000018 /* rx gain setting */
-#define BGE_SERDESCFG_RXEDGESEL 0x00000040 /* rising/falling egde */
+#define BGE_SERDESCFG_RXEDGESEL 0x00000040 /* rising/falling edge */
#define BGE_SERDESCFG_TX_BIAS 0x00000380 /* TXDAC bias setting */
#define BGE_SERDESCFG_IBMAX 0x00000400 /* bias current +25% */
#define BGE_SERDESCFG_IBMIN 0x00000800 /* bias current -25% */
u_int16_t bge_std; /* current std ring head */
int bge_rx_std_len;
struct if_rxring bge_jumbo_ring;
- u_int16_t bge_jumbo; /* current jumo ring head */
+ u_int16_t bge_jumbo; /* current jumbo ring head */
u_int32_t bge_stat_ticks;
u_int32_t bge_rx_coal_ticks;
u_int32_t bge_tx_coal_ticks;
-/* $OpenBSD: if_bnx.c,v 1.130 2020/12/12 11:48:52 jan Exp $ */
+/* $OpenBSD: if_bnx.c,v 1.131 2022/01/09 05:42:46 jsg Exp $ */
/*-
* Copyright (c) 2006 Broadcom Corporation
{0x19000002, 0x5b808201, 0x000500db, 0x03840253, 0xaf020406,
NONBUFFERED_FLAGS, ST_MICRO_FLASH_PAGE_BITS, ST_MICRO_FLASH_PAGE_SIZE,
ST_MICRO_FLASH_BYTE_ADDR_MASK, ST_MICRO_FLASH_BASE_TOTAL_SIZE*2,
- "Entry 0101: ST M45PE10 (128kB non-bufferred)"},
+ "Entry 0101: ST M45PE10 (128kB non-buffered)"},
/* Entry 0110: ST M45PE20 (non-buffered flash)*/
{0x15000001, 0x57808201, 0x000500db, 0x03840253, 0xaf020406,
NONBUFFERED_FLAGS, ST_MICRO_FLASH_PAGE_BITS, ST_MICRO_FLASH_PAGE_SIZE,
ST_MICRO_FLASH_BYTE_ADDR_MASK, ST_MICRO_FLASH_BASE_TOTAL_SIZE*4,
- "Entry 0110: ST M45PE20 (256kB non-bufferred)"},
+ "Entry 0110: ST M45PE20 (256kB non-buffered)"},
/* Saifun SA25F005 (non-buffered flash) */
/* strap, cfg1, & write1 need updates */
{0x1d000003, 0x5f808201, 0x00050081, 0x03840253, 0xaf020406,
/*
* Configure byte swap and enable indirect register access.
* Rely on CPU to do target byte swapping on big endian systems.
- * Access to registers outside of PCI configurtion space are not
+ * Access to registers outside of PCI configuration space are not
* valid until this is done.
*/
pci_conf_write(pa->pa_pc, pa->pa_tag, BNX_PCICFG_MISC_CONFIG,
/* FALLTHROUGH */
case IFM_1000_T:
case IFM_1000_SX:
- DBPRINT(sc, BNX_INFO, "Enablinb GMII interface.\n");
+ DBPRINT(sc, BNX_INFO, "Enabling GMII interface.\n");
val |= BNX_EMAC_MODE_PORT_GMII;
break;
default:
BNX_CLRBIT(sc, BNX_EMAC_TX_MODE, BNX_EMAC_TX_MODE_FLOW_EN);
}
- /* Only make changes if the recive mode has actually changed. */
+ /* Only make changes if the receive mode has actually changed. */
if (rx_mode != sc->rx_mode) {
DBPRINT(sc, BNX_VERBOSE, "Enabling new receive mode: 0x%08X\n",
rx_mode);
}
if (j >= NVRAM_TIMEOUT_COUNT) {
- DBPRINT(sc, BNX_WARN, "Timeout reeasing NVRAM lock!\n");
+ DBPRINT(sc, BNX_WARN, "Timeout releasing NVRAM lock!\n");
return (EBUSY);
}
/****************************************************************************/
/* Free any DMA memory owned by the driver. */
/* */
-/* Scans through each data structre that requires DMA memory and frees */
+/* Scans through each data structure that requires DMA memory and frees */
/* the memory if allocated. */
/* */
/* Returns: */
DBPRINT(sc, BNX_VERBOSE_RESET, "Exiting %s()\n", __FUNCTION__);
}
-/****************************************************************************/
-/* Encapsultes an mbuf cluster into the tx_bd chain structure and makes the */
-/* memory visible to the controller. */
-/* */
-/* Returns: */
-/* 0 for success, positive value for failure. */
-/****************************************************************************/
+/*****************************************************************************/
+/* Encapsulates an mbuf cluster into the tx_bd chain structure and makes the */
+/* memory visible to the controller. */
+/* */
+/* Returns: */
+/* 0 for success, positive value for failure. */
+/*****************************************************************************/
int
bnx_tx_encap(struct bnx_softc *sc, struct mbuf *m, int *used)
{
/*
* ASF/IPMI/UMP firmware requires that VLAN tag stripping
- * be enbled.
+ * be enabled.
*/
if (!(ifp->if_capabilities & IFCAP_VLAN_HWTAGGING) &&
(!(sc->bnx_flags & BNX_MFW_ENABLE_FLAG)))
sort_mode |= BNX_RPM_SORT_USER0_MC_HSH_EN;
}
- /* Only make changes if the recive mode has actually changed. */
+ /* Only make changes if the receive mode has actually changed. */
if (rx_mode != sc->rx_mode) {
DBPRINT(sc, BNX_VERBOSE, "Enabling new receive mode: 0x%08X\n",
rx_mode);
REG_WR(sc, BNX_EMAC_RX_MODE, rx_mode);
}
- /* Disable and clear the exisitng sort before enabling a new sort. */
+ /* Disable and clear the existing sort before enabling a new sort. */
REG_WR(sc, BNX_RPM_SORT_USER0, 0x0);
REG_WR(sc, BNX_RPM_SORT_USER0, sort_mode);
REG_WR(sc, BNX_RPM_SORT_USER0, sort_mode | BNX_RPM_SORT_USER0_ENA);
"address\n", sc->stats_block);
BNX_PRINTF(sc, "%p - (sc->tx_bd_chain) tx_bd chain virtual "
- "adddress\n", sc->tx_bd_chain);
+ "address\n", sc->tx_bd_chain);
BNX_PRINTF(sc, "%p - (sc->rx_bd_chain) rx_bd chain virtual address\n",
sc->rx_bd_chain);
-/* $OpenBSD: if_bnxreg.h,v 1.49 2015/12/05 16:23:37 jmatthew Exp $ */
+/* $OpenBSD: if_bnxreg.h,v 1.50 2022/01/09 05:42:47 jsg Exp $ */
/*-
* Copyright (c) 2006 Broadcom Corporation
/****************************************************************************/
/* Shared Memory layout */
-/* The BNX bootcode will initialize this data area with port configurtion */
+/* The BNX bootcode will initialize this data area with port configuration */
/* information which can be accessed by the driver. */
/****************************************************************************/
#define MB_RX_CID_ADDR MB_GET_CID_ADDR(RX_CID)
/****************************************************************************/
-/* BNX Processor Firmwware Load Definitions */
+/* BNX Processor Firmware Load Definitions */
/****************************************************************************/
struct cpu_reg {
-/* $OpenBSD: if_bnxtreg.h,v 1.3 2019/04/24 10:09:49 jmatthew Exp $ */
+/* $OpenBSD: if_bnxtreg.h,v 1.4 2022/01/09 05:42:47 jsg Exp $ */
/*-
* BSD LICENSE
*
/*
* This is the length of the data for the packet stored in the buffer(s)
* identified by the opaque value. This includes the packet BD and any
- * associated buffer BDs. This does not include the the length of any
+ * associated buffer BDs. This does not include the length of any
* data places in aggregation BDs.
*/
uint32_t opaque;
/* This value indicates what format the metadata field is. */
#define RX_PKT_CMPL_FLAGS2_META_FORMAT_MASK UINT32_C(0xf0)
#define RX_PKT_CMPL_FLAGS2_META_FORMAT_SFT 4
- /* No metadata informtaion. Value is zero. */
+ /* No metadata information. Value is zero. */
#define RX_PKT_CMPL_FLAGS2_META_FORMAT_NONE (UINT32_C(0x0) << 4)
/*
* The metadata field contains the VLAN tag and TPID value. -
/* This value indicates what format the metadata field is. */
#define RX_TPA_START_CMPL_FLAGS2_META_FORMAT_MASK UINT32_C(0xf0)
#define RX_TPA_START_CMPL_FLAGS2_META_FORMAT_SFT 4
- /* No metadata informtaion. Value is zero. */
+ /* No metadata information. Value is zero. */
#define RX_TPA_START_CMPL_FLAGS2_META_FORMAT_NONE (UINT32_C(0x0) << 4)
/*
* The metadata field contains the VLAN tag and TPID value. -
* Note: This door bell format is used by the driver when it wants to push a
* packet into the chip for super-fast transmission. This pushes a partial BD
* and the packet data into the chip. If the chip has room, it will transmit the
- * packet. If the chip dosn't have room, it will read the BD and packet data
+ * packet. If the chip doesn't have room, it will read the BD and packet data
* from host memory as a normal packet.
*/
/* TX Door Bell Format (4 bytes) */
/*
* If set to 1, the controller will not append an Ethernet CRC to the
* end of the frame. This bit must be valid on the first BD of a packet.
- * Packet must be 64B or longer when this flag is set. It is not usefull
+ * Packet must be 64B or longer when this flag is set. It is not useful
* to use this bit with any form of TX offload such as CSO or LSO. The
* intent is that the packet from the host already has a valid Ethernet
* CRC on the packet.
uint8_t event;
/* This value define what type of action the driver should take. */
/*
- * The driver should start writing dummy values to the the
+ * The driver should start writing dummy values to the
* doorbell in an attempt to consume all the PCIE posted write
* resources and prevent doorbell overflow.
*/
/* hwrm_func_vlan_qcfg */
/*
* Description: This command should be called by PF driver to get the current
- * C-TAG, S-TAG and correcponsing PCP and TPID values configured for the
+ * C-TAG, S-TAG and corresponding PCP and TPID values configured for the
* function.
*/
/* Input (24 bytes) */
uint16_t fid;
/*
* Function ID of the function that is being configured. If set to
- * 0xFF... (All Fs), then the the configuration is for the requesting
+ * 0xFF... (All Fs), then the configuration is for the requesting
* function.
*/
uint8_t unused_0;
* This bit requests that the firmware test to see if all the assets
* requested in this command (i.e. number of TX rings) are available.
* The firmware will return an error if the requested assets are not
- * available. The firwmare will NOT reserve the assets if they are
+ * available. The firmware will NOT reserve the assets if they are
* available.
*/
#define HWRM_FUNC_CFG_INPUT_FLAGS_TX_ASSETS_TEST UINT32_C(0x2000)
*/
#define HWRM_PORT_PHY_CFG_INPUT_FLAGS_EEE_TX_LPI_DISABLE UINT32_C(0x80)
/*
- * When set to 1, then the HWRM shall enable FEC autonegotitation on
+ * When set to 1, then the HWRM shall enable FEC autonegotiation on
* this port if supported. When set to 0, then this flag shall be
* ignored. If FEC autonegotiation is not supported, then the HWRM shall
* ignore this flag.
uint16_t support_speeds;
/*
* The supported speeds for the port. This is a bit mask. For each speed
- * that is supported, the corrresponding bit will be set to '1'.
+ * that is supported, the corresponding bit will be set to '1'.
*/
/* 100Mb link speed (Half-duplex) */
#define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_100MBHD UINT32_C(0x1)
*/
#define HWRM_PORT_MAC_CFG_INPUT_FLAGS_OOB_WOL_ENABLE UINT32_C(0x100)
/*
- * When this bit is '1', the the Out-Of-Box WoL is requested to be
+ * When this bit is '1', the Out-Of-Box WoL is requested to be
* disabled on this port.
*/
#define HWRM_PORT_MAC_CFG_INPUT_FLAGS_OOB_WOL_DISABLE UINT32_C(0x200)
* side of this port. This field shall be ignored if the
* ptp_tx_ts_capture_enable flag is not set in this command. Otherwise,
* if bit 'i' is set, then the HWRM is being requested to configure the
- * transmit sied of the port to capture the time stamp of every
+ * transmit side of the port to capture the time stamp of every
* transmitted PTP message with messageType field value set to i.
*/
uint8_t cos_field_cfg;
* comparing priorities of mappings, higher value indicates higher
* priority. For example, a value of 0-3 is returned where 0 is being
* the lowest priority and 3 is being the highest priority. # If the
- * correspoding CoS mapping is not enabled, then this field should be
+ * corresponding CoS mapping is not enabled, then this field should be
* ignored. # This value indicates the normalized priority value
* retained in the HWRM.
*/
* When comparing priorities of mappings, higher value indicates higher
* priority. For example, a value of 0-3 is returned where 0 is being
* the lowest priority and 3 is being the highest priority. # If the
- * correspoding CoS mapping is not enabled, then this field should be
+ * corresponding CoS mapping is not enabled, then this field should be
* ignored. # This value indicates the normalized priority value
* retained in the HWRM.
*/
* comparing priorities of mappings, higher value indicates higher
* priority. For example, a value of 0-3 is returned where 0 is being
* the lowest priority and 3 is being the highest priority. # If the
- * correspoding CoS mapping is not enabled, then this field should be
+ * corresponding CoS mapping is not enabled, then this field should be
* ignored. # This value indicates the normalized priority value
* retained in the HWRM.
*/
#define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_IPIP UINT32_C(0x4)
/* Generic Network Virtualization Encapsulation (Geneve) */
#define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_GENEVE UINT32_C(0x5)
- /* Multi-Protocol Lable Switching (MPLS) */
+ /* Multi-Protocol Label Switching (MPLS) */
#define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_MPLS UINT32_C(0x6)
/* Stateless Transport Tunnel (STT) */
#define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_STT UINT32_C(0x7)
#define HWRM_CFA_TUNNEL_FILTER_ALLOC_INPUT_TUNNEL_TYPE_IPIP UINT32_C(0x4)
/* Generic Network Virtualization Encapsulation (Geneve) */
#define HWRM_CFA_TUNNEL_FILTER_ALLOC_INPUT_TUNNEL_TYPE_GENEVE UINT32_C(0x5)
- /* Multi-Protocol Lable Switching (MPLS) */
+ /* Multi-Protocol Label Switching (MPLS) */
#define HWRM_CFA_TUNNEL_FILTER_ALLOC_INPUT_TUNNEL_TYPE_MPLS UINT32_C(0x6)
/* Stateless Transport Tunnel (STT) */
#define HWRM_CFA_TUNNEL_FILTER_ALLOC_INPUT_TUNNEL_TYPE_STT UINT32_C(0x7)
#define HWRM_CFA_ENCAP_RECORD_ALLOC_INPUT_ENCAP_TYPE_IPIP UINT32_C(0x4)
/* Generic Network Virtualization Encapsulation (Geneve) */
#define HWRM_CFA_ENCAP_RECORD_ALLOC_INPUT_ENCAP_TYPE_GENEVE UINT32_C(0x5)
- /* Multi-Protocol Lable Switching (MPLS) */
+ /* Multi-Protocol Label Switching (MPLS) */
#define HWRM_CFA_ENCAP_RECORD_ALLOC_INPUT_ENCAP_TYPE_MPLS UINT32_C(0x6)
/* VLAN */
#define HWRM_CFA_ENCAP_RECORD_ALLOC_INPUT_ENCAP_TYPE_VLAN UINT32_C(0x7)
#define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_TUNNEL_TYPE_IPIP UINT32_C(0x4)
/* Generic Network Virtualization Encapsulation (Geneve) */
#define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_TUNNEL_TYPE_GENEVE UINT32_C(0x5)
- /* Multi-Protocol Lable Switching (MPLS) */
+ /* Multi-Protocol Label Switching (MPLS) */
#define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_TUNNEL_TYPE_MPLS UINT32_C(0x6)
/* Stateless Transport Tunnel (STT) */
#define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_TUNNEL_TYPE_STT UINT32_C(0x7)
#define HWRM_CFA_EM_FLOW_ALLOC_INPUT_TUNNEL_TYPE_IPIP UINT32_C(0x4)
/* Generic Network Virtualization Encapsulation (Geneve) */
#define HWRM_CFA_EM_FLOW_ALLOC_INPUT_TUNNEL_TYPE_GENEVE UINT32_C(0x5)
- /* Multi-Protocol Lable Switching (MPLS) */
+ /* Multi-Protocol Label Switching (MPLS) */
#define HWRM_CFA_EM_FLOW_ALLOC_INPUT_TUNNEL_TYPE_MPLS UINT32_C(0x6)
/* Stateless Transport Tunnel (STT) */
#define HWRM_CFA_EM_FLOW_ALLOC_INPUT_TUNNEL_TYPE_STT UINT32_C(0x7)
#define HWRM_CFA_DECAP_FILTER_ALLOC_INPUT_TUNNEL_TYPE_IPIP UINT32_C(0x4)
/* Generic Network Virtualization Encapsulation (Geneve) */
#define HWRM_CFA_DECAP_FILTER_ALLOC_INPUT_TUNNEL_TYPE_GENEVE UINT32_C(0x5)
- /* Multi-Protocol Lable Switching (MPLS) */
+ /* Multi-Protocol Label Switching (MPLS) */
#define HWRM_CFA_DECAP_FILTER_ALLOC_INPUT_TUNNEL_TYPE_MPLS UINT32_C(0x6)
/* Stateless Transport Tunnel (STT) */
#define HWRM_CFA_DECAP_FILTER_ALLOC_INPUT_TUNNEL_TYPE_STT UINT32_C(0x7)
* the HWRM client is a function driver, then the HWRM shall not allow the HWRM
* client to set up WoL filters on the port that the function is not associated
* with. # If the HWRM client is one of the trusted embedded services (e.g.
- * management service), the the HWRM shall allow the HWRM client to set up WoL
+ * management service), the HWRM shall allow the HWRM client to set up WoL
* filters on any port of the device.
*/
/* Input (64 bytes) */
/* Port ID of port on which WoL filter is configured. */
uint8_t wol_type;
/* This value represents a Wake-on-LAN type. */
- /* Magic Paket */
+ /* Magic Packet */
#define HWRM_WOL_FILTER_ALLOC_INPUT_WOL_TYPE_MAGICPKT UINT32_C(0x0)
/* Bitmap */
#define HWRM_WOL_FILTER_ALLOC_INPUT_WOL_TYPE_BMP UINT32_C(0x1)
* drivers. # If the HWRM client is a function driver, then the HWRM shall not
* allow the HWRM client to query WoL filters on the port that the function is
* not associated with. # If the HWRM client is one of the trusted embedded
- * service (e.g. management service), the the HWRM shall allow the HWRM client
+ * service (e.g. management service), the HWRM shall allow the HWRM client
* to query WoL filters on any port of the device.
*/
/* Input (56 bytes) */
* This value identifies the type of WoL filter returned in this
* response.
*/
- /* Magic Paket */
+ /* Magic Packet */
#define HWRM_WOL_FILTER_QCFG_OUTPUT_WOL_TYPE_MAGICPKT UINT32_C(0x0)
/* Bitmap */
#define HWRM_WOL_FILTER_QCFG_OUTPUT_WOL_TYPE_BMP UINT32_C(0x1)
* response. When the wol_type is set to invalid, then there is no WoL
* event that happened during last system wake-up.
*/
- /* Magic Paket */
+ /* Magic Packet */
#define HWRM_WOL_REASON_QCFG_OUTPUT_WOL_REASON_MAGICPKT UINT32_C(0x0)
/* Bitmap */
#define HWRM_WOL_REASON_QCFG_OUTPUT_WOL_REASON_BMP UINT32_C(0x1)
* allocated item length, which may be greater than the requested item
* length. The purpose for allocating more than the required number of
* bytes for an item's data is to pre-allocate extra storage (padding)
- * to accomodate the potential future growth of an item (e.g. upgraded
+ * to accommodate the potential future growth of an item (e.g. upgraded
* firmware with a size increase, log growth, expanded configuration
* data).
*/
*/
#define HWRM_NVM_INSTALL_UPDATE_INPUT_FLAGS_ERASE_UNUSED_SPACE UINT32_C(0x1)
/*
- * If set to 1, then unspecifed images, images not in the package file,
+ * If set to 1, then unspecified images, images not in the package file,
* will be safely deleted. When combined with erase_unused_space then
* unspecified images will be securely erased.
*/
uint16_t reserved16;
uint32_t bound_window_info;
/*
- * This is advisory data to facilitate eventual descruction of lingering
+ * This is advisory data to facilitate eventual destruction of lingering
* memory regions in Windows. For memory window, it contains non-zero
* HWID of a region this window was bound to (without the 8-bit key
* portion). The host may check if the region is lingering in destroyed
uint8_t unused_0;
uint16_t test_timeout;
/*
- * This field represents the the maximum timeout for all the tests to
+ * This field represents the maximum timeout for all the tests to
* complete in milliseconds.
*/
uint8_t unused_1;
*/
uint8_t requested_tests;
/* The following tests were requested to be run. */
- /* A reqeust was made to run the NVM test. */
+ /* A request was made to run the NVM test. */
#define HWRM_SELFTEST_EXEC_OUTPUT_REQUESTED_TESTS_NVM_TEST UINT32_C(0x1)
/* A request was made to run the link test. */
#define HWRM_SELFTEST_EXEC_OUTPUT_REQUESTED_TESTS_LINK_TEST UINT32_C(0x2)
/* hwrm_selftest_retreive_serdes_data */
/*
- * Description: This function is called by a driver to retreieve the data
+ * Description: This function is called by a driver to retrieve the data
* collected when running the previous PCIe or Ethernet serdes test. The driver
- * can use multiple calls to this command to retreive the entire stored buffer
+ * can use multiple calls to this command to retrieve the entire stored buffer
* in the event it cannot do so with a single call.
*/
/* Input (32 bytes) */
* Amount of data DMA'd to host by this call. The driver can use this
* field along with the total_data_len field above to determine the
* value to write to the resp_data_offset field in the next call if more
- * than one call to these commands is required to retreive all the
+ * than one call to these commands is required to retrieve all the
* stored data.
*/
uint32_t unused_0;
/* Total Number of 1024-1518 Bytes frames transmitted */
uint64_t tx_good_vlan_frames;
/*
- * Total Number of each good VLAN (exludes FCS errors) frame transmitted
+ * Total Number of each good VLAN (excludes FCS errors) frame transmitted
* which is 1519 to 1522 bytes in length inclusive (excluding framing
* bits but including FCS bytes).
*/
/* Total Number of 1024-1518 Bytes frames received */
uint64_t rx_good_vlan_frames;
/*
- * Total Number of each good VLAN (exludes FCS errors) frame received
+ * Total Number of each good VLAN (excludes FCS errors) frame received
* which is 1519 to 1522 bytes in length inclusive (excluding framing
* bits but including FCS bytes).
*/
/* Enable both Tx and Rx */
#define HWRM_STRUCT_DATA_LLDP_ADMIN_STATE_ENABLE UINT32_C(0x3)
uint8_t port_description_state;
- /* Port desciption TLV transmit state (enable(1)/disable(0)). */
+ /* Port description TLV transmit state (enable(1)/disable(0)). */
/* Disable */
#define HWRM_STRUCT_DATA_LLDP_PORT_DESCRIPTION_STATE_DISABLE UINT32_C(0x0)
/* Enable */
/* Enable */
#define HWRM_STRUCT_DATA_LLDP_SYSTEM_NAME_STATE_ENABLE UINT32_C(0x1)
uint8_t system_desc_state;
- /* System desciption TLV transmit state (enable(1)/disable(0)). */
+ /* System description TLV transmit state (enable(1)/disable(0)). */
/* Disable */
#define HWRM_STRUCT_DATA_LLDP_SYSTEM_DESC_STATE_DISABLE UINT32_C(0x0)
/* Enable */
-/* $OpenBSD: if_casreg.h,v 1.10 2008/05/31 22:49:03 kettenis Exp $ */
+/* $OpenBSD: if_casreg.h,v 1.11 2022/01/09 05:42:47 jsg Exp $ */
/*
*
#define CAS_RX_PAGE_SIZE_SZ 0x00000003 /* Page size */
#define CAS_RX_PAGE_SIZE_COUNT 0x00007800 /* MTU buffers per page */
#define CAS_RX_PAGE_SIZE_STRIDE 0x18000000 /* MTU buffer separation */
-#define CAS_RX_PAGE_SIZE_FBOFF 0xc0000000 /* Firts byte offset */
+#define CAS_RX_PAGE_SIZE_FBOFF 0xc0000000 /* First byte offset */
#define CAS_RX_PAGE_SIZE_COUNT_SHIFT 11
#define CAS_RX_PAGE_SIZE_STRIDE_SHIFT 27
-/* $OpenBSD: if_casvar.h,v 1.7 2010/09/20 07:40:38 deraadt Exp $ */
+/* $OpenBSD: if_casvar.h,v 1.8 2022/01/09 05:42:50 jsg Exp $ */
/*
*
};
/*
- * This maccro determines whether we have a Cassini+.
+ * This macro determines whether we have a Cassini+.
*/
#define CAS_PLUS(sc) (sc->sc_rev > 0x10)
-/* $OpenBSD: if_de.c,v 1.137 2017/03/08 12:02:41 mpi Exp $ */
+/* $OpenBSD: if_de.c,v 1.138 2022/01/09 05:42:50 jsg Exp $ */
/* $NetBSD: if_de.c,v 1.58 1998/01/12 09:39:58 thorpej Exp $ */
/*-
*/
#define PCI_CFID 0x00 /* Configuration ID */
-#define PCI_CFCS 0x04 /* Configurtion Command/Status */
+#define PCI_CFCS 0x04 /* Configuration Command/Status */
#define PCI_CFRV 0x08 /* Configuration Revision */
#define PCI_CFLT 0x0c /* Configuration Latency Timer */
#define PCI_CBIO 0x10 /* Configuration Base IO Address */
* We could set probe_timeout to 0 but setting to 3000 puts this
* in one central place and the only matters is tulip_link is
* followed by a tulip_timeout. Therefore setting it should not
- * result in aberrant behavour.
+ * result in aberrant behaviour.
*/
sc->tulip_probe_timeout = 3000;
sc->tulip_probe_state = TULIP_PROBE_INACTIVE;
/*
* Brilliant. Simply brilliant. When switching modes/speeds
- * on a 2114*, you need to set the appriopriate MII/PCS/SCL/PS
+ * on a 2114*, you need to set the appropriate MII/PCS/SCL/PS
* bits in CSR6 and then do a software reset to get the 21140
* to properly reset its internal pathways to the right places.
* Grrrr.
}
/*
- * If tulip_reset is being called recurisvely, exit quickly knowing
+ * If tulip_reset is being called recursively, exit quickly knowing
* that when the outer tulip_reset returns all the right stuff will
* have happened.
*/
* Mark that we finished it. If there's not
* another pending, startup the TULIP receiver.
* Make sure we ack the RXSTOPPED so we won't get
- * an abormal interrupt indication.
+ * an abnormal interrupt indication.
*/
TULIP_TXMAP_POSTSYNC(sc, sc->tulip_setupmap);
sc->tulip_flags &= ~(TULIP_DOINGSETUP|TULIP_HASHONLY);
TULIP_TXDESC_PRESYNC(sc, ri->ri_nextout, sizeof(u_int32_t));
nextout->d_status = TULIP_DSTS_OWNER;
/*
- * Flush the ownwership of the current descriptor
+ * Flush the ownership of the current descriptor
*/
TULIP_TXDESC_PRESYNC(sc, nextout, sizeof(u_int32_t));
TULIP_CSR_WRITE(sc, csr_txpoll, 1);
-/* $OpenBSD: if_devar.h,v 1.39 2018/11/25 19:52:08 jmc Exp $ */
+/* $OpenBSD: if_devar.h,v 1.40 2022/01/09 05:42:50 jsg Exp $ */
/* $NetBSD: if_devar.h,v 1.13 1997/06/08 18:46:36 thorpej Exp $ */
/*-
tulip_media_info_t *tulip_mediums[TULIP_MEDIA_MAX]; /* indexes into mediainfo */
tulip_media_t tulip_media; /* current media type */
- u_int32_t tulip_abilities; /* remote system's abiltities (as defined in IEEE 802.3u) */
+ u_int32_t tulip_abilities; /* remote system's abilities (as defined in IEEE 802.3u) */
u_int8_t tulip_revinfo; /* revision of chip */
u_int8_t tulip_phyaddr; /* 0..31 -- address of current phy */
***************************************************************************/
-/* $OpenBSD: if_em.c,v 1.359 2021/12/14 10:48:10 patrick Exp $ */
+/* $OpenBSD: if_em.c,v 1.360 2022/01/09 05:42:50 jsg Exp $ */
/* $FreeBSD: if_em.c,v 1.46 2004/09/29 18:28:28 mlaier Exp $ */
#include <dev/pci/if_em.h>
INIT_DEBUGOUT("em_defer_attach: begin");
if ((gcu = em_lookup_gcu(self)) == 0) {
- printf("%s: No GCU found, defered attachment failed\n",
+ printf("%s: No GCU found, deferred attachment failed\n",
DEVNAME(sc));
if (sc->sc_intrhand)
* received after sending an XOFF.
* - Low water mark works best when it is very near the high water mark.
* This allows the receiver to restart by sending XON when it has
- * drained a bit. Here we use an arbitary value of 1500 which will
+ * drained a bit. Here we use an arbitrary value of 1500 which will
* restart after one full frame is pulled from the buffer. There
* could be several smaller frames in the buffer and if so they will
* not trigger the XON until their total number reduces the buffer
/*
* Interrupt for a specific queue, (not link interrupts). The EICR bit which
* maps to the EIMS bit expresses both RX and TX, therefore we can't
- * distringuish if this is a RX completion of TX completion and must do both.
+ * distinguish if this is a RX completion of TX completion and must do both.
* The bits in EICR are autocleared and we _cannot_ read EICR.
*/
int
***************************************************************************/
/* $FreeBSD: if_em.h,v 1.26 2004/09/01 23:22:41 pdeuskar Exp $ */
-/* $OpenBSD: if_em.h,v 1.79 2021/12/14 10:48:10 patrick Exp $ */
+/* $OpenBSD: if_em.h,v 1.80 2022/01/09 05:42:50 jsg Exp $ */
#ifndef _EM_H_DEFINED_
#define _EM_H_DEFINED_
#define EM_TX_TIMEOUT 5 /* set to 5 seconds */
/*
- * Thise parameter controls the minimum number of available transmit
+ * This parameter controls the minimum number of available transmit
* descriptors needed before we attempt transmission of a packet.
*/
#define EM_TX_OP_THRESHOLD (sc->num_tx_desc / 32)
*******************************************************************************/
-/* $OpenBSD: if_em_hw.c,v 1.112 2021/12/29 18:48:45 patrick Exp $ */
+/* $OpenBSD: if_em_hw.c,v 1.113 2022/01/09 05:42:50 jsg Exp $ */
/*
* if_em_hw.c Shared functions for accessing and configuring the MAC
*/
struct sfp_e1000_flags eth_flags;
int32_t ret_val = E1000_ERR_CONFIG;
uint32_t ctrl_ext = 0;
- uint8_t tranceiver_type = 0;
+ uint8_t transceiver_type = 0;
int32_t timeout = 3;
/* Turn I2C interface ON and power on sfp cage */
while (timeout) {
ret_val = em_read_sfp_data_byte(hw,
E1000_I2CCMD_SFP_DATA_ADDR(E1000_SFF_IDENTIFIER_OFFSET),
- &tranceiver_type);
+ &transceiver_type);
if (ret_val == E1000_SUCCESS)
break;
msec_delay(100);
goto out;
/* Check if there is some SFP module plugged and powered */
- if ((tranceiver_type == E1000_SFF_IDENTIFIER_SFP) ||
- (tranceiver_type == E1000_SFF_IDENTIFIER_SFF)) {
+ if ((transceiver_type == E1000_SFF_IDENTIFIER_SFP) ||
+ (transceiver_type == E1000_SFF_IDENTIFIER_SFF)) {
if (eth_flags.e1000_base_lx || eth_flags.e1000_base_sx) {
hw->media_type = em_media_type_internal_serdes;
} else if (eth_flags.e100_base_fx || eth_flags.e100_base_lx) {
em_disable_ulp_lpt_lp(hw, TRUE);
/*
- * Reset the PHY before any acccess to it. Doing so,
+ * Reset the PHY before any access to it. Doing so,
* ensures that the PHY is in a known good state before
* we read/write PHY registers. The generic reset is
* sufficient here, because we haven't determined
E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
/*
* use write flush to prevent Memory Write Block (MWB) from
- * occuring when accessing our register space
+ * occurring when accessing our register space
*/
E1000_WRITE_FLUSH(hw);
}
/*
* Since auto-negotiation is enabled, take the link out of reset (the
* link will be in reset, because we previously reset the chip). This
- * will restart auto-negotiation. If auto-neogtiation is successful
+ * will restart auto-negotiation. If auto-negotiation is successful
* then the link-up status bit will be set and the flow control
* enable bits (RFCE and TFCE) will be set according to their
* negotiated value.
/*
* Set PHY page 0, register 29 to 0x0003
* The next two writes are supposed to lower BER for gig
- * conection
+ * connection
*/
ret_val = em_write_phy_reg(hw, BM_REG_BIAS1, 0x0003);
if (ret_val)
* Forces MAC flow control settings if link was forced. When in MII/GMII mode
* and autonegotiation is enabled, the MAC flow control settings will be set
* based on the flow control negotiated by the PHY. In TBI mode, the TFCE
- * and RFCE bits will be automaticaly set to the negotiated flow control mode.
+ * and RFCE bits will be automatically set to the negotiated flow control mode.
*****************************************************************************/
STATIC int32_t
em_config_fc_after_link_up(struct em_hw *hw)
DEBUGFUNC("em_write_phy_reg_i2c");
- /* Prevent overwritting SFP I2C EEPROM which is at A0 address.*/
+ /* Prevent overwriting SFP I2C EEPROM which is at A0 address.*/
if ((hw->phy_addr == 0) || (hw->phy_addr > 7)) {
DEBUGOUT1("PHY I2C Address %d is out of range.\n",
hw->phy_addr);
*
* hw - Struct containing variables accessed by shared code
*
- * Sets bit 15 of the MII Control regiser
+ * Sets bit 15 of the MII Control register
*****************************************************************************/
int32_t
em_phy_reset(struct em_hw *hw)
if (em_acquire_eeprom(hw) != E1000_SUCCESS)
return -E1000_ERR_EEPROM;
}
- /* Eerd register EEPROM access requires no eeprom aquire/release */
+ /* Eerd register EEPROM access requires no eeprom acquire/release */
if (eeprom->use_eerd == TRUE)
return em_read_eeprom_eerd(hw, offset, words, data);
/*
* Set up the SPI or Microwire EEPROM for bit-bang reading. We have
- * acquired the EEPROM at this point, so any returns should relase it
+ * acquired the EEPROM at this point, so any returns should release it
*/
if (eeprom->type == em_eeprom_spi) {
uint16_t word_in;
* hw - Struct containing variables accessed by shared code
*
* Places the MAC address in receive address register 0 and clears the rest
- * of the receive addresss registers. Clears the multicast table. Assumes
+ * of the receive address registers. Clears the multicast table. Assumes
* the receiver is in reset when the routine is called.
*****************************************************************************/
STATIC void
}
/******************************************************************************
- * Check if Downshift occured
+ * Check if Downshift occurred
*
* hw - Struct containing variables accessed by shared code
- * downshift - output parameter : 0 - No Downshift ocured.
- * 1 - Downshift ocured.
+ * downshift - output parameter : 0 - No Downshift occurred.
+ * 1 - Downshift occurred.
*
* returns: - E1000_ERR_XXX
* E1000_SUCCESS
}
/*****************************************************************************
- * This function checks whether the HOST IF is enabled for command operaton
+ * This function checks whether the HOST IF is enabled for command operation
* and also checks whether the previous command is completed.
* It busy waits in case of previous command is not completed.
*
DEBUGOUT("PCIe completion timeout not set by system BIOS.");
/*
- * If capababilities version is type 1 we can write the
+ * If capabilities version is type 1 we can write the
* timeout of 10ms to 200ms through the GCR register
*/
*******************************************************************************/
-/* $OpenBSD: if_em_hw.h,v 1.85 2021/12/14 10:48:10 patrick Exp $ */
+/* $OpenBSD: if_em_hw.h,v 1.86 2022/01/09 05:42:50 jsg Exp $ */
/* $FreeBSD: if_em_hw.h,v 1.15 2005/05/26 23:32:02 tackerman Exp $ */
/* if_em_hw.h
struct em_hw_stats;
/* Enumerated types specific to the e1000 hardware */
-/* Media Access Controlers */
+/* Media Access Controllers */
typedef enum {
em_undefined = 0,
em_82542_rev2_0,
} wb; /* writeback */
};
-/* Receive Decriptor bit definitions */
+/* Receive Descriptor bit definitions */
#define E1000_RXD_STAT_DD 0x01 /* Descriptor Done */
#define E1000_RXD_STAT_EOP 0x02 /* End of Packet */
#define E1000_RXD_STAT_IXSM 0x04 /* Ignore checksum */
#define E1000_RXD_STAT_VP 0x08 /* IEEE VLAN Packet */
-#define E1000_RXD_STAT_UDPCS 0x10 /* UDP xsum caculated */
+#define E1000_RXD_STAT_UDPCS 0x10 /* UDP xsum calculated */
#define E1000_RXD_STAT_TCPCS 0x20 /* TCP xsum calculated */
#define E1000_RXD_STAT_IPCS 0x40 /* IP xsum calculated */
#define E1000_RXD_STAT_PIF 0x80 /* passed in-exact filter */
#define E1000_KUMCTRLSTA 0x00034 /* MAC-PHY interface - RW */
#define E1000_MDPHYA 0x0003C /* PHY address - RW */
-#define E1000_MANC2H 0x05860 /* Managment Control To Host - RW */
+#define E1000_MANC2H 0x05860 /* Management Control To Host - RW */
#define E1000_SW_FW_SYNC 0x05B5C /* Software-Firmware Synchronization - RW */
#define E1000_GCR 0x05B00 /* PCI-Ex Control */
#define E1000_STATUS_SERDES0_DIS 0x10000000 /* SERDES disabled on port 0 */
#define E1000_STATUS_SERDES1_DIS 0x20000000 /* SERDES disabled on port 1 */
-/* Constants used to intrepret the masked PCI-X bus speed. */
+/* Constants used to interpret the masked PCI-X bus speed. */
#define E1000_STATUS_PCIX_SPEED_66 0x00000000 /* PCI-X bus speed 50-66 MHz */
#define E1000_STATUS_PCIX_SPEED_100 0x00004000 /* PCI-X bus speed 66-100 MHz */
#define E1000_STATUS_PCIX_SPEED_133 0x00008000 /* PCI-X bus speed 100-133 MHz */
#define E1000_ICR_ALL_PARITY 0x03F00000 /* all parity error bits */
#define E1000_ICR_DSW 0x00000020 /* FW changed the status of DISSW bit in the FWSM */
#define E1000_ICR_PHYINT 0x00001000 /* LAN connected device generates an interrupt */
-#define E1000_ICR_EPRST 0x00100000 /* ME handware reset occurs */
+#define E1000_ICR_EPRST 0x00100000 /* ME hardware reset occurs */
#define E1000_ICR_DRSTA 0x40000000 /* Device Reset Asserted */
/* Interrupt Cause Set */
/* PHY 1000 MII Register/Bit Definitions */
/* PHY Registers defined by IEEE */
#define PHY_CTRL 0x00 /* Control Register */
-#define PHY_STATUS 0x01 /* Status Regiser */
+#define PHY_STATUS 0x01 /* Status Register */
#define PHY_ID1 0x02 /* Phy Id Reg (word 1) */
#define PHY_ID2 0x03 /* Phy Id Reg (word 2) */
#define PHY_AUTONEG_ADV 0x04 /* Autoneg Advertisement */
#define GG82563_KMCR_PASS_FALSE_CARRIER 0x0800
/* Power Management Control Register (Page 193, Register 20) */
-#define GG82563_PMCR_ENABLE_ELECTRICAL_IDLE 0x0001 /* 1=Enalbe SERDES Electrical Idle */
+#define GG82563_PMCR_ENABLE_ELECTRICAL_IDLE 0x0001 /* 1=Enable SERDES Electrical Idle */
#define GG82563_PMCR_DISABLE_PORT 0x0002 /* 1=Disable Port */
#define GG82563_PMCR_DISABLE_SERDES 0x0004 /* 1=Disable SERDES */
#define GG82563_PMCR_REVERSE_AUTO_NEG 0x0008 /* 1=Enable Reverse Auto-Negotiation */
#define IFE_PHY_EXTENDED_STATUS_CONTROL 0x10 /* 100BaseTx Extended Status, Control and Address */
#define IFE_PHY_SPECIAL_CONTROL 0x11 /* 100BaseTx PHY special control register */
#define IFE_PHY_RCV_FALSE_CARRIER 0x13 /* 100BaseTx Receive False Carrier Counter */
-#define IFE_PHY_RCV_DISCONNECT 0x14 /* 100BaseTx Receive Disconnet Counter */
+#define IFE_PHY_RCV_DISCONNECT 0x14 /* 100BaseTx Receive Disconnect Counter */
#define IFE_PHY_RCV_ERROT_FRAME 0x15 /* 100BaseTx Receive Error Frame Counter */
#define IFE_PHY_RCV_SYMBOL_ERR 0x16 /* Receive Symbol Error Counter */
#define IFE_PHY_PREM_EOF_ERR 0x17 /* 100BaseTx Receive Premature End Of Frame Error Counter */
#define IFE_PHY_MDIX_CONTROL 0x1C /* MDI/MDI-X Control register */
#define IFE_PHY_HWI_CONTROL 0x1D /* Hardware Integrity Control (HWI) */
-#define IFE_PESC_REDUCED_POWER_DOWN_DISABLE 0x2000 /* Defaut 1 = Disable auto reduced power down */
+#define IFE_PESC_REDUCED_POWER_DOWN_DISABLE 0x2000 /* Default 1 = Disable auto reduced power down */
#define IFE_PESC_100BTX_POWER_DOWN 0x0400 /* Indicates the power state of 100BASE-TX */
#define IFE_PESC_10BTX_POWER_DOWN 0x0200 /* Indicates the power state of 10BASE-T */
#define IFE_PESC_POLARITY_REVERSED 0x0100 /* Indicates 10BASE-T polarity */
#define IFE_PESC_DUPLEX 0x0001 /* Auto-negotiation duplex result 1=Full, 0=Half */
#define IFE_PESC_POLARITY_REVERSED_SHIFT 8
-#define IFE_PSC_DISABLE_DYNAMIC_POWER_DOWN 0x0100 /* 1 = Dyanmic Power Down disabled */
+#define IFE_PSC_DISABLE_DYNAMIC_POWER_DOWN 0x0100 /* 1 = Dynamic Power Down disabled */
#define IFE_PSC_FORCE_POLARITY 0x0020 /* 1=Reversed Polarity, 0=Normal */
#define IFE_PSC_AUTO_POLARITY_DISABLE 0x0010 /* 1=Auto Polarity Disabled, 0=Enabled */
#define IFE_PSC_JABBER_FUNC_DISABLE 0x0001 /* 1=Jabber Disabled, 0=Normal Jabber Operation */
#define IFE_PMC_AUTO_MDIX 0x0080 /* 1=enable MDI/MDI-X feature, default 0=disabled */
#define IFE_PMC_FORCE_MDIX 0x0040 /* 1=force MDIX-X, 0=force MDI */
#define IFE_PMC_MDIX_STATUS 0x0020 /* 1=MDI-X, 0=MDI */
-#define IFE_PMC_AUTO_MDIX_COMPLETE 0x0010 /* Resolution algorthm is completed */
+#define IFE_PMC_AUTO_MDIX_COMPLETE 0x0010 /* Resolution algorithm is completed */
#define IFE_PMC_MDIX_MODE_SHIFT 6
#define IFE_PHC_MDIX_RESET_ALL_MASK 0x0000 /* Disable auto MDI-X */
-/* $OpenBSD: if_et.c,v 1.40 2021/12/23 01:39:44 jsg Exp $ */
+/* $OpenBSD: if_et.c,v 1.41 2022/01/09 05:42:50 jsg Exp $ */
/*
* Copyright (c) 2007 The DragonFly Project. All rights reserved.
*
/* No flow control yet */
CSR_WRITE_4(sc, ET_TXMAC_FLOWCTRL, 0);
- /* Enable TX MAC but leave FC(?) diabled */
+ /* Enable TX MAC but leave FC(?) disabled */
CSR_WRITE_4(sc, ET_TXMAC_CTRL,
ET_TXMAC_CTRL_ENABLE | ET_TXMAC_CTRL_FC_DISABLE);
}
-/* $OpenBSD: if_etreg.h,v 1.5 2013/11/26 20:33:17 deraadt Exp $ */
+/* $OpenBSD: if_etreg.h,v 1.6 2022/01/09 05:42:50 jsg Exp $ */
/*
* Copyright (c) 2007 The DragonFly Project. All rights reserved.
#define ET_PCIV_ACK_LATENCY_256 416
#define ET_PCIR_REPLAY_TIMER 0xc2
-#define ET_REPLAY_TIMER_RX_L0S_ADJ 250 /* XXX infered from default */
+#define ET_REPLAY_TIMER_RX_L0S_ADJ 250 /* XXX inferred from default */
#define ET_PCIV_REPLAY_TIMER_128 (711 + ET_REPLAY_TIMER_RX_L0S_ADJ)
#define ET_PCIV_REPLAY_TIMER_256 (1248 + ET_REPLAY_TIMER_RX_L0S_ADJ)
-/* $OpenBSD: if_igc.h,v 1.1 2021/10/31 14:52:57 patrick Exp $ */
+/* $OpenBSD: if_igc.h,v 1.2 2022/01/09 05:42:50 jsg Exp $ */
/*-
* SPDX-License-Identifier: BSD-2-Clause
*
* Increasing this value allows the driver to queue more transmits. Each
* descriptor is 16 bytes.
* Since TDLEN should be multiple of 128bytes, the number of transmit
- * desscriptors should meet the following condition.
+ * descriptors should meet the following condition.
* (num_tx_desc * sizeof(struct igc_tx_desc)) % 128 == 0
*/
#define IGC_MIN_TXD 128
* Each descriptor is 16 bytes. A receive buffer is also allocated for each
* descriptor. The maximum MTU size is 16110.
* Since TDLEN should be multiple of 128bytes, the number of transmit
- * desscriptors should meet the following condition.
+ * descriptors should meet the following condition.
* (num_tx_desc * sizeof(struct igc_tx_desc)) % 128 == 0
*/
#define IGC_MIN_RXD 128
#define IGC_RADV_VAL 64
/*
- * This parameter controls whether or not autonegotation is enabled.
+ * This parameter controls whether or not autonegotiation is enabled.
* 0 - Disable autonegotiation
* 1 - Enable autonegotiation
*/
#define AUTO_ALL_MODES 0
/*
- * Micellaneous constants
+ * Miscellaneous constants
*/
#define MAX_NUM_MULTICAST_ADDRESSES 128
#define IGC_FC_PAUSE_TIME 0x0680
-/* $OpenBSD: if_ipw.c,v 1.129 2021/03/28 18:02:32 stsp Exp $ */
+/* $OpenBSD: if_ipw.c,v 1.130 2022/01/09 05:42:50 jsg Exp $ */
/*-
* Copyright (c) 2004-2008
frm = ieee80211_add_wpa(frm, ic, ni);
assoc.optie_len = htole32(frm - assoc.optie);
}
- DPRINTF(("Preparing assocation request (optional IE length=%d)\n",
+ DPRINTF(("Preparing association request (optional IE length=%d)\n",
letoh32(assoc.optie_len)));
error = ipw_cmd(sc, IPW_CMD_SET_ASSOC_REQ, &assoc, sizeof assoc);
if (error != 0)
-/* $OpenBSD: if_iwm.c,v 1.388 2022/01/05 17:06:20 stsp Exp $ */
+/* $OpenBSD: if_iwm.c,v 1.389 2022/01/09 05:42:50 jsg Exp $ */
/*
* Copyright (c) 2014, 2016 genua gmbh <info@genua.de>
IWM_WRITE(sc, IWM_CSR_UCODE_DRV_GP1_CLR,
IWM_CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
- /* clear (again), then enable firwmare load interrupt */
+ /* clear (again), then enable firmware load interrupt */
IWM_WRITE(sc, IWM_CSR_INT, ~0);
iwm_enable_fwload_interrupt(sc);
struct iwm_softc *sc = ifp->if_softc;
/*
- * Prevent attemps to transition towards the same state, unless
+ * Prevent attempts to transition towards the same state, unless
* we are scanning in which case a SCAN -> SCAN transition
* triggers another scan iteration. And AUTH -> AUTH is needed
* to support band-steering.
-/* $OpenBSD: if_iwmreg.h,v 1.66 2021/12/20 15:08:10 stsp Exp $ */
+/* $OpenBSD: if_iwmreg.h,v 1.67 2022/01/09 05:42:50 jsg Exp $ */
/******************************************************************************
*
* scan request.
* @IWM_UCODE_TLV_API_TKIP_MIC_KEYS: This ucode supports version 2 of
* ADD_MODIFY_STA_KEY_API_S_VER_2.
- * @IWM_UCODE_TLV_API_STA_TYPE: This ucode supports station type assignement.
+ * @IWM_UCODE_TLV_API_STA_TYPE: This ucode supports station type assignment.
* @IWM_UCODE_TLV_API_EXT_SCAN_PRIORITY: scan APIs use 8-level priority
* instead of 3.
* @IWM_UCODE_TLV_API_NEW_RX_STATS: should new RX STATISTICS API be used
* struct iwm_error_resp - FW error indication
* ( IWM_REPLY_ERROR = 0x2 )
* @error_type: one of IWM_FW_ERR_*
- * @cmd_id: the command ID for which the error occured
+ * @cmd_id: the command ID for which the error occurred
* @bad_cmd_seq_num: sequence number of the erroneous command
* @error_service: which service created the error, applicable only if
* error_type = 2, otherwise 0
* @IWM_TE_V2_NOTIF_INTERNAL_FRAG_END: internal FW use.
* @IWM_TE_V2_DEP_OTHER: depends on another time event
* @IWM_TE_V2_DEP_TSF: depends on a specific time
- * @IWM_TE_V2_EVENT_SOCIOPATHIC: can't co-exist with other events of tha same MAC
+ * @IWM_TE_V2_EVENT_SOCIOPATHIC: can't co-exist with other events of the same MAC
* @IWM_TE_V2_ABSENCE: are we present or absent during the Time Event.
*/
#define IWM_TE_V2_DEFAULT_POLICY 0x0
* struct iwm_time_quota_data - configuration of time quota per binding
* @id_and_color: ID and color of the relevant Binding
* @quota: absolute time quota in TU. The scheduler will try to divide the
- * remainig quota (after Time Events) according to this quota.
+ * remaining quota (after Time Events) according to this quota.
* @max_duration: max uninterrupted context duration in TU
*/
struct iwm_time_quota_data_v1 {
* struct iwm_time_quota_data - configuration of time quota per binding
* @id_and_color: ID and color of the relevant Binding.
* @quota: absolute time quota in TU. The scheduler will try to divide the
- * remainig quota (after Time Events) according to this quota.
+ * remaining quota (after Time Events) according to this quota.
* @max_duration: max uninterrupted context duration in TU
* @low_latency: low latency status IWM_QUOTA_LOW_LATENCY_*
*/
/**
* struct iwm_time_quota_cmd - configuration of time quota between bindings
* ( TIME_QUOTA_CMD = 0x2c )
- * Note: on non-CDB the fourth one is the auxilary mac and is essentially zero.
+ * Note: on non-CDB the fourth one is the auxiliary mac and is essentially zero.
* On CDB the fourth one is a regular binding.
*
* @quotas: allocations per binding
* XXX Intel forgot to bump the PHY_CONTEXT command API when they increased
* the size of fw_channel_info from v1 to v2.
* To keep things simple we define two versions of this struct, and both
- * are labled as CMD_API_VER_1. (The Linux iwlwifi driver performs dark
+ * are labeled as CMD_API_VER_1. (The Linux iwlwifi driver performs dark
* magic with pointers to struct members instead.)
*/
/* This version must be used if IWM_UCODE_TLV_CAPA_ULTRA_HB_CHANNELS is set: */
/**
* Smart Fifo configuration command.
* @state: smart fifo state, types listed in enum %iwm_sf_state.
- * @watermark: Minimum allowed availabe free space in RXF for transient state.
+ * @watermark: Minimum allowed available free space in RXF for transient state.
* @long_delay_timeouts: aging and idle timer values for each scenario
* in long delay state.
* @full_on_timeouts: timer values for each scenario in full on state.
/**
* MAC context filter flags
* @IWM_MAC_FILTER_IN_PROMISC: accept all data frames
- * @IWM_MAC_FILTER_IN_CONTROL_AND_MGMT: pass all mangement and
+ * @IWM_MAC_FILTER_IN_CONTROL_AND_MGMT: pass all management and
* control frames to the host
* @IWM_MAC_FILTER_ACCEPT_GRP: accept multicast frames
* @IWM_MAC_FILTER_DIS_DECRYPT: don't decrypt unicast frames
/**
* struct iwm_mac_power_cmd - New power command containing uAPSD support
* IWM_MAC_PM_POWER_TABLE = 0xA9 (command, has simple generic response)
- * @id_and_color: MAC contex identifier
+ * @id_and_color: MAC context identifier
* @flags: Power table command flags from POWER_FLAGS_*
* @keep_alive_seconds: Keep alive period in seconds. Default - 25 sec.
* Minimum allowed:- 3 * DTIM. Keep alive period must be
/**
* struct iwm_beacon_filter_cmd
* IWM_REPLY_BEACON_FILTERING_CMD = 0xd2 (command)
- * @id_and_color: MAC contex identifier
+ * @id_and_color: MAC context identifier
* @bf_energy_delta: Used for RSSI filtering, if in 'normal' state. Send beacon
* to driver if delta in Energy values calculated for this and last
* passed beacon is greater than this threshold. Zero value means that
* Roaming Energy Delta Threshold, otherwise use normal Energy Delta
* Threshold. Typical energy threshold is -72dBm.
* @bf_temp_threshold: This threshold determines the type of temperature
- * filtering (Slow or Fast) that is selected (Units are in Celsuis):
+ * filtering (Slow or Fast) that is selected (Units are in Celsius):
* If the current temperature is above this threshold - Fast filter
* will be used, If the current temperature is below this threshold -
* Slow filter will be used.
* calculated for this and the last passed beacon is greater than this
* threshold. Zero value means that the temperature change is ignored for
* beacon filtering; beacons will not be forced to be sent to driver
- * regardless of whether its temerature has been changed.
+ * regardless of whether its temperature has been changed.
* @bf_temp_slow_filter: Send Beacon to driver if delta in temperature values
* calculated for this and the last passed beacon is greater than this
* threshold. Zero value means that the temperature change is ignored for
* beacon filtering; beacons will not be forced to be sent to driver
- * regardless of whether its temerature has been changed.
+ * regardless of whether its temperature has been changed.
* @bf_enable_beacon_filter: 1, beacon filtering is enabled; 0, disabled.
* @bf_escape_timer: Send beacons to driver if no beacons were passed
* for a specific period of time. Units: Beacons.
#define IWM_LQ_FLAG_RTS_BW_SIG_DYNAMIC (2 << IWM_LQ_FLAG_RTS_BW_SIG_POS)
/* Bit 6: (0) No dynamic BW selection (1) Allow dynamic BW selection
- * Dyanmic BW selection allows Tx with narrower BW then requested in rates
+ * Dynamic BW selection allows Tx with narrower BW than requested in rates
*/
#define IWM_LQ_FLAG_DYNAMIC_BW_POS 6
#define IWM_LQ_FLAG_DYNAMIC_BW_MSK (1 << IWM_LQ_FLAG_DYNAMIC_BW_POS)
* Range of len: 14-2342 bytes.
*
* After the struct fields the MAC header is placed, plus any padding,
- * and then the actial payload.
+ * and then the actual payload.
*/
struct iwm_tx_cmd {
uint16_t len;
/*
* struct iwm_mac_beacon_cmd - beacon template command
* @tx: the tx commands associated with the beacon frame
- * @template_id: currently equal to the mac context id of the coresponding
+ * @template_id: currently equal to the mac context id of the corresponding
* mac.
* @tim_idx: the offset of the tim IE in the beacon
* @tim_size: the length of the tim IE
* @token:
* @sta_id: station id
* @tid:
- * @scd_queue: scheduler queue to confiug
+ * @scd_queue: scheduler queue to config
* @enable: 1 queue enable, 0 queue disable
* @aggregate: 1 aggregated queue, 0 otherwise
* @tx_fifo: %enum iwm_tx_fifo
/**
* iwm_scan_offload_profile - IWM_SCAN_OFFLOAD_PROFILE_S
* @ssid_index: index to ssid list in fixed part
- * @unicast_cipher: encryption olgorithm to match - bitmap
- * @aut_alg: authentication olgorithm to match - bitmap
+ * @unicast_cipher: encryption algorithm to match - bitmap
+ * @aut_alg: authentication algorithm to match - bitmap
* @network_type: enum iwm_scan_offload_network_type
* @band_selection: enum iwm_scan_offload_band_selection
* @client_bitmap: clients waiting for match - enum scan_framework_client
/**
* iwm_scan_offload_profile_cfg - IWM_SCAN_OFFLOAD_PROFILES_CFG_API_S_VER_1
- * @blaclist: AP list to filter off from scan results
+ * @blacklist: AP list to filter off from scan results
* @profiles: profiles to search for match
* @blacklist_len: length of blacklist
* @num_profiles: num of profiles in the list
* iwm_umac_scan_flags
*@IWM_UMAC_SCAN_FLAG_PREEMPTIVE: scan process triggered by this scan request
* can be preempted by other scan requests with higher priority.
- * The low priority scan will be resumed when the higher proirity scan is
+ * The low priority scan will be resumed when the higher priority scan is
* completed.
*@IWM_UMAC_SCAN_FLAG_START_NOTIF: notification will be sent to the driver
* when scan starts.
#define IWM_UMAC_SCAN_GEN_FLAGS_RRM_ENABLED (1 << 8)
#define IWM_UMAC_SCAN_GEN_FLAGS_MATCH (1 << 9)
#define IWM_UMAC_SCAN_GEN_FLAGS_EXTENDED_DWELL (1 << 10)
-/* Extended dwell is obselete when adaptive dwell is used, making this
+/* Extended dwell is obsolete when adaptive dwell is used, making this
* bit reusable. Hence, probe request defer is used only when adaptive
* dwell is supported. */
#define IWM_UMAC_SCAN_GEN_FLAGS_PROB_REQ_DEFER_SUPP (1 << 10)
* @IWM_STA_KEY_FLG_EXT: extended cipher algorithm (depends on the FW support)
* @IWM_STA_KEY_FLG_CMAC: CMAC encryption algorithm
* @IWM_STA_KEY_FLG_ENC_UNKNOWN: unknown encryption algorithm
- * @IWM_STA_KEY_FLG_EN_MSK: mask for encryption algorithmi value
+ * @IWM_STA_KEY_FLG_EN_MSK: mask for encryption algorithm value
* @IWM_STA_KEY_FLG_WEP_KEY_MAP: wep is either a group key (0 - legacy WEP) or from
* station info array (1 - n 1X mode)
* @IWM_STA_KEY_FLG_KEYID_MSK: the index of the key
* mac-addr.
* @beamform_flags: beam forming controls
* @tfd_queue_msk: tfd queues used by this station.
- * Obselete for new TX API (9 and above).
+ * Obsolete for new TX API (9 and above).
* @rx_ba_window: aggregation window size
* @sp_length: the size of the SP in actual number of frames
* @uapsd_acs: 4 LS bits are trigger enabled ACs, 4 MS bits are the deliver
* and probe responses.
* @IWM_STA_MULTICAST: multicast traffic,
* @IWM_STA_TDLS_LINK: TDLS link station
- * @IWM_STA_AUX_ACTIVITY: auxilary station (scan, ROC and so on).
+ * @IWM_STA_AUX_ACTIVITY: auxiliary station (scan, ROC and so on).
*/
#define IWM_STA_LINK 0
#define IWM_STA_GENERAL_PURPOSE 1
-/* $OpenBSD: if_iwmvar.h,v 1.74 2021/12/20 15:08:10 stsp Exp $ */
+/* $OpenBSD: if_iwmvar.h,v 1.75 2022/01/09 05:42:52 jsg Exp $ */
/*
* Copyright (c) 2014 genua mbh <info@genua.de>
/*
* So why do we need a separate stopped flag and a generation?
- * the former protects the device from issueing commands when it's
+ * the former protects the device from issuing commands when it's
* stopped (duh). The latter protects against race from a very
* fast stop/unstop cycle where threads waiting for responses do
* not have a chance to run in between. Notably: we want to stop
* the device from interrupt context when it craps out, so we
- * don't have the luxury of waiting for quiescense.
+ * don't have the luxury of waiting for quiescence.
*/
int sc_generation;
-/* $OpenBSD: if_iwn.c,v 1.253 2021/11/12 11:41:04 stsp Exp $ */
+/* $OpenBSD: if_iwn.c,v 1.254 2022/01/09 05:42:52 jsg Exp $ */
/*-
* Copyright (c) 2007-2010 Damien Bergamini <damien.bergamini@free.fr>
/*
* This function is called by upper layer on teardown of an HT-immediate
- * Block Ack agreement (eg. uppon receipt of a DELBA frame).
+ * Block Ack agreement (e.g., upon receipt of a DELBA frame).
*/
void
iwn_ampdu_rx_stop(struct ieee80211com *ic, struct ieee80211_node *ni,
-/* $OpenBSD: if_iwx.c,v 1.132 2022/01/05 17:06:20 stsp Exp $ */
+/* $OpenBSD: if_iwx.c,v 1.133 2022/01/09 05:42:52 jsg Exp $ */
/*
* Copyright (c) 2014, 2016 genua gmbh <info@genua.de>
* than we currently need.
*
* In DQA mode we use 1 command queue + 1 default queue for
- * managment, control, and non-QoS data frames.
+ * management, control, and non-QoS data frames.
* The command is queue sc->txq[0], our default queue is sc->txq[1].
*
* Tx aggregation requires additional queues, one queue per TID for
IWX_WRITE(sc, IWX_CSR_UCODE_DRV_GP1_CLR,
IWX_CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
- /* clear (again), then enable firwmare load interrupt */
+ /* clear (again), then enable firmware load interrupt */
IWX_WRITE(sc, IWX_CSR_INT, ~0);
err = iwx_nic_init(sc);
struct iwx_softc *sc = ifp->if_softc;
/*
- * Prevent attemps to transition towards the same state, unless
+ * Prevent attempts to transition towards the same state, unless
* we are scanning in which case a SCAN -> SCAN transition
* triggers another scan iteration. And AUTH -> AUTH is needed
* to support band-steering.
-/* $OpenBSD: if_iwxreg.h,v 1.33 2021/11/25 14:51:26 stsp Exp $ */
+/* $OpenBSD: if_iwxreg.h,v 1.34 2022/01/09 05:42:52 jsg Exp $ */
/*-
* Based on BSD-licensed source modules in the Linux iwlwifi driver,
*/
-/* maximmum number of DRAM map entries supported by FW */
+/* maximum number of DRAM map entries supported by FW */
#define IWX_MAX_DRAM_ENTRY 64
#define IWX_CSR_CTXT_INFO_BA 0x40
*
* Bits 3:0:
* Define the maximum number of pending read requests.
- * Maximum configration value allowed is 0xC
+ * Maximum configuration value allowed is 0xC
* Bits 9:8:
* Define the maximum transfer size. (64 / 128 / 256)
* Bit 10:
/* end of 9000 rx series registers */
/*
- * This register is writen by driver and is read by uCode during boot flow.
+ * This register is written by driver and is read by uCode during boot flow.
* Note this address is cleared after MAC reset.
*/
#define IWX_UREG_UCODE_LOAD_STATUS (0xa05c40)
* scan request.
* @IWX_UCODE_TLV_API_TKIP_MIC_KEYS: This ucode supports version 2 of
* ADD_MODIFY_STA_KEY_API_S_VER_2.
- * @IWX_UCODE_TLV_API_STA_TYPE: This ucode supports station type assignement.
+ * @IWX_UCODE_TLV_API_STA_TYPE: This ucode supports station type assignment.
* @IWX_UCODE_TLV_API_EXT_SCAN_PRIORITY: scan APIs use 8-level priority
* instead of 3.
* @IWX_UCODE_TLV_API_NEW_RX_STATS: should new RX STATISTICS API be used
* struct iwx_error_resp - FW error indication
* ( IWX_REPLY_ERROR = 0x2 )
* @error_type: one of IWX_FW_ERR_*
- * @cmd_id: the command ID for which the error occured
+ * @cmd_id: the command ID for which the error occurred
* @bad_cmd_seq_num: sequence number of the erroneous command
* @error_service: which service created the error, applicable only if
* error_type = 2, otherwise 0
* tx_bar: tid bitmap to configure on what tid the trigger should occur
* when a BAR is send (for an Rx BlocAck session).
* frame_timeout: tid bitmap to configure on what tid the trigger should occur
- * when a frame times out in the reodering buffer.
+ * when a frame times out in the reordering buffer.
*/
struct iwx_fw_dbg_trigger_ba {
uint16_t rx_ba_start;
* @IWX_TE_V2_NOTIF_INTERNAL_FRAG_END: internal FW use.
* @IWX_TE_V2_DEP_OTHER: depends on another time event
* @IWX_TE_V2_DEP_TSF: depends on a specific time
- * @IWX_TE_V2_EVENT_SOCIOPATHIC: can't co-exist with other events of tha same MAC
+ * @IWX_TE_V2_EVENT_SOCIOPATHIC: can't co-exist with other events of the same MAC
* @IWX_TE_V2_ABSENCE: are we present or absent during the Time Event.
*/
#define IWX_TE_V2_DEFAULT_POLICY 0x0
* struct iwx_time_quota_data - configuration of time quota per binding
* @id_and_color: ID and color of the relevant Binding
* @quota: absolute time quota in TU. The scheduler will try to divide the
- * remainig quota (after Time Events) according to this quota.
+ * remaining quota (after Time Events) according to this quota.
* @max_duration: max uninterrupted context duration in TU
*/
struct iwx_time_quota_data {
* XXX Intel forgot to bump the PHY_CONTEXT command API when they increased
* the size of fw_channel_info from v1 to v2.
* To keep things simple we define two versions of this struct, and both
- * are labled as CMD_API_VER_1. (The Linux iwlwifi driver performs dark
+ * are labeled as CMD_API_VER_1. (The Linux iwlwifi driver performs dark
* magic with pointers to struct members instead.)
*/
/* This version must be used if IWX_UCODE_TLV_CAPA_ULTRA_HB_CHANNELS is set: */
/**
* Smart Fifo configuration command.
* @state: smart fifo state, types listed in enum %iwx_sf_state.
- * @watermark: Minimum allowed availabe free space in RXF for transient state.
+ * @watermark: Minimum allowed available free space in RXF for transient state.
* @long_delay_timeouts: aging and idle timer values for each scenario
* in long delay state.
* @full_on_timeouts: timer values for each scenario in full on state.
/**
* MAC context filter flags
* @IWX_MAC_FILTER_IN_PROMISC: accept all data frames
- * @IWX_MAC_FILTER_IN_CONTROL_AND_MGMT: pass all mangement and
+ * @IWX_MAC_FILTER_IN_CONTROL_AND_MGMT: pass all management and
* control frames to the host
* @IWX_MAC_FILTER_ACCEPT_GRP: accept multicast frames
* @IWX_MAC_FILTER_DIS_DECRYPT: don't decrypt unicast frames
/**
* struct iwx_mac_power_cmd - New power command containing uAPSD support
* IWX_MAC_PM_POWER_TABLE = 0xA9 (command, has simple generic response)
- * @id_and_color: MAC contex identifier
+ * @id_and_color: MAC context identifier
* @flags: Power table command flags from POWER_FLAGS_*
* @keep_alive_seconds: Keep alive period in seconds. Default - 25 sec.
* Minimum allowed:- 3 * DTIM. Keep alive period must be
/**
* struct iwx_beacon_filter_cmd
* IWX_REPLY_BEACON_FILTERING_CMD = 0xd2 (command)
- * @id_and_color: MAC contex identifier
+ * @id_and_color: MAC context identifier
* @bf_energy_delta: Used for RSSI filtering, if in 'normal' state. Send beacon
* to driver if delta in Energy values calculated for this and last
* passed beacon is greater than this threshold. Zero value means that
* Roaming Energy Delta Threshold, otherwise use normal Energy Delta
* Threshold. Typical energy threshold is -72dBm.
* @bf_temp_threshold: This threshold determines the type of temperature
- * filtering (Slow or Fast) that is selected (Units are in Celsuis):
+ * filtering (Slow or Fast) that is selected (Units are in Celsius):
* If the current temperature is above this threshold - Fast filter
* will be used, If the current temperature is below this threshold -
* Slow filter will be used.
* calculated for this and the last passed beacon is greater than this
* threshold. Zero value means that the temperature change is ignored for
* beacon filtering; beacons will not be forced to be sent to driver
- * regardless of whether its temerature has been changed.
+ * regardless of whether its temperature has been changed.
* @bf_temp_slow_filter: Send Beacon to driver if delta in temperature values
* calculated for this and the last passed beacon is greater than this
* threshold. Zero value means that the temperature change is ignored for
* beacon filtering; beacons will not be forced to be sent to driver
- * regardless of whether its temerature has been changed.
+ * regardless of whether its temperature has been changed.
* @bf_enable_beacon_filter: 1, beacon filtering is enabled; 0, disabled.
* @bf_escape_timer: Send beacons to driver if no beacons were passed
* for a specific period of time. Units: Beacons.
#define IWX_LQ_FLAG_RTS_BW_SIG_DYNAMIC (2 << IWX_LQ_FLAG_RTS_BW_SIG_POS)
/* Bit 6: (0) No dynamic BW selection (1) Allow dynamic BW selection
- * Dyanmic BW selection allows Tx with narrower BW then requested in rates
+ * Dynamic BW selection allows Tx with narrower BW then requested in rates
*/
#define IWX_LQ_FLAG_DYNAMIC_BW_POS 6
#define IWX_LQ_FLAG_DYNAMIC_BW_MSK (1 << IWX_LQ_FLAG_DYNAMIC_BW_POS)
* @token:
* @sta_id: station id
* @tid:
- * @scd_queue: scheduler queue to confiug
+ * @scd_queue: scheduler queue to config
* @enable: 1 queue enable, 0 queue disable
* @aggregate: 1 aggregated queue, 0 otherwise
* @tx_fifo: %enum iwx_tx_fifo
/**
* iwx_scan_offload_profile - IWX_SCAN_OFFLOAD_PROFILE_S
* @ssid_index: index to ssid list in fixed part
- * @unicast_cipher: encryption olgorithm to match - bitmap
- * @aut_alg: authentication olgorithm to match - bitmap
+ * @unicast_cipher: encryption algorithm to match - bitmap
+ * @aut_alg: authentication algorithm to match - bitmap
* @network_type: enum iwx_scan_offload_network_type
* @band_selection: enum iwx_scan_offload_band_selection
* @client_bitmap: clients waiting for match - enum scan_framework_client
/**
* iwx_scan_offload_profile_cfg - IWX_SCAN_OFFLOAD_PROFILES_CFG_API_S_VER_1
- * @blaclist: AP list to filter off from scan results
+ * @blacklist: AP list to filter off from scan results
* @profiles: profiles to search for match
* @blacklist_len: length of blacklist
* @num_profiles: num of profiles in the list
/**
* struct iwl_scan_config
* @enable_cam_mode: whether to enable CAM mode.
- * @enable_promiscouos_mode: whether to enable promiscouos mode
+ * @enable_promiscuous_mode: whether to enable promiscuous mode
* @bcast_sta_id: the index of the station in the fw. Deprecated starting with
* API version 5.
* @reserved: reserved
*/
struct iwx_scan_config {
uint8_t enable_cam_mode;
- uint8_t enable_promiscouos_mode;
+ uint8_t enable_promiscuous_mode;
uint8_t bcast_sta_id;
uint8_t reserved;
uint32_t tx_chains;
* iwx_umac_scan_flags
*@IWX_UMAC_SCAN_FLAG_PREEMPTIVE: scan process triggered by this scan request
* can be preempted by other scan requests with higher priority.
- * The low priority scan will be resumed when the higher proirity scan is
+ * The low priority scan will be resumed when the higher priority scan is
* completed.
*@IWX_UMAC_SCAN_FLAG_START_NOTIF: notification will be sent to the driver
* when scan starts.
#define IWX_UMAC_SCAN_GEN_FLAGS_RRM_ENABLED (1 << 8)
#define IWX_UMAC_SCAN_GEN_FLAGS_MATCH (1 << 9)
#define IWX_UMAC_SCAN_GEN_FLAGS_EXTENDED_DWELL (1 << 10)
-/* Extended dwell is obselete when adaptive dwell is used, making this
+/* Extended dwell is obsolete when adaptive dwell is used, making this
* bit reusable. Hence, probe request defer is used only when adaptive
* dwell is supported. */
#define IWX_UMAC_SCAN_GEN_FLAGS_PROB_REQ_DEFER_SUPP (1 << 10)
* @IWX_STA_KEY_FLG_EXT: extended cipher algorithm (depends on the FW support)
* @IWX_STA_KEY_FLG_CMAC: CMAC encryption algorithm
* @IWX_STA_KEY_FLG_ENC_UNKNOWN: unknown encryption algorithm
- * @IWX_STA_KEY_FLG_EN_MSK: mask for encryption algorithmi value
+ * @IWX_STA_KEY_FLG_EN_MSK: mask for encryption algorithm value
* @IWX_STA_KEY_FLG_WEP_KEY_MAP: wep is either a group key (0 - legacy WEP) or from
* station info array (1 - n 1X mode)
* @IWX_STA_KEY_FLG_KEYID_MSK: the index of the key
* mac-addr.
* @beamform_flags: beam forming controls
* @tfd_queue_msk: tfd queues used by this station.
- * Obselete for new TX API (9 and above).
+ * Obsolete for new TX API (9 and above).
* @rx_ba_window: aggregation window size
* @sp_length: the size of the SP in actual number of frames
* @uapsd_acs: 4 LS bits are trigger enabled ACs, 4 MS bits are the deliver
* and probe responses.
* @IWX_STA_MULTICAST: multicast traffic,
* @IWX_STA_TDLS_LINK: TDLS link station
- * @IWX_STA_AUX_ACTIVITY: auxilary station (scan, ROC and so on).
+ * @IWX_STA_AUX_ACTIVITY: auxiliary station (scan, ROC and so on).
*/
#define IWX_STA_LINK 0
#define IWX_STA_GENERAL_PURPOSE 1
-/* $OpenBSD: if_ix.h,v 1.43 2020/07/18 07:18:22 dlg Exp $ */
+/* $OpenBSD: if_ix.h,v 1.44 2022/01/09 05:42:52 jsg Exp $ */
/******************************************************************************
#define IXGBE_TX_TIMEOUT 5 /* set to 5 seconds */
/*
- * Thise parameter controls the minimum number of available transmit
+ * This parameter controls the minimum number of available transmit
* descriptors needed before we attempt transmission of a packet.
*/
#define IXGBE_TX_OP_THRESHOLD (sc->num_segs + 2)
***************************************************************************/
-/* $OpenBSD: if_ixgb.c,v 1.72 2020/07/10 13:26:38 patrick Exp $ */
+/* $OpenBSD: if_ixgb.c,v 1.73 2022/01/09 05:42:52 jsg Exp $ */
#include <dev/pci/if_ixgb.h>
i = (sc->num_rx_desc - 1);
/*
- * 82597EX: Workaround for redundent write back in receive descriptor ring (causes
+ * 82597EX: Workaround for redundant write back in receive descriptor ring (causes
* memory corruption). Avoid using and re-submitting the most recently received RX
* descriptor back to hardware.
*
-/* $OpenBSD: if_ixl.c,v 1.77 2021/11/27 16:25:40 deraadt Exp $ */
+/* $OpenBSD: if_ixl.c,v 1.78 2022/01/09 05:42:54 jsg Exp $ */
/*
* Copyright (c) 2013-2015, Intel Corporation
phy_types = 0;
goto done;
default:
- printf("%s: GET PHY ABILITIIES error %u\n", DEVNAME(sc), rv);
+ printf("%s: GET PHY ABILITIES error %u\n", DEVNAME(sc), rv);
goto err;
}
-/* $OpenBSD: if_jme.c,v 1.54 2020/07/10 13:26:38 patrick Exp $ */
+/* $OpenBSD: if_jme.c,v 1.55 2022/01/09 05:42:54 jsg Exp $ */
/*-
* Copyright (c) 2008, Pyun YongHyeon <yongari@FreeBSD.org>
* All rights reserved.
* off. If the renegotiation fail WOL may not work. Running
* at 1Gbps draws more power than 375mA at 3.3V which is
* specified in PCI specification and that would result in
- * complete shutdowning power to ethernet controller.
+ * a complete shutdown of power to the ethernet controller.
*
* TODO
* Save current negotiated media speed/duplex/flow-control
-/* $OpenBSD: if_jmereg.h,v 1.4 2008/12/01 09:12:59 jsg Exp $ */
+/* $OpenBSD: if_jmereg.h,v 1.5 2022/01/09 05:42:54 jsg Exp $ */
/*-
* Copyright (c) 2008, Pyun YongHyeon <yongari@FreeBSD.org>
* All rights reserved.
/* PCIe link error/status. */
#define JME_PCI_LES 0xD8
-/* propeietary register 0. */
+/* proprietary register 0. */
#define JME_PCI_PE0 0xE0
#define PE0_SPI_EXIST 0x00200000
#define PE0_PME_D0 0x00100000
* Misc registers 128 bytes BAR2 + 0x80 ~ BAR0 + 0x800 ~
* BAR2 + 0x7F BAR0 + 0x87F
* -----------------------------------------------------------------------
- * To simplify register access fuctions and to get better performance
+ * To simplify register access functions and to get better performance
* this driver doesn't support IO space access. It could be implemented
* as a function which selects appropriate BARs to access requested
* register.
#define TIMER_CNT_SHIFT 0
#define TIMER_UNIT 1024 /* 1024us */
-/* Aggresive power mode control. */
+/* Aggressive power mode control. */
#define JME_APMC 0x087C
#define APMC_PCIE_SDOWN_STAT 0x80000000
#define APMC_PCIE_SDOWN_ENB 0x40000000
#define APMC_DIS_CLKPM 0x00000002
#define APMC_DIS_CLKTX 0x00000001
-/* Packet completion coalesing status of Rx queue 0, 1, 2 and 3. */
+/* Packet completion coalescing status of Rx queue 0, 1, 2 and 3. */
#define JME_PCCSRX_BASE 0x0880
#define JME_PCCSRX_END 0x088F
#define PCCSRX_REG(x) (JME_PCCSRX_BASE + ((x) * 4))
#define PCCSRX_PKT_CNT_MASK 0x0000FF00
#define PCCSRX_PKT_CNT_SHIFT 8
-/* Packet completion coalesing status of Tx queue. */
+/* Packet completion coalescing status of Tx queue. */
#define JME_PCCSTX 0x0890
#define PCCSTX_TO_MASK 0xFFFF0000
#define PCCSTX_TO_SHIFT 16
-/* $OpenBSD: if_lge.c,v 1.76 2020/12/12 11:48:53 jan Exp $ */
+/* $OpenBSD: if_lge.c,v 1.77 2022/01/09 05:42:54 jsg Exp $ */
/*
* Copyright (c) 2001 Wind River Systems
* Copyright (c) 1997, 1998, 1999, 2000, 2001
/*
* Enable the delivery of PHY interrupts based on
- * link/speed/duplex status chalges.
+ * link/speed/duplex status changes.
*/
CSR_WRITE_4(sc, LGE_MODE1, LGE_MODE1_SETRST_CTL0|LGE_MODE1_GMIIPOLL);
-/* $OpenBSD: if_lii.c,v 1.44 2017/01/22 10:17:38 dlg Exp $ */
+/* $OpenBSD: if_lii.c,v 1.45 2022/01/09 05:42:54 jsg Exp $ */
/*
* Copyright (c) 2007 The NetBSD Foundation.
LII_WRITE_2(sc, LII_RXD_NUM_ENTRIES, AT_RXD_NUM);
/*
- * Inter Paket Gap Time = 0x60 (IPGT)
+ * Inter Packet Gap Time = 0x60 (IPGT)
* Minimum inter-frame gap for RX = 0x50 (MIFG)
* 64-bit Carrier-Sense window = 0x40 (IPGR1)
* 96-bit IPG window = 0x60 (IPGR2)
}
}
- /* Copy the packet withhout the FCS */
+ /* Copy the packet without the FCS */
m->m_pkthdr.len = m->m_len = size;
memcpy(mtod(m, void *), &rxp->rxp_data[0], size);
-/* $OpenBSD: if_mcx.c,v 1.102 2021/07/23 00:29:14 jmatthew Exp $ */
+/* $OpenBSD: if_mcx.c,v 1.103 2022/01/09 05:42:54 jsg Exp $ */
/*
* Copyright (c) 2017 David Gwynne <dlg@openbsd.org>
#define MCX_CMDQ_MAILBOX_SIZE roundup(sizeof(struct mcx_cmdq_mailbox), \
MCX_CMDQ_MAILBOX_ALIGN)
/*
- * command mailbox structres
+ * command mailbox structures
*/
struct mcx_cmd_enable_hca_in {
-/* $OpenBSD: if_msk.c,v 1.137 2022/01/05 03:53:26 dlg Exp $ */
+/* $OpenBSD: if_msk.c,v 1.138 2022/01/09 05:42:54 jsg Exp $ */
/*
* Copyright (c) 1997, 1998, 1999, 2000
SK_IF_WRITE_2(sc_if, 0, SK_RXMF1_CTRL_TEST, SK_RFCTL_OPERATION_ON |
SK_RFCTL_FIFO_FLUSH_ON);
- /* Increase flush threshould to 64 bytes */
+ /* Increase flush threshold to 64 bytes */
SK_IF_WRITE_2(sc_if, 0, SK_RXMF1_FLUSH_THRESHOLD,
SK_RFCTL_FIFO_THRESHOLD + 1);
-/* $OpenBSD: if_nxe.c,v 1.77 2020/07/10 13:26:38 patrick Exp $ */
+/* $OpenBSD: if_nxe.c,v 1.78 2022/01/09 05:42:54 jsg Exp $ */
/*
* Copyright (c) 2007 David Gwynne <dlg@openbsd.org>
* PCI Express Registers
*
* Despite being in the CRB window space, they can be accessed via both
- * windows. This means they are accessable "globally" without going relative
+ * windows. This means they are accessible "globally" without going relative
* to the start of the CRB window space.
*/
/*
* flash memory layout
*
- * These are offsets of memory accessable via the ROM Registers above
+ * These are offsets of memory accessible via the ROM Registers above
*/
#define NXE_FLASH_CRBINIT 0x00000000 /* crb init section */
#define NXE_FLASH_BRDCFG 0x00004000 /* board config */
-/* $OpenBSD: if_oce.c,v 1.104 2020/12/12 11:48:53 jan Exp $ */
+/* $OpenBSD: if_oce.c,v 1.105 2022/01/09 05:42:54 jsg Exp $ */
/*
* Copyright (c) 2012 Mike Belopuhov
/**
* @brief Firmware will send gracious notifications during
- * attach only after sending first mcc commnad. We
+ * attach only after sending first mcc command. We
* use MCC queue only for getting async and mailbox
* for sending cmds. So to get gracious notifications
- * atleast send one dummy command on mcc.
+ * at least send one dummy command on mcc.
*/
void
oce_first_mcc(struct oce_softc *sc)
-/* $OpenBSD: if_ocereg.h,v 1.7 2012/11/26 19:03:59 mikeb Exp $ */
+/* $OpenBSD: if_ocereg.h,v 1.8 2022/01/09 05:42:54 jsg Exp $ */
/*-
* Copyright (C) 2012 Emulex
} __packed;
/**
- * @brief MBX Common Quiery Firmaware Config
+ * @brief MBX Common Query Firmware Config
* This command retrieves firmware configuration parameters and adapter
* resources available to the driver originating the request. The firmware
* configuration defines supported protocols by the installed adapter firmware.
};
/**
- * @brief Function Capabilites
+ * @brief Function Capabilities
* This field contains the flags indicating the capabilities of
* the SLI Host’s PCI function.
*/
} __packed;
enum LOWLEVEL_SUBSYS_OPCODES {
-/* Opcodes used for lowlevel functions common to many subystems.
+/* Opcodes used for lowlevel functions common to many subsystems.
* Some of these opcodes are used for diagnostic functions only.
* These opcodes use the SUBSYS_LOWLEVEL subsystem code.
*/
};
enum LLDP_SUBSYS_OPCODES {
-/* Opcodes used for LLDP susbsytem for configuring the LLDP state machines. */
+/* Opcodes used for LLDP subsystem for configuring the LLDP state machines. */
OPCODE_LLDP_GET_CFG = 1,
OPCODE_LLDP_SET_CFG = 2,
OPCODE_LLDP_GET_STATS = 3
-/* $OpenBSD: if_pcn.c,v 1.44 2020/07/10 13:26:38 patrick Exp $ */
+/* $OpenBSD: if_pcn.c,v 1.45 2022/01/09 05:42:54 jsg Exp $ */
/* $NetBSD: if_pcn.c,v 1.26 2005/05/07 09:15:44 is Exp $ */
/*
/*
* Load the DMA map. If this fails, the packet either
- * didn't fit in the alloted number of segments, or we
+ * didn't fit in the allotted number of segments, or we
* were short on resources. In this case, we'll copy
* and try again.
*/
-/* $OpenBSD: if_se.c,v 1.22 2020/12/12 11:48:53 jan Exp $ */
+/* $OpenBSD: if_se.c,v 1.23 2022/01/09 05:42:54 jsg Exp $ */
/*-
* Copyright (c) 2009, 2010 Christopher Zimmermann <madroach@zakweb.de>
#endif
return;
}
- /* Reprogram MAC to resolved speed/duplex/flow-control paramters. */
+ /* Reprogram MAC to resolved speed/duplex/flow-control parameters. */
ctl = CSR_READ_4(sc, StationControl);
ctl &= ~(0x0f000000 | SC_FDX | SC_SPEED_MASK);
if (speed == SC_SPEED_1000)
-/* $OpenBSD: if_sis.c,v 1.139 2020/12/12 11:48:53 jan Exp $ */
+/* $OpenBSD: if_sis.c,v 1.140 2022/01/09 05:42:54 jsg Exp $ */
/*
* Copyright (c) 1997, 1998, 1999
* Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved.
* 128-bit multicast hash table. The SiS 900 has a built-in MII-based
* transceiver while the 7016 requires an external transceiver chip.
* Both chips offer the standard bit-bang MII interface as well as
- * an enchanced PHY interface which simplifies accessing MII registers.
+ * an enhanced PHY interface which simplifies accessing MII registers.
*
* The only downside to this chipset is that RX descriptors must be
* longword aligned.
-/* $OpenBSD: if_sk.c,v 1.192 2020/12/12 11:48:53 jan Exp $ */
+/* $OpenBSD: if_sk.c,v 1.193 2022/01/09 05:42:54 jsg Exp $ */
/*
* Copyright (c) 1997, 1998, 1999, 2000
SK_IF_WRITE_1(sc_if, 0, SK_RXMF1_CTRL_TEST, SK_RFCTL_RESET_CLEAR);
SK_IF_WRITE_2(sc_if, 0, SK_RXMF1_CTRL_TEST, v);
- /* Increase flush threshould to 64 bytes */
+ /* Increase flush threshold to 64 bytes */
SK_IF_WRITE_2(sc_if, 0, SK_RXMF1_FLUSH_THRESHOLD,
SK_RFCTL_FIFO_THRESHOLD + 1);
-/* $OpenBSD: if_skreg.h,v 1.62 2022/01/02 03:41:08 jsg Exp $ */
+/* $OpenBSD: if_skreg.h,v 1.63 2022/01/09 05:42:54 jsg Exp $ */
/*
* Copyright (c) 1997, 1998, 1999, 2000
* fiber-based cards or BCOM for 1000baseT cards with a Broadcom
* PHY.
*/
-#define SK_PHYTYPE_XMAC 0 /* integeated XMAC II PHY */
+#define SK_PHYTYPE_XMAC 0 /* integrated XMAC II PHY */
#define SK_PHYTYPE_BCOM 1 /* Broadcom BCM5400 */
#define SK_PHYTYPE_LONE 2 /* Level One LXT1000 */
#define SK_PHYTYPE_NAT 3 /* National DP83891 */
#define XM_PHY_BMSR 0x0001 /* status */
#define XM_PHY_VENID 0x0002 /* vendor id */
#define XM_PHY_DEVID 0x0003 /* device id */
-#define XM_PHY_ANAR 0x0004 /* autoneg advertisenemt */
+#define XM_PHY_ANAR 0x0004 /* autoneg advertisement */
#define XM_PHY_LPAR 0x0005 /* link partner ability */
#define XM_PHY_ANEXP 0x0006 /* autoneg expansion */
#define XM_PHY_NEXTP 0x0007 /* nextpage */
#define XM_PHY_LPNEXTP 0x0008 /* link partner's nextpage */
-#define XM_PHY_EXTSTS 0x000F /* extented status */
+#define XM_PHY_EXTSTS 0x000F /* extended status */
#define XM_PHY_RESAB 0x0010 /* resolved ability */
#define XM_BMCR_DUPLEX 0x0100
-/* $OpenBSD: if_stge.c,v 1.70 2020/07/10 13:26:38 patrick Exp $ */
+/* $OpenBSD: if_stge.c,v 1.71 2022/01/09 05:42:56 jsg Exp $ */
/* $NetBSD: if_stge.c,v 1.27 2005/05/16 21:35:32 bouyer Exp $ */
/*-
/*
* Load the DMA map. If this fails, the packet either
- * didn't fit in the alloted number of segments, or we
+ * didn't fit in the allotted number of segments, or we
* were short on resources. For the too-many-segments
* case, we simply report an error and drop the packet,
* since we can't sanely copy a jumbo packet to a single
CSR_WRITE_1(sc, STGE_RxDMABurstThresh, 0x30);
CSR_WRITE_1(sc, STGE_RxDMAUrgentThresh, 0x30);
- /* Rx early threhold, from Linux */
+ /* Rx early threshold, from Linux */
CSR_WRITE_2(sc, STGE_RxEarlyThresh, 0x7ff);
/* Tx DMA thresholds, from Linux */
-/* $OpenBSD: if_tht.c,v 1.143 2020/12/17 23:36:47 cheloha Exp $ */
+/* $OpenBSD: if_tht.c,v 1.144 2022/01/09 05:42:56 jsg Exp $ */
/*
* Copyright (c) 2007 David Gwynne <dlg@openbsd.org>
} __packed;
#define THT_RXD_TYPE 2
-/* rx decriptor type 3: data chain instruction */
+/* rx descriptor type 3: data chain instruction */
struct tht_rx_desc_dc {
/* preceded by tht_rx_desc */
-/* $OpenBSD: if_ti_pci.c,v 1.5 2015/11/24 17:11:39 mpi Exp $ */
+/* $OpenBSD: if_ti_pci.c,v 1.6 2022/01/09 05:42:56 jsg Exp $ */
/*
* Copyright (c) 1997, 1998, 1999
*
* The Tigon 2 contains 2 R4000 CPUs and requires a newer firmware
* revision, which supports new features such as extended commands,
- * extended jumbo receive ring desciptors and a mini receive ring.
+ * extended jumbo receive ring descriptors and a mini receive ring.
*
* Alteon Networks is to be commended for releasing such a vast amount
* of development material for the Tigon NIC without requiring an NDA
-/* $OpenBSD: if_tl.c,v 1.74 2020/07/10 13:26:38 patrick Exp $ */
+/* $OpenBSD: if_tl.c,v 1.75 2022/01/09 05:42:56 jsg Exp $ */
/*
* Copyright (c) 1997, 1998
* When a frame is received, the chip will DMA it into the memory regions
* specified by the fragment descriptors and then trigger an RX 'end of
* frame interrupt' when done. The driver may choose to use only one
- * fragment per list; this may result is slighltly less efficient use
+ * fragment per list; this may result in slightly less efficient use
* of memory in exchange for improving performance.
*
* To transmit frames, the driver again sets up lists and fragment
-/* $OpenBSD: if_vge.c,v 1.74 2020/07/10 13:26:38 patrick Exp $ */
+/* $OpenBSD: if_vge.c,v 1.75 2022/01/09 05:42:56 jsg Exp $ */
/* $FreeBSD: if_vge.c,v 1.3 2004/09/11 22:13:25 wpaul Exp $ */
/*
* Copyright (c) 2004
/*
* Configure one-shot timer for microsecond
- * resulution and load it for 500 usecs.
+ * resolution and load it for 500 usecs.
*/
CSR_SETBIT_1(sc, VGE_DIAGCTL, VGE_DIAGCTL_TIMER0_RES);
CSR_WRITE_2(sc, VGE_SSTIMER, 400);
-/* $OpenBSD: if_vgereg.h,v 1.2 2007/11/26 09:28:33 martynas Exp $ */
+/* $OpenBSD: if_vgereg.h,v 1.3 2022/01/09 05:42:56 jsg Exp $ */
/* $FreeBSD: if_vgereg.h,v 1.1 2004/09/10 20:57:45 wpaul Exp $ */
/*
* Copyright (c) 2004
#define VGE_MIICMD_MOUT 0x08 /* data out pin enable */
#define VGE_MIICMD_MDP 0x10 /* enable direct programming mode */
#define VGE_MIICMD_WCMD 0x20 /* embedded mode write */
-#define VGE_MIICMD_RCMD 0x40 /* embadded mode read */
+#define VGE_MIICMD_RCMD 0x40 /* embedded mode read */
#define VGE_MIICMD_MAUTO 0x80 /* enable autopolling */
/* MII address register */
-/* $OpenBSD: if_vic.c,v 1.102 2020/12/12 11:48:53 jan Exp $ */
+/* $OpenBSD: if_vic.c,v 1.103 2022/01/09 05:42:56 jsg Exp $ */
/*
* Copyright (c) 2006 Reyk Floeter <reyk@openbsd.org>
#define VIC_CMD_MCASTFIL 0x0002 /* Multicast address filter */
#define VIC_CMD_MCASTFIL_LENGTH 2
#define VIC_CMD_IFF 0x0004 /* Interface flags */
-#define VIC_CMD_IFF_PROMISC 0x0001 /* Promiscous enabled */
+#define VIC_CMD_IFF_PROMISC 0x0001 /* Promiscuous enabled */
#define VIC_CMD_IFF_BROADCAST 0x0002 /* Broadcast enabled */
#define VIC_CMD_IFF_MULTICAST 0x0004 /* Multicast enabled */
#define VIC_CMD_INTR_DISABLE 0x0020 /* Disable interrupts */
if ((r & VIC_MORPH_MASK) == VIC_MORPH_VMXNET)
break;
if ((r & VIC_MORPH_MASK) != VIC_MORPH_LANCE) {
- printf(": unexpect morph value (0x%08x)\n", r);
+ printf(": unexpected morph value (0x%08x)\n", r);
goto unmap;
}
-/* $OpenBSD: if_vmx.c,v 1.67 2021/08/09 18:13:09 jan Exp $ */
+/* $OpenBSD: if_vmx.c,v 1.68 2022/01/09 05:42:56 jsg Exp $ */
/*
* Copyright (c) 2013 Tsubai Masanari
ver = READ_BAR1(sc, VMXNET3_BAR1_UVRS);
if ((ver & 0x1) == 0) {
- printf(": incompatiable UPT version 0x%x\n", ver);
+ printf(": incompatible UPT version 0x%x\n", ver);
return;
}
WRITE_BAR1(sc, VMXNET3_BAR1_UVRS, 1);
-/* $OpenBSD: if_vr.c,v 1.157 2020/12/12 11:48:53 jan Exp $ */
+/* $OpenBSD: if_vr.c,v 1.158 2022/01/09 05:42:56 jsg Exp $ */
/*
* Copyright (c) 1997, 1998
/*
* We only want TX completion interrupts on every Nth packet.
* We need to set VR_TXNEXT_INTDISABLE on every descriptor except
- * for the last discriptor of every Nth packet, where we set
+ * for the last descriptor of every Nth packet, where we set
* VR_TXCTL_FINT. The former is in the specs for only some chips.
* present: VT6102 VT6105M VT8235M
* not present: VT86C100 6105LOM
-/* $OpenBSD: if_wi_pci.c,v 1.54 2019/12/31 10:05:32 mpi Exp $ */
+/* $OpenBSD: if_wi_pci.c,v 1.55 2022/01/09 05:42:56 jsg Exp $ */
/*
* Copyright (c) 2001-2003 Todd C. Miller <millert@openbsd.org>
* doesn't really help much since we don't know how it is programmed.
* Details for this attachment were gleaned from a version of the
* Linux orinoco driver modified by Tobias Hoffmann based on
- * what he discoverd from the Windows driver.
+ * what he discovered from the Windows driver.
*/
int
wi_pci_acex_attach(struct pci_attach_args *pa, struct wi_softc *sc)
-/* $OpenBSD: if_xge.c,v 1.80 2020/12/12 11:48:53 jan Exp $ */
+/* $OpenBSD: if_xge.c,v 1.81 2022/01/09 05:42:56 jsg Exp $ */
/* $NetBSD: if_xge.c,v 1.1 2005/09/09 10:30:27 ragge Exp $ */
/*
/*
* Constants to be programmed into Hercules's registers, to configure
- * the XGXS transciever.
+ * the XGXS transceiver.
*/
static const uint64_t xge_herc_dtx_cfg[] = {
0x8000051536750000ULL, 0x80000515367500E0ULL,
*******************************************************************************/
-/* $OpenBSD: ixgb_ee.c,v 1.7 2015/11/24 17:11:40 mpi Exp $ */
+/* $OpenBSD: ixgb_ee.c,v 1.8 2022/01/09 05:42:56 jsg Exp $ */
#include <sys/param.h>
#include <sys/systm.h>
* execute the command in question. */
ixgb_standby_eeprom(hw);
- /* Now read DO repeatedly until is high (equal to '1'). The EEEPROM
+ /* Now read DO repeatedly until is high (equal to '1'). The EEPROM
* will signal that the command has been completed by raising the DO
* signal. If DO does not go high in 10 milliseconds, then error out. */
for(i = 0; i < 200; i++) {
*
* hw - Struct containing variables accessed by shared code
* reg - offset within the EEPROM to be written to
- * data - 16 bit word to be writen to the EEPROM
+ * data - 16 bit word to be written to the EEPROM
*
* If ixgb_update_eeprom_checksum is not called after this function, the
* EEPROM will most likely contain an invalid checksum.
*******************************************************************************/
-/* $OpenBSD: ixgb_hw.c,v 1.8 2015/11/24 17:11:40 mpi Exp $ */
+/* $OpenBSD: ixgb_hw.c,v 1.9 2022/01/09 05:42:56 jsg Exp $ */
/* ixgb_hw.c
* Shared functions for accessing and configuring the adapter
* hw - Struct containing variables accessed by shared code
*
* Places the MAC address in receive address register 0 and clears the rest
- * of the receive addresss registers. Clears the multicast table. Assumes
+ * of the receive address registers. Clears the multicast table. Assumes
* the receiver is in reset when the routine is called.
*****************************************************************************/
void
}
/******************************************************************************
- * Check for a bad link condition that may have occured.
+ * Check for a bad link condition that may have occurred.
* The indication is that the RFC / LFC registers may be incrementing
* continually. A full adapter reset is required to recover.
*
-/* $OpenBSD: ixgbe_82598.c,v 1.18 2020/03/02 01:59:01 jmatthew Exp $ */
+/* $OpenBSD: ixgbe_82598.c,v 1.19 2022/01/09 05:42:56 jsg Exp $ */
/******************************************************************************
SPDX-License-Identifier: BSD-3-Clause
goto out;
/*
- * if capababilities version is type 1 we can write the
+ * if capabilities version is type 1 we can write the
* timeout of 10ms to 250ms through the GCR register
*/
if (!(gcr & IXGBE_GCR_CAP_VER2)) {
/*
* Store the original AUTOC value if it has not been
* stored off yet. Otherwise restore the stored original
- * AUTOC value since the reset operation sets back to deaults.
+ * AUTOC value since the reset operation sets back to defaults.
*/
autoc = IXGBE_READ_REG(hw, IXGBE_AUTOC);
if (hw->mac.orig_link_settings_stored == FALSE) {
-/* $OpenBSD: ixgbe_phy.c,v 1.22 2020/03/02 01:59:01 jmatthew Exp $ */
+/* $OpenBSD: ixgbe_phy.c,v 1.23 2022/01/09 05:42:56 jsg Exp $ */
/******************************************************************************
SPDX-License-Identifier: BSD-3-Clause
}
/*
- * the 82598EB SFP+ card offically supports only direct attached cables
+ * the 82598EB SFP+ card officially supports only direct attached cables
* but works fine with optical SFP+ modules as well. Even though the
* EEPROM has no matching ID for them. So just accept the module.
*/
-/* $OpenBSD: ixgbe_type.h,v 1.35 2020/03/02 01:59:01 jmatthew Exp $ */
+/* $OpenBSD: ixgbe_type.h,v 1.36 2022/01/09 05:42:56 jsg Exp $ */
/******************************************************************************
SPDX-License-Identifier: BSD-3-Clause
#define IXGBE_CTRL_RST_MASK (IXGBE_CTRL_LNK_RST | IXGBE_CTRL_RST)
/* FACTPS */
-#define IXGBE_FACTPS_MNGCG 0x20000000 /* Manageblility Clock Gated */
+#define IXGBE_FACTPS_MNGCG 0x20000000 /* Manageability Clock Gated */
#define IXGBE_FACTPS_LFS 0x40000000 /* LAN Function Select */
/* MHADD Bit Masks */
/* EEPROM Addressing bits based on type (0-small, 1-large) */
#define IXGBE_EEC_ADDR_SIZE 0x00000400
#define IXGBE_EEC_SIZE 0x00007800 /* EEPROM Size */
-#define IXGBE_EERD_MAX_ADDR 0x00003FFF /* EERD alows 14 bits for addr. */
+#define IXGBE_EERD_MAX_ADDR 0x00003FFF /* EERD allows 14 bits for addr. */
#define IXGBE_EEC_SIZE_SHIFT 11
#define IXGBE_EEPROM_WORD_SIZE_SHIFT 6
#define IXGBE_FDIR_DROP_QUEUE 127
-/* Manageablility Host Interface defines */
+/* Manageability Host Interface defines */
#define IXGBE_HI_MAX_BLOCK_BYTE_LENGTH 1792 /* Num of bytes in range */
#define IXGBE_HI_MAX_BLOCK_DWORD_LENGTH 448 /* Num of dwords in range */
#define IXGBE_HI_COMMAND_TIMEOUT 500 /* Process HI command limit */
-/* $OpenBSD: ixgbe_x540.c,v 1.12 2020/03/02 01:59:01 jmatthew Exp $ */
+/* $OpenBSD: ixgbe_x540.c,v 1.13 2022/01/09 05:42:56 jsg Exp $ */
/******************************************************************************
SPDX-License-Identifier: BSD-3-Clause
* bits in the SW_FW_SYNC register.
*/
if (ixgbe_get_swfw_sync_semaphore(hw)) {
- DEBUGOUT("Failed to get NVM sempahore and register semaphore while forcefully ignoring FW sempahore bit(s) and setting SW semaphore bit(s), returning IXGBE_ERR_SWFW_SYNC\n");
+ DEBUGOUT("Failed to get NVM semaphore and register semaphore while forcefully ignoring FW semaphore bit(s) and setting SW semaphore bit(s), returning IXGBE_ERR_SWFW_SYNC\n");
return IXGBE_ERR_SWFW_SYNC;
}
swfw_sync = IXGBE_READ_REG(hw, IXGBE_SWFW_SYNC_BY_MAC(hw));
-/* $OpenBSD: ixgbe_x550.c,v 1.7 2020/03/02 01:59:01 jmatthew Exp $ */
+/* $OpenBSD: ixgbe_x550.c,v 1.8 2022/01/09 05:42:56 jsg Exp $ */
/******************************************************************************
}
/**
- * ixgbe_set_source_address_pruning_X550 - Enable/Disbale source address pruning
+ * ixgbe_set_source_address_pruning_X550 - Enable/Disable source address pruning
* @hw: pointer to hardware structure
* @enable: enable or disable source address pruning
* @pool: Rx pool to set source address pruning for
* @speed: new link speed
* @autoneg_wait_to_complete: unused
*
- * Configure the the integrated PHY for SFP support.
+ * Configure the integrated PHY for SFP support.
**/
int32_t ixgbe_setup_mac_link_sfp_x550a(struct ixgbe_hw *hw,
ixgbe_link_speed speed,
break;
/*
- * Probably failed to alloc contigious memory. Try reducing the
+ * Probably failed to alloc contiguous memory. Try reducing the
* aperture so that the gatt size reduces.
*/
msc->msc_apsize /= 2;
-/* $OpenBSD: mpii.c,v 1.140 2020/09/22 19:32:53 krw Exp $ */
+/* $OpenBSD: mpii.c,v 1.141 2022/01/09 05:42:56 jsg Exp $ */
/*
* Copyright (c) 2010, 2012 Mike Belopuhov
* Copyright (c) 2009 James Giannoules
/*
* diskid comparison is based on the idea that all
* disks are counted by the bio(4) in sequence, thus
- * substracting the number of disks in the volume
+ * subtracting the number of disks in the volume
* from the diskid yields us a "relative" hotspare
* number, which is good enough for us.
*/
-/* $OpenBSD: neo.c,v 1.33 2018/04/11 04:48:31 ratchov Exp $ */
+/* $OpenBSD: neo.c,v 1.34 2022/01/09 05:42:58 jsg Exp $ */
/*
* Copyright (c) 1999 Cameron Grant <gandalf@vilnya.demon.co.uk>
* are generated more often than that, so 20-40 interrupts per second
* should not be unexpected. Increasing BUFFSIZE should help minimize
* the glitches due to drivers that spend too much time looping at high
- * privelege levels as well as the impact of badly written audio
+ * privilege levels as well as the impact of badly written audio
* interface clients.
*
* TO-DO list:
-/* $OpenBSD: pciide.c,v 1.361 2020/07/24 12:43:31 krw Exp $ */
+/* $OpenBSD: pciide.c,v 1.362 2022/01/09 05:42:58 jsg Exp $ */
/* $NetBSD: pciide.c,v 1.127 2001/08/03 01:31:08 tsutsui Exp $ */
/*
u_int8_t drive = drvp->drive;
/*
- * If drive is using UDMA, timings setups are independant
- * So just check DMA and PIO here.
+ * If drive is using UDMA, timing setup is independent
+ * so just check DMA and PIO here.
*/
if (drvp->drive_flags & DRIVE_DMA) {
/* if mode = DMA mode 0, use compatible timings */
cp->wdc_channel.wdc = &sc->sc_wdcdev;
/*
- * Older CMD64X doesn't have independant channels
+ * Older CMD64X doesn't have independent channels
*/
switch (sc->sc_pp->ide_product) {
case PCI_PRODUCT_CMDTECH_649:
~(HPT370_CTRL2_FASTIRQ | HPT370_CTRL2_HIRQ));
/*
- * HPT370 and highter has a bit to disable interrupts,
+ * HPT370 and higher has a bit to disable interrupts,
* make sure to clear it
*/
pciide_pci_write(sc->sc_pc, sc->sc_tag, HPT_CSEL,
/*
* Subregion de busmaster registers. They're spread all over
* the controller's register space :(. They are also 4 bytes
- * sized, with some specific extentions in the extra bits.
+ * sized, with some specific extensions in the extra bits.
* It also seems that the IDEDMA_CTL register isn't available.
*/
if (bus_space_subregion(ps->ba5_st, ps->ba5_sh,
-/* $OpenBSD: pciide_cy693_reg.h,v 1.8 2010/07/23 07:47:13 jsg Exp $ */
+/* $OpenBSD: pciide_cy693_reg.h,v 1.9 2022/01/09 05:42:58 jsg Exp $ */
/* $NetBSD: pciide_cy693_reg.h,v 1.4 2000/05/15 08:46:01 bouyer Exp $ */
/*
* Registers definitions for Contaq/Cypress's CY82693U PCI IDE controller.
* Available from http://www.cypress.com/japan/prodgate/chip/cy82c693.html
* This chip has 2 PCI IDE functions, each of them has only one channel
- * So there's no primary/secodary distinction in the registers defs.
+ * So there's no primary/secondary distinction in the registers defs.
*/
/* IDE control register */
-/* $OpenBSD: pciide_natsemi_reg.h,v 1.7 2007/06/24 12:41:19 kettenis Exp $ */
+/* $OpenBSD: pciide_natsemi_reg.h,v 1.8 2022/01/09 05:42:58 jsg Exp $ */
/*
* Copyright (c) 2001 Jason L. Wright (jason@thought.net)
/* Format 1 */
{ 0x9172d132, 0x21717121, 0x00803020, 0x20102010, 0x00100010 }};
const static u_int32_t scx200_pio66[2][5] = {
- /* Fromat 0 */
+ /* Format 0 */
{ 0x0000f8e4, 0x000153f3, 0x000213f1, 0x00034231, 0x00041131 },
/* Format 1 */
{ 0xf8e4f8e4, 0x53f3f353, 0x13f18141, 0x42314231, 0x11311131 }};
-/* $OpenBSD: pciide_pdc202xx_reg.h,v 1.15 2010/07/23 07:47:13 jsg Exp $ */
+/* $OpenBSD: pciide_pdc202xx_reg.h,v 1.16 2022/01/09 05:42:58 jsg Exp $ */
/* $NetBSD: pciide_pdc202xx_reg.h,v 1.5 2001/07/05 08:38:27 toshii Exp $ */
/*
/*
* Registers definitions for PROMISE PDC20246/PDC20262 PCI IDE controller.
- * Unfortunably the HW docs are not publically available. I've been able
+ * Unfortunately the HW docs are not publicly available. I've been able
* to get a partial one for the PDC20246, and a better one for the PDC20262
* from Promise.
*/
/*
* The timings provided here cmoes from the PDC20262 docs. I hope they are
- * rigth for the PDC20246 too ...
+ * right for the PDC20246 too ...
*/
static int8_t pdc2xx_pa[] = {0x9, 0x5, 0x3, 0x2, 0x1};
-/* $OpenBSD: pciide_piix_reg.h,v 1.12 2010/07/23 07:47:13 jsg Exp $ */
+/* $OpenBSD: pciide_piix_reg.h,v 1.13 2022/01/09 05:42:58 jsg Exp $ */
/* $NetBSD: pciide_piix_reg.h,v 1.5 2001/01/05 15:29:40 bouyer Exp $ */
/*
#define PIIX_CONFIG_UDMA100(channel, drive) (0x1000 << ((channel) * 2 + (drive)))
/*
- * these tables define the differents values to upload to the
+ * these tables define the different values to upload to the
* ISP and RTC registers for the various PIO and DMA mode
* (from the PIIX4 doc).
*/
-/* $OpenBSD: pcscpreg.h,v 1.3 2008/06/26 05:42:17 ray Exp $ */
+/* $OpenBSD: pcscpreg.h,v 1.4 2022/01/09 05:42:58 jsg Exp $ */
/* $NetBSD$ */
/*-
#define DMASTAT_ERR 0x00000002 /* DMA Transfer Error */
#define DMASTAT_PWDN 0x00000001 /* Power Down Indicator */
-#define DMA_SMDLA 0x58 /* Starting Memory Descpritor List Address */
+#define DMA_SMDLA 0x58 /* Starting Memory Descriptor List Address */
#define DMA_WMAC 0x5C /* Working MDL Counter */
#define DMA_SBAC 0x70 /* SCSI Bus and Control */
-/* $OpenBSD: pucdata.c,v 1.115 2021/10/30 03:27:35 jsg Exp $ */
+/* $OpenBSD: pucdata.c,v 1.116 2022/01/09 05:42:58 jsg Exp $ */
/* $NetBSD: pucdata.c,v 1.6 1999/07/03 05:55:23 cgd Exp $ */
/*
/*
* VScom PCI 100H, little sister of 800H, 1 com.
* also com part of VScom 110H
- * The one I have defaults to a fequency of 14.7456 MHz which is
+ * The one I have defaults to a frequency of 14.7456 MHz which is
* jumper J1 set to 2-3.
*/
{ /* "VScom PCI-100H", */
/*
* VScom PCI 200H, little sister of 800H, 2 com.
* also com part of VScom 210H
- * The one I have defaults to a fequency of 14.7456 MHz which is
+ * The one I have defaults to a frequency of 14.7456 MHz which is
* jumper J1 set to 2-3.
*/
* that offers 4 com port on PCI device 0 (both 400H and 800H)
* and 4 on PCI device 1 (800H only). PCI device 0 has
* device ID 3 and PCI device 1 device ID 4. Uses a 14.7456 MHz crystal
- * instead of the standart 1.8432MHz.
+ * instead of the standard 1.8432MHz.
* There's a version with a jumper for selecting the crystal frequency,
* defaults to 8x as used here. The jumperless version uses 8x, too.
*/
/*
* VScom PCI 100L
* one com
- * The one I have defaults to a fequency of 14.7456 MHz which is
+ * The one I have defaults to a frequency of 14.7456 MHz which is
* jumper J1 set to 2-3.
*/
{ /* "VScom PCI-100L", */
-/* $OpenBSD: sv.c,v 1.35 2019/05/13 21:29:28 mpi Exp $ */
+/* $OpenBSD: sv.c,v 1.36 2022/01/09 05:42:58 jsg Exp $ */
/*
* Copyright (c) 1998 Constantine Paul Sapuntzakis
{
/* The ADC reference frequency (f_out) is 512 * the sample rate */
- /* f_out is dervied from the 24.576MHZ crystal by three values:
+ /* f_out is derived from the 24.576MHZ crystal by three values:
M & N & R. The equation is as follows:
f_out = (m + 2) * f_ref / ((n + 2) * (2 ^ a))
with the constraint that:
- 80 MhZ < (m + 2) / (n + 2) * f_ref <= 150MHz
+ 80 MHz < (m + 2) / (n + 2) * f_ref <= 150MHz
and n, m >= 1
*/
-/* $OpenBSD: tga.c,v 1.40 2020/05/25 09:55:48 jsg Exp $ */
+/* $OpenBSD: tga.c,v 1.41 2022/01/09 05:42:58 jsg Exp $ */
/* $NetBSD: tga.c,v 1.40 2002/03/13 15:05:18 ad Exp $ */
/*
*rp = 0xffffffff;
}
- /* Set grapics mode back to normal. */
+ /* Set graphics mode back to normal. */
TGAWREG(dc, TGA_REG_GMOR, 0);
TGAWREG(dc, TGA_REG_GPXR_P, 0xffffffff);
rp = (int32_t *)((caddr_t)rp + ri->ri_stride);
}
- /* Set grapics mode back to normal. */
+ /* Set graphics mode back to normal. */
TGAWREG(dc, TGA_REG_GMOR, 0);
return 0;
rp = (int32_t *)((caddr_t)rp + ri->ri_stride);
}
- /* Set grapics mode back to normal. */
+ /* Set graphics mode back to normal. */
TGAWREG(dc, TGA_REG_GMOR, 0);
return 0;
/*
* Strobe CE# (high->low->high) since status and data are latched on
- * the falling and rising edges (repsectively) of this active-low signal.
+ * the falling and rising edges (respectively) of this active-low signal.
*/
TGAREGWB(dc, TGA_REG_EPSR, 1);
-/* $OpenBSD: tgareg.h,v 1.4 2001/03/18 04:37:21 nate Exp $ */
+/* $OpenBSD: tgareg.h,v 1.5 2022/01/09 05:42:58 jsg Exp $ */
/* $NetBSD: tgareg.h,v 1.3 2000/03/04 10:28:00 elric Exp $ */
/*
#define TGA_REG_GGVR 0x02d /* Green Value */
#define TGA_REG_GBVR 0x02e /* Blue Value */
#define TGA_REG_GSWR 0x02f /* Span Width */
-#define TGA_REG_EPSR 0x030 /* Pallete and DAC Setup */
+#define TGA_REG_EPSR 0x030 /* Palette and DAC Setup */
/* reserved 0x031 - 0x3f */
/* reserved 0x07b */
-#define TGA_REG_EPDR 0x07c /* Pallete and DAC Data */
+#define TGA_REG_EPDR 0x07c /* Palette and DAC Data */
/* reserved 0x07d */
-/* $OpenBSD: vga_pci.c,v 1.88 2019/10/13 10:56:31 kettenis Exp $ */
+/* $OpenBSD: vga_pci.c,v 1.89 2022/01/09 05:42:58 jsg Exp $ */
/* $NetBSD: vga_pci.c,v 1.3 1998/06/08 06:55:58 thorpej Exp $ */
/*
#if !defined(SMALL_KERNEL) && NACPI > 0
/*
* Save the common vga state. This should theoretically only
- * be necessary if we intend to POST, but it is preferrable
- * to do it unconditionnaly, as many systems do not restore
+ * be necessary if we intend to POST, but it is preferable
+ * to do it unconditionally, as many systems do not restore
* this state correctly upon resume.
*/
vga_save_state(sc);
-/* $OpenBSD: yds.c,v 1.55 2020/03/27 15:24:59 krw Exp $ */
+/* $OpenBSD: yds.c,v 1.56 2022/01/09 05:42:58 jsg Exp $ */
/* $NetBSD: yds.c,v 1.5 2001/05/21 23:55:04 minoura Exp $ */
/*
YWRITEREGION4(sc, YDS_CTRL_INSTRAM, p, size);
yds_enable_dsp(sc);
- delay(10*1000); /* neccesary on my 724F (??) */
+ delay(10*1000); /* necessary on my 724F (??) */
free(buf, M_DEVBUF, buflen);
return 0;
}
/*
- * XXX: Must handle the secondary differntly!!
+ * XXX: Must handle the secondary differently!!
*/
void
yds_reset_codec(void *sc_)
-/* $OpenBSD: pckbd.c,v 1.45 2018/05/22 10:53:47 mpi Exp $ */
+/* $OpenBSD: pckbd.c,v 1.46 2022/01/09 05:42:58 jsg Exp $ */
/* $NetBSD: pckbd.c,v 1.24 2000/06/05 22:20:57 sommerfeld Exp $ */
/*-
};
/*
- * Hackish support for a bell on the PC Keyboard; when a suitable feeper
+ * Hackish support for a bell on the PC Keyboard; when a suitable beeper
* is found, it attaches itself into the pckbd driver here.
*/
void (*pckbd_bell_fn)(void *, u_int, u_int, u_int, int);
-/* $OpenBSD: if_malo.c,v 1.96 2020/07/10 13:22:21 patrick Exp $ */
+/* $OpenBSD: if_malo.c,v 1.97 2022/01/09 05:42:58 jsg Exp $ */
/*
* Copyright (c) 2007 Marcus Glocker <mglocker@openbsd.org>
/* free firmware */
cmalo_fw_free(sc);
- /* detach inferface */
+ /* detach interface */
ieee80211_ifdetach(ifp);
if_detach(ifp);
}
if (cmalo_cmd_request(sc, psize, 0) != 0)
return (EIO);
- /* process command repsonse */
+ /* process command response */
cmalo_cmd_response(sc);
return (0);
if (cmalo_cmd_request(sc, psize, 0) != 0)
return (EIO);
- /* process command repsonse */
+ /* process command response */
cmalo_cmd_response(sc);
return (0);
if (cmalo_cmd_request(sc, psize, 0) != 0)
return (EIO);
- /* process command repsonse */
+ /* process command response */
cmalo_cmd_response(sc);
return (0);
if (cmalo_cmd_request(sc, psize, 0) != 0)
return (EIO);
- /* process command repsonse */
+ /* process command response */
cmalo_cmd_response(sc);
return (0);
if (cmalo_cmd_request(sc, psize, 0) != 0)
return (EIO);
- /* process command repsonse */
+ /* process command response */
cmalo_cmd_response(sc);
return (0);
if (cmalo_cmd_request(sc, psize, 0) != 0)
return (EIO);
- /* process command repsonse */
+ /* process command response */
cmalo_cmd_response(sc);
return (0);
if (cmalo_cmd_request(sc, psize, 0) != 0)
return (EIO);
- /* process command repsonse */
+ /* process command response */
cmalo_cmd_response(sc);
return (0);
if (cmalo_cmd_request(sc, psize, 0) != 0)
return (EIO);
- /* process command repsonse */
+ /* process command response */
cmalo_cmd_response(sc);
return (0);
if (cmalo_cmd_request(sc, psize, 0) != 0)
return (EIO);
- /* process command repsonse */
+ /* process command response */
cmalo_cmd_response(sc);
return (0);
if (cmalo_cmd_request(sc, psize, 0) != 0)
return (EIO);
- /* process command repsonse */
+ /* process command response */
cmalo_cmd_response(sc);
return (0);
if (cmalo_cmd_request(sc, psize, 0) != 0)
return (EIO);
- /* process command repsonse */
+ /* process command response */
cmalo_cmd_response(sc);
return (0);
if (cmalo_cmd_request(sc, psize, 0) != 0)
return (EIO);
- /* process command repsonse */
+ /* process command response */
cmalo_cmd_response(sc);
return (0);
if (cmalo_cmd_request(sc, psize, 0) != 0)
return (EIO);
- /* process command repsonse */
+ /* process command response */
cmalo_cmd_response(sc);
return (0);
if (cmalo_cmd_request(sc, psize, 0) != 0)
return (EIO);
- /* process command repsonse */
+ /* process command response */
cmalo_cmd_response(sc);
return (0);
if (cmalo_cmd_request(sc, psize, 0) != 0)
return (EIO);
- /* process command repsonse */
+ /* process command response */
cmalo_cmd_response(sc);
return (0);
if (cmalo_cmd_request(sc, psize, 0) != 0)
return (EIO);
- /* process command repsonse */
+ /* process command response */
cmalo_cmd_response(sc);
return (0);
cmalo_hexdump(sc->sc_cmd, psize);
/*
- * We convert the header values into the machines correct endianess,
+ * We convert the header values into the machines correct endianness,
* so we don't have to letoh16() all over the code. The body is
* kept in the cards order, little endian. We need to take care
- * about the body endianess in the corresponding response routines.
+ * about the body endianness in the corresponding response routines.
*/
hdr->cmd = letoh16(hdr->cmd);
hdr->size = letoh16(hdr->size);
}
#ifdef HVS_DEBUG_IO
- DPRINTF("%s: rid %llu opertaion %u flags %#x status %#x\n",
+ DPRINTF("%s: rid %llu operation %u flags %#x status %#x\n",
sc->sc_dev.dv_xname, rid, cmd.cmd_op, cmd.cmd_flags,
cmd.cmd_status);
#endif
#define HVN_NVS_RNDIS_MTYPE_CTRL 1
/*
- * NVS message transacion status codes.
+ * NVS message transaction status codes.
*/
#define HVN_NVS_STATUS_OK 1
#define HVN_NVS_STATUS_FAILED 2
uint32_t nvs_status; /* HVN_NVS_STATUS_ */
} __packed;
-/* No reponse */
+/* No response */
struct hvn_nvs_ndis_conf {
uint32_t nvs_type; /* HVN_NVS_TYPE_NDIS_CONF */
uint32_t nvs_mtu;
-/* $OpenBSD: if_vio.c,v 1.20 2021/11/05 11:38:29 mpi Exp $ */
+/* $OpenBSD: if_vio.c,v 1.21 2022/01/09 05:42:58 jsg Exp $ */
/*
* Copyright (c) 2012 Stefan Fritsch, Alexander Fiveg.
}
/*
- * Recieve implementation
+ * Receive implementation
*/
/* allocate and initialize a mbuf for receive */
int
}
/*
- * Transmition implementation
+ * Transmission implementation
*/
/* actual transmission is done in if_start */
/* tx interrupt; dequeue and free mbufs */
-/* $OpenBSD: if_xnf.c,v 1.66 2021/07/26 11:06:36 jsg Exp $ */
+/* $OpenBSD: if_xnf.c,v 1.67 2022/01/09 05:42:58 jsg Exp $ */
/*
* Copyright (c) 2015, 2016 Mike Belopuhov
sc->sc_caps |= XNF_CAP_CSUM6;
#endif
- /* Query multicast traffic contol capability */
+ /* Query multicast traffic control capability */
prop = "feature-multicast-control";
if ((error = xs_getnum(sc->sc_parent, sc->sc_backend, prop, &res)) != 0
&& error != ENOENT)
-/* $OpenBSD: vioblk.c,v 1.33 2021/11/05 11:38:29 mpi Exp $ */
+/* $OpenBSD: vioblk.c,v 1.34 2022/01/09 05:42:58 jsg Exp $ */
/*
* Copyright (c) 2012 Stefan Fritsch.
* resources necessary to start an I/O on the device.
*
* Since the size of the I/O is unknown at this time the
- * resouces allocated (a.k.a. reserved) must be sufficient
+ * resources allocated (a.k.a. reserved) must be sufficient
* to allow the maximum possible I/O size.
*
* When the I/O is actually attempted via vioblk_scsi_cmd()
-/* $OpenBSD: vioscsi.c,v 1.28 2021/11/05 11:38:29 mpi Exp $ */
+/* $OpenBSD: vioscsi.c,v 1.29 2022/01/09 05:42:58 jsg Exp $ */
/*
* Copyright (c) 2013 Google Inc.
*
* resources necessary to start an I/O on the device.
*
* Since the size of the I/O is unknown at this time the
- * resouces allocated (a.k.a. reserved) must be sufficient
+ * resources allocated (a.k.a. reserved) must be sufficient
* to allow the maximum possible I/O size.
*
* When the I/O is actually attempted via vioscsi_scsi_cmd()
-/* $OpenBSD: virtio.c,v 1.20 2021/05/16 15:10:20 deraadt Exp $ */
+/* $OpenBSD: virtio.c,v 1.21 2022/01/09 05:42:58 jsg Exp $ */
/* $NetBSD: virtio.c,v 1.3 2011/11/02 23:05:52 njoly Exp $ */
/*
* virtio_reset(sc); // this will stop the device activity
* <dequeue finished requests>; // virtio_dequeue() still can be called
* <revoke pending requests in the vqs if any>;
- * virtio_reinit_start(sc); // dequeue prohibitted
+ * virtio_reinit_start(sc); // dequeue prohibited
* <some other initialization>;
* virtio_reinit_end(sc); // device activated; enqueue allowed
* Once attached, features are assumed to not change again.
* virtio_enqueue_reserve(sc, vq, slot, max_segs); // reserve all slots
* that may ever be needed
*
- * <when enqueing a request>
+ * <when enqueuing a request>
* // Don't call virtio_enqueue_prep()
* bus_dmamap_load(dmat, dmamap_payload[slot], data, count, ..);
* bus_dmamap_sync(dmat, dmamap_cmd[slot],... BUS_DMASYNC_PREWRITE);
/*
* Increase the event index in order to delay interrupts.
* Returns 0 on success; returns 1 if the used ring has already advanced
- * too far, and the caller must process the queue again (otherewise, no
+ * too far, and the caller must process the queue again (otherwise, no
* more interrupts will happen).
*/
int
* No way to disable the interrupt completely with
* RingEventIdx. Instead advance used_event by half
* the possible value. This won't happen soon and
- * is far enough in the past to not trigger a spurios
+ * is far enough in the past to not trigger a spurious
* interrupt.
*/
VQ_USED_EVENT(vq) = vq->vq_used_idx + 0x8000;
-/* $OpenBSD: vmt.c,v 1.24 2021/11/05 11:38:29 mpi Exp $ */
+/* $OpenBSD: vmt.c,v 1.25 2022/01/09 05:42:58 jsg Exp $ */
/*
* Copyright (c) 2007 David Crawshaw <david@zentus.com>
/* skip response that was tested in vm_rpci_response_successful() */
ptr = sc->sc_rpc_buf + 2;
- /* might truncat, copy anyway but return error */
+ /* might truncate, copy anyway but return error */
if (strlcpy(value, ptr, valuelen) >= valuelen)
error = ENOMEM;
-/* $OpenBSD: xenreg.h,v 1.10 2016/09/14 17:48:28 mikeb Exp $ */
+/* $OpenBSD: xenreg.h,v 1.11 2022/01/09 05:42:58 jsg Exp $ */
/*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of event that are delivered by this mechanism:
* 1. Bi-directional inter- and intra-domain connections. Domains
* must arrange out-of-band to set up a connection (usually by
- * allocating an unbound 'listener' port and avertising that via
+ * allocating an unbound 'listener' port and advertising that via
* a storage service such as xenstore).
* 2. Physical interrupts. A domain with suitable hardware-access
* privileges can bind an event-channel port to a physical
-/* $OpenBSD: xenstore.c,v 1.45 2020/01/11 21:30:00 cheloha Exp $ */
+/* $OpenBSD: xenstore.c,v 1.46 2022/01/09 05:42:58 jsg Exp $ */
/*
* Copyright (c) 2015 Mike Belopuhov
*
* The XenStore is ASCII string based, and has a structure and semantics
* similar to a filesystem. There are files and directories that are
- * able to contain files or other directories. The depth of the hierachy
+ * able to contain files or other directories. The depth of the hierarchy
* is only limited by the XenStore's maximum path length.
*
* The communication channel between the XenStore service and other
-/* $OpenBSD: rndis.h,v 1.2 2016/09/20 10:34:41 mikeb Exp $ */
+/* $OpenBSD: rndis.h,v 1.3 2022/01/09 05:42:37 jsg Exp $ */
/*
* Copyright (c) 2010 Jonathan Armani <armani@openbsd.org>
uint32_t rm_erroffset;
};
-/* Keepalive messsage. May be sent by device. */
+/* Keepalive message. May be sent by device. */
#define REMOTE_NDIS_KEEPALIVE_MSG 0x00000008
#define REMOTE_NDIS_KEEPALIVE_CMPLT 0x80000008
-/* $OpenBSD: bereg.h,v 1.4 2008/06/26 05:42:18 ray Exp $ */
+/* $OpenBSD: bereg.h,v 1.5 2022/01/09 05:42:58 jsg Exp $ */
/* $NetBSD: bereg.h,v 1.4 2000/07/24 04:28:51 mycroft Exp $ */
/*-
#define BE_BR_RXCFG_ENABLE 0x00000001 /* enable the receiver */
#define BE_BR_RXCFG_FIFO 0x0000000e /* default rx fthresh */
#define BE_BR_RXCFG_PSTRIP 0x00000020 /* pad byte strip enable */
-#define BE_BR_RXCFG_PMISC 0x00000040 /* enable promiscous mode */
+#define BE_BR_RXCFG_PMISC 0x00000040 /* enable promiscuous mode */
#define BE_BR_RXCFG_DERR 0x00000080 /* disable error checking */
#define BE_BR_RXCFG_DCRCS 0x00000100 /* disable crc stripping */
#define BE_BR_RXCFG_ME 0x00000200 /* receive packets for me */
-/* $OpenBSD: cgtwelve.c,v 1.9 2018/10/22 17:31:25 krw Exp $ */
+/* $OpenBSD: cgtwelve.c,v 1.10 2022/01/09 05:42:58 jsg Exp $ */
/*
* Copyright (c) 2002, 2003 Miodrag Vallat. All rights reserved.
/*
* Note that, although the emulation (text) mode is running in the
- * overlay plane, we advertize the frame buffer as the full-blown
+ * overlay plane, we advertise the frame buffer as the full-blown
* 32-bit beast it is.
*/
switch (cmd) {
-/* $OpenBSD: qec.c,v 1.14 2017/09/08 05:36:52 deraadt Exp $ */
+/* $OpenBSD: qec.c,v 1.15 2022/01/09 05:42:58 jsg Exp $ */
/* $NetBSD: qec.c,v 1.12 2000/12/04 20:12:55 fvdl Exp $ */
/*-
(t, t0, pri, level, flags, handler, arg, what));
}
- panic("qec_intr_extablish): no handler found");
+ panic("qec_intr_establish): no handler found");
return (NULL);
}
-/* $OpenBSD: spifvar.h,v 1.4 2006/06/02 20:00:56 miod Exp $ */
+/* $OpenBSD: spifvar.h,v 1.5 2022/01/09 05:42:58 jsg Exp $ */
/*
* Copyright (c) 1999-2002 Jason L. Wright (jason@thought.net)
struct spif_softc {
struct device sc_dev; /* base device */
void *sc_stcih; /* stc interrupt vector */
- void *sc_ppcih; /* ppc interrut vector */
+ void *sc_ppcih; /* ppc interrupt vector */
void *sc_softih; /* soft interrupt vector */
int sc_rev; /* revision level */
int sc_osc; /* oscillator speed (hz) */
-/* $OpenBSD: tvtwo.c,v 1.15 2013/10/20 20:07:31 miod Exp $ */
+/* $OpenBSD: tvtwo.c,v 1.16 2022/01/09 05:42:58 jsg Exp $ */
/*
* Copyright (c) 2003, 2006, 2008, Miodrag Vallat.
/*
* Note that, although the emulation (text) mode is running in a
- * 8-bit plane, we advertize the frame buffer as 32-bit.
+ * 8-bit plane, we advertise the frame buffer as 32-bit.
*/
switch (cmd) {
case WSDISPLAYIO_GTYPE:
-/* $OpenBSD: uperf_sbus.c,v 1.9 2017/09/08 05:36:52 deraadt Exp $ */
+/* $OpenBSD: uperf_sbus.c,v 1.10 2022/01/09 05:42:58 jsg Exp $ */
/*
* Copyright (c) 2002 Jason L. Wright (jason@thought.net)
bus_space_barrier(sc->sc_bus_t, sc->sc_bus_h, USC_ADDR, 1,
BUS_SPACE_BARRIER_WRITE);
- /* Can't use multi reads because we have to gaurantee order */
+ /* Can't use multi reads because we have to guarantee order */
v = bus_space_read_1(sc->sc_bus_t, sc->sc_bus_h, USC_DATA + 0);
bus_space_barrier(sc->sc_bus_t, sc->sc_bus_h, USC_DATA + 0, 1,
bus_space_barrier(sc->sc_bus_t, sc->sc_bus_h, USC_ADDR, 1,
BUS_SPACE_BARRIER_WRITE);
- /* Can't use multi writes because we have to gaurantee order */
+ /* Can't use multi writes because we have to guarantee order */
bus_space_write_1(sc->sc_bus_t, sc->sc_bus_h, USC_DATA + 0,
(v >> 24) & 0xff);
-/* $OpenBSD: zx.c,v 1.21 2020/05/25 09:55:49 jsg Exp $ */
+/* $OpenBSD: zx.c,v 1.22 2022/01/09 05:42:59 jsg Exp $ */
/* $NetBSD: zx.c,v 1.5 2002/10/02 16:52:46 thorpej Exp $ */
/*
/*
* Note that, although the emulation (text) mode is running in
- * a 8-bit plane, we advertize the frame buffer as the full-blown
+ * an 8-bit plane, we advertise the frame buffer as the full-blown
* 32-bit beast it is.
*/
switch (cmd) {
-/* $OpenBSD: softraid.c,v 1.420 2021/12/12 09:14:58 visa Exp $ */
+/* $OpenBSD: softraid.c,v 1.421 2022/01/09 05:42:37 jsg Exp $ */
/*
* Copyright (c) 2007, 2008, 2009 Marco Peereboom <marco@peereboom.us>
* Copyright (c) 2008 Chris Kuethe <ckuethe@openbsd.org>
}
if (restart) {
/*
- * XXX there is a hole here; there is a posibility that we
+ * XXX there is a hole here; there is a possibility that we
* had a restart however the chunk that was supposed to
* be rebuilt is no longer valid; we can reach this situation
* when a rebuild is in progress and the box crashes and
-/* $OpenBSD: softraidvar.h,v 1.173 2021/05/10 08:17:07 stsp Exp $ */
+/* $OpenBSD: softraidvar.h,v 1.174 2022/01/09 05:42:37 jsg Exp $ */
/*
* Copyright (c) 2006 Marco Peereboom <marco@peereboom.us>
* Copyright (c) 2008 Chris Kuethe <ckuethe@openbsd.org>
};
#define SR_IOCTL_GET_KDFHINT 0x01 /* Get KDF hint. */
-#define SR_IOCTL_CHANGE_PASSPHRASE 0x02 /* Change passphase. */
+#define SR_IOCTL_CHANGE_PASSPHRASE 0x02 /* Change passphrase. */
struct sr_crypto_kdfpair {
struct sr_crypto_kdfinfo *kdfinfo1;
-/* $OpenBSD: sunms.c,v 1.2 2016/06/05 20:02:36 bru Exp $ */
+/* $OpenBSD: sunms.c,v 1.3 2022/01/09 05:43:00 jsg Exp $ */
/*
* Copyright (c) 2002, 2009, Miodrag Vallat
* and bit 3 is set if it is a short (3 byte) packet.
* On the Tadpole SPARCbook, mice connected to the external
* connector will also have bit 6 set to allow it to be
- * differenciated from the onboard pointer.
+ * differentiated from the onboard pointer.
*/
sc->sc_pktlen = ISSET(c, 0x08) ? 3 : 5;
sc->sc_mb = 0;
-/* $OpenBSD: zs_ioasic.c,v 1.2 2017/12/30 20:46:59 guenther Exp $ */
+/* $OpenBSD: zs_ioasic.c,v 1.3 2022/01/09 05:43:00 jsg Exp $ */
/* $NetBSD: zs_ioasic.c,v 1.40 2009/05/12 13:21:22 cegger Exp $ */
/*-
#endif
/*
- * ZS chips are feeded a 7.372 MHz clock.
+ * ZS chips are fed a 7.372 MHz clock.
*/
#define PCLK (9600 * 768) /* PCLK pin input clock rate */
/*
* Output hardware flow control on the chip is horrendous:
* if carrier detect drops, the receiver is disabled, and if
- * CTS drops, the transmitter is stoped IN MID CHARACTER!
+ * CTS drops, the transmitter is stopped MID CHARACTER!
* Therefore, NEVER set the HFC bit, and instead use the
* status interrupt to detect CTS changes.
*/
-/* $OpenBSD: ehci.c,v 1.217 2021/11/22 11:46:11 mglocker Exp $ */
+/* $OpenBSD: ehci.c,v 1.218 2022/01/09 05:43:00 jsg Exp $ */
/* $NetBSD: ehci.c,v 1.66 2004/06/30 03:11:56 mycroft Exp $ */
/*
UDPROTO_HSHUBSTT, /* protocol */
64, /* max packet */
{0},{0},{0x00,0x01}, /* device id */
- 1,2,0, /* string indicies */
+ 1,2,0, /* string indices */
1 /* # of configurations */
};
}
/*
- * Close a reqular pipe.
+ * Close a regular pipe.
* Assumes that there are no pending transactions.
*/
void
/*
* XXX - abort_xfer uses ehci_sync_hc, which syncs via the advance
- * async doorbell. That's dependant on the async list, wheras
+ * async doorbell. That's dependant on the async list, whereas
* intr xfers are periodic, should not use this?
*/
ehci_abort_xfer(xfer, USBD_CANCELLED);
-# $OpenBSD: files.usb,v 1.148 2021/12/20 14:54:37 hastings Exp $
+# $OpenBSD: files.usb,v 1.149 2022/01/09 05:43:00 jsg Exp $
# $NetBSD: files.usb,v 1.16 2000/02/14 20:29:54 augustss Exp $
#
# Config file and device description for machine-independent USB code.
attach ubcmtp at uhub
file dev/usb/ubcmtp.c ubcmtp
-# Cypress microcontroller based serial adpaters
+# Cypress microcontroller based serial adapters
device ucycom: hid, ucombus
attach ucycom at uhidbus
file dev/usb/ucycom.c ucycom
attach utrh at uhidbus
file dev/usb/utrh.c utrh
-# Fujitsu Compnent Smart Power Strip FX-5204PS
+# Fujitsu Component Smart Power Strip FX-5204PS
device usps
attach usps at uhub
file dev/usb/usps.c usps
-/* $OpenBSD: if_athn_usb.h,v 1.12 2020/11/30 16:09:33 krw Exp $ */
+/* $OpenBSD: if_athn_usb.h,v 1.13 2022/01/09 05:43:00 jsg Exp $ */
/*-
* Copyright (c) 2011 Damien Bergamini <damien.bergamini@free.fr>
uint8_t control[4];
} __packed;
-/* Structure for HTC enpoint id 0. */
+/* Structure for HTC endpoint id 0. */
struct ar_htc_msg_hdr {
uint16_t msg_id;
#define AR_HTC_MSG_READY 0x0001
-/* $OpenBSD: if_atu.c,v 1.132 2020/07/31 10:49:32 mglocker Exp $ */
+/* $OpenBSD: if_atu.c,v 1.133 2022/01/09 05:43:00 jsg Exp $ */
/*
* Copyright (c) 2003, 2004
* Daan Vreeken <Danovitsch@Vitsch.net>. All rights reserved.
* Check in the interface descriptor if we're in DFU mode
* If we're in DFU mode, we upload the external firmware
* If we're not, the PC must have rebooted without power-cycling
- * the device.. I've tried this out, a reboot only requeres the
+ * the device. I've tried this out, a reboot only requires the
* external firmware to be reloaded :)
*
* Hmm. The at76c505a doesn't report a DFU descriptor when it's
/*
* My experience with USBD_IOERROR is that trying to
* restart the transfer will always fail and we'll
- * keep on looping restarting transfers untill someone
+ * keep on looping restarting transfers until someone
* pulls the plug of the device.
* So we don't restart the transfer, but just let it
* die... If someone knows of a situation where we can
-/* $OpenBSD: if_atureg.h,v 1.33 2013/04/15 09:23:01 mglocker Exp $ */
+/* $OpenBSD: if_atureg.h,v 1.34 2022/01/09 05:43:00 jsg Exp $ */
/*
* Copyright (c) 2003
* Daan Vreeken <Danovitsch@Vitsch.net>. All rights reserved.
} __packed;
/*
- * The header the AT76c503 puts in front of RX packets (for both managment &
+ * The header the AT76c503 puts in front of RX packets (for both management &
* data)
*/
struct atu_rx_hdr {
-/* $OpenBSD: if_axen.c,v 1.30 2020/07/31 10:49:32 mglocker Exp $ */
+/* $OpenBSD: if_axen.c,v 1.31 2022/01/09 05:43:00 jsg Exp $ */
/*
* Copyright (c) 2013 Yojiro UO <yuo@openbsd.org>
axen_cmd(sc, AXEN_CMD_MAC_WRITE, 1, AXEN_PAUSE_HIGH_WATERMARK, &val);
/* Set RX/TX configuration. */
- /* Offloadng enable */
+ /* Offloading enable */
#ifdef AXEN_TOE
val = AXEN_RXCOE_IPv4 | AXEN_RXCOE_TCPv4 | AXEN_RXCOE_UDPv4 |
AXEN_RXCOE_TCPv6 | AXEN_RXCOE_UDPv6;
/*
* buffer map
* [packet #0]...[packet #n][pkt hdr#0]..[pkt hdr#n][recv_hdr]
- * each packet has 0xeeee as psuedo header..
+ * each packet has 0xeeee as pseudo header..
*/
hdr_p = (u_int32_t *)(buf + total_len - sizeof(u_int32_t));
rx_hdr = letoh32(*hdr_p);
m->m_pkthdr.len = m->m_len = pkt_len - 6;
#ifdef AXEN_TOE
- /* cheksum err */
+ /* checksum err */
if ((pkt_hdr & AXEN_RXHDR_L3CSUM_ERR) ||
(pkt_hdr & AXEN_RXHDR_L4CSUM_ERR)) {
printf("%s: checksum err (pkt#%d)\n",
-/* $OpenBSD: if_smsc.c,v 1.37 2020/07/31 10:49:32 mglocker Exp $ */
+/* $OpenBSD: if_smsc.c,v 1.38 2022/01/09 05:43:00 jsg Exp $ */
/* $FreeBSD: src/sys/dev/usb/net/if_smsc.c,v 1.1 2012/08/15 04:03:55 gonzo Exp $ */
/*-
* Copyright (c) 2012
* The chip supports both tx and rx offloading of UDP & TCP checksums, this
* feature can be dynamically enabled/disabled.
*
- * RX checksuming is performed across bytes after the IPv4 header to the end of
+ * RX checksumming is performed across bytes after the IPv4 header to the end of
* the Ethernet frame, this means if the frame is padded with non-zero values
* the H/W checksum will be incorrect, however the rx code compensates for this.
*
- * TX checksuming is more complicated, the device requires a special header to
+ * TX checksumming is more complicated, the device requires a special header to
* be prefixed onto the start of the frame which indicates the start and end
* positions of the UDP or TCP frame. This requires the driver to manually
* go through the packet data and decode the headers prior to sending.
}
/*
- * The following setings are used for 'turbo mode', a.k.a multiple
+ * The following settings are used for 'turbo mode', a.k.a multiple
* frames per Rx transaction (again info taken form Linux driver).
*/
#ifdef SMSC_TURBO
-/* $OpenBSD: if_smscreg.h,v 1.5 2015/06/18 09:28:54 mpi Exp $ */
+/* $OpenBSD: if_smscreg.h,v 1.6 2022/01/09 05:43:00 jsg Exp $ */
/*-
* Copyright (c) 2012
* Ben Gray <bgray@freebsd.org>.
* TX_CTRL_0 <12> Last segment of frame indicator
* TX_CTRL_0 <10:0> Buffer size (?)
*
- * TX_CTRL_1 <14> Perform H/W checksuming on IP packets
+ * TX_CTRL_1 <14> Perform H/W checksumming on IP packets
* TX_CTRL_1 <13> Disable automatic ethernet CRC generation
* TX_CTRL_1 <12> Disable padding (?)
* TX_CTRL_1 <10:0> Packet byte length
-/* $OpenBSD: if_udavreg.h,v 1.15 2015/06/19 20:39:34 uaa Exp $ */
+/* $OpenBSD: if_udavreg.h,v 1.16 2022/01/09 05:43:00 jsg Exp $ */
/* $NetBSD: if_udavreg.h,v 1.2 2003/09/04 15:17:39 tsutsui Exp $ */
/* $nabe: if_udavreg.h,v 1.2 2003/08/21 16:26:40 nabe Exp $ */
/*
#define UDAV_NCR_WAKEEN (1<<6) /* Wakeup Event Enable */
#define UDAV_NCR_FCOL (1<<4) /* Force Collision Mode */
#define UDAV_NCR_FDX (1<<3) /* Full-Duplex Mode (RO on Int. PHY) */
-#define UDAV_NCR_LBK1 (1<<2) /* Lookback Mode */
-#define UDAV_NCR_LBK0 (1<<1) /* Lookback Mode */
+#define UDAV_NCR_LBK1 (1<<2) /* Loopback Mode */
+#define UDAV_NCR_LBK0 (1<<1) /* Loopback Mode */
#define UDAV_NCR_RST (1<<0) /* Software reset */
#define UDAV_NSR 0x01 /* Network Status Register */
-/* $OpenBSD: if_umb.c,v 1.47 2021/09/24 05:25:37 kevlo Exp $ */
+/* $OpenBSD: if_umb.c,v 1.48 2022/01/09 05:43:00 jsg Exp $ */
/*
* Copyright (c) 2016 genua mbH
if (len < sizeof (*ic))
return 0;
if (letoh32(ic->sessionid) != umb_session_id) {
- DPRINTF("%s: ignore IP configration for session id %d\n",
+ DPRINTF("%s: ignore IP configuration for session id %d\n",
DEVNAM(sc), letoh32(ic->sessionid));
return 0;
}
memset(sc->sc_info.ipv6dns, 0, sizeof (sc->sc_info.ipv6dns));
/*
- * IPv4 configuation
+ * IPv4 configuration
*/
avail_v4 = letoh32(ic->ipv4_available);
if ((avail_v4 & (MBIM_IPCONF_HAS_ADDRINFO | MBIM_IPCONF_HAS_GWINFO)) ==
tryv6:;
#ifdef INET6
/*
- * IPv6 configuation
+ * IPv6 configuration
*/
avail_v6 = letoh32(ic->ipv6_available);
if (avail_v6 == 0) {
DEVNAM(sc));
break;
default:
- DPRINTF("%s: unexpected notifiation (0x%02x)\n",
+ DPRINTF("%s: unexpected notification (0x%02x)\n",
DEVNAM(sc), sc->sc_intr_msg.bNotification);
break;
}
-/* $OpenBSD: if_upgt.c,v 1.87 2020/07/31 10:49:32 mglocker Exp $ */
+/* $OpenBSD: if_upgt.c,v 1.88 2022/01/09 05:43:00 jsg Exp $ */
/*
* Copyright (c) 2007 Marcus Glocker <mglocker@openbsd.org>
sc->sc_eeprom_freq3[channel] = freq3[i];
- DPRINTF(2, "%s: frequence=%d, channel=%d\n",
+ DPRINTF(2, "%s: frequency=%d, channel=%d\n",
sc->sc_dev.dv_xname,
letoh16(sc->sc_eeprom_freq3[channel].freq), channel);
}
sc->sc_eeprom_freq4[channel][j].pad = 0;
}
- DPRINTF(2, "%s: frequence=%d, channel=%d\n",
+ DPRINTF(2, "%s: frequency=%d, channel=%d\n",
sc->sc_dev.dv_xname,
letoh16(freq4_1[i].freq), channel);
}
sc->sc_eeprom_freq6[channel] = freq6[i];
- DPRINTF(2, "%s: frequence=%d, channel=%d\n",
+ DPRINTF(2, "%s: frequency=%d, channel=%d\n",
sc->sc_dev.dv_xname,
letoh16(sc->sc_eeprom_freq6[channel].freq), channel);
}
}
/*
- * If we don't regulary read the device statistics, the RX queue
+ * If we don't regularly read the device statistics, the RX queue
* will stall. It's strange, but it works, so we keep reading
* the statistics here. *shrug*
*/
-/* $OpenBSD: if_upgtvar.h,v 1.17 2013/04/15 09:23:01 mglocker Exp $ */
+/* $OpenBSD: if_upgtvar.h,v 1.18 2022/01/09 05:43:00 jsg Exp $ */
/*
* Copyright (c) 2007 Marcus Glocker <mglocker@openbsd.org>
uint32_t unknown4;
} __packed;
-/* frequence 3 data */
+/* frequency 3 data */
struct upgt_lmac_freq3 {
uint16_t freq;
uint8_t data[6];
} __packed;
-/* frequence 4 data */
+/* frequency 4 data */
struct upgt_lmac_freq4 {
struct upgt_eeprom_freq4_2 cmd;
uint8_t pad;
};
-/* frequence 6 data */
+/* frequency 6 data */
struct upgt_lmac_freq6 {
uint16_t freq;
uint8_t data[8];
-/* $OpenBSD: if_urtw.c,v 1.70 2021/02/25 02:48:20 dlg Exp $ */
+/* $OpenBSD: if_urtw.c,v 1.71 2022/01/09 05:43:00 jsg Exp $ */
/*-
* Copyright (c) 2009 Martynas Venckus <martynas@openbsd.org>
error = urtw_get_txpwr(sc);
if (error != 0)
goto fail;
- error = urtw_led_init(sc); /* XXX incompleted */
+ error = urtw_led_init(sc); /* XXX incomplete */
if (error != 0)
goto fail;
-/* $OpenBSD: if_wi_usb.c,v 1.75 2021/11/22 10:17:14 mglocker Exp $ */
+/* $OpenBSD: if_wi_usb.c,v 1.76 2022/01/09 05:43:00 jsg Exp $ */
/*
* Copyright (c) 2003 Dale Rahn. All rights reserved.
if (sc->wi_lock != 0) {
splx(s);
- return 0; /* failed to aquire lock */
+ return 0; /* failed to acquire lock */
}
sc->wi_lock = 1;
-/* $OpenBSD: if_zyd.c,v 1.126 2021/11/22 10:17:14 mglocker Exp $ */
+/* $OpenBSD: if_zyd.c,v 1.127 2022/01/09 05:43:00 jsg Exp $ */
/*-
* Copyright (c) 2006 by Damien Bergamini <damien.bergamini@free.fr>
}
/*
- * Issue a read command for the specificed register (of size regsize)
+ * Issue a read command for the specified register (of size regsize)
* and await a reply of olen bytes in sc->odata.
*/
int
-/* $OpenBSD: ohci.c,v 1.163 2021/11/22 10:17:14 mglocker Exp $ */
+/* $OpenBSD: ohci.c,v 1.164 2022/01/09 05:43:00 jsg Exp $ */
/* $NetBSD: ohci.c,v 1.139 2003/02/22 05:24:16 tsutsui Exp $ */
/* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $ */
}
/*
- * Close a reqular pipe.
+ * Close a regular pipe.
* Assumes that there are no pending transactions.
*/
void
-/* $OpenBSD: uaudio.c,v 1.163 2021/12/31 23:19:50 jsg Exp $ */
+/* $OpenBSD: uaudio.c,v 1.164 2022/01/09 05:43:00 jsg Exp $ */
/*
* Copyright (c) 2018 Alexandre Ratchov <alex@caoua.org>
*
}
/*
- * Add the given range to the the uaudio_ranges structures. Ranges are
+ * Add the given range to the uaudio_ranges structures. Ranges are
* not supposed to overlap (required by USB spec). If they do we just
* return.
*/
-/* $OpenBSD: ucc.c,v 1.28 2021/11/17 06:21:23 anton Exp $ */
+/* $OpenBSD: ucc.c,v 1.29 2022/01/09 05:43:00 jsg Exp $ */
/*
* Copyright (c) 2021 Anton Lindqvist <anton@openbsd.org>
N(0x019F, "AL Control Panel", 0, 0)
N(0x01A0, "AL Command Line Processor/Run", 0, 0)
N(0x01A1, "AL Process/Task Manager", 0, 0)
- N(0x01A2, "AL Select Tast/Application", 0, 0)
+ N(0x01A2, "AL Select Task/Application", 0, 0)
N(0x01A3, "AL Next Task/Application", 0, 0)
N(0x01A4, "AL Previous Task/Application", 0, 0)
N(0x01A5, "AL Preemptive Halt Task/Application", 0, 0)
-/* $OpenBSD: udl.c,v 1.96 2021/11/22 10:17:14 mglocker Exp $ */
+/* $OpenBSD: udl.c,v 1.97 2022/01/09 05:43:00 jsg Exp $ */
/*
* Copyright (c) 2009 Marcus Glocker <mglocker@openbsd.org>
/*
* WS Tech DVI is DL120 or DL160. All deviced uses the
* same revision (0.04) so iSerialNumber must be used
- * to determin which chip it is.
+ * to determine which chip it is.
*/
bzero(serialnum, sizeof serialnum);
/*
* SUNWEIT DVI is DL160, DL125, DL165 or DL195. Major revision
* can be used to differ between DL1x0 and DL1x5. Minor to
- * differ between DL1x5. iSerialNumber seems not to be uniqe.
+ * differ between DL1x5. iSerialNumber seems not to be unique.
*/
sc->sc_chip = DL160;
-/* $OpenBSD: ugold.c,v 1.20 2021/11/15 15:36:24 anton Exp $ */
+/* $OpenBSD: ugold.c,v 1.21 2022/01/09 05:43:00 jsg Exp $ */
/*
* Copyright (c) 2013 Takayoshi SASANO <uaa@openbsd.org>
*/
/*
- * Driver for Microdia's HID base TEMPer and TEMPerHUM temperature and
+ * Driver for Microdia's HID based TEMPer and TEMPerHUM temperature and
* humidity sensors
*/
-/* $OpenBSD: uhci.c,v 1.154 2021/11/22 10:17:14 mglocker Exp $ */
+/* $OpenBSD: uhci.c,v 1.155 2022/01/09 05:43:00 jsg Exp $ */
/* $NetBSD: uhci.c,v 1.172 2003/02/23 04:19:26 simonb Exp $ */
/* $FreeBSD: src/sys/dev/usb/uhci.c,v 1.33 1999/11/17 22:33:41 n_hibma Exp $ */
* uhci_alloc_sqh allocates QHs
* These two routines do their own free list management,
* partly for speed, partly because allocating DMAable memory
- * has page size granularaity so much memory would be wasted if
+ * has page size granularity so much memory would be wasted if
* only one TD/QH (32 bytes) was placed in each allocated chunk.
*/
-/* $OpenBSD: uhidpp.c,v 1.23 2021/12/23 12:14:15 anton Exp $ */
+/* $OpenBSD: uhidpp.c,v 1.24 2022/01/09 05:43:00 jsg Exp $ */
/*
* Copyright (c) 2021 Anton Lindqvist <anton@openbsd.org>
MUTEX_ASSERT_LOCKED(&sc->sc_mtx);
- /* A connected device will continously send connect events. */
+ /* A connected device will continuously send connect events. */
if (dev->d_connected)
return;
-/* $OpenBSD: ukbd.c,v 1.85 2021/11/22 11:29:17 anton Exp $ */
+/* $OpenBSD: ukbd.c,v 1.86 2022/01/09 05:43:00 jsg Exp $ */
/* $NetBSD: ukbd.c,v 1.85 2003/03/11 16:44:00 augustss Exp $ */
/*
/*
* XXX USB requires too many parts of the kernel to be running
* XXX in order to work, so we can't do much for the console
- * XXX keyboard until autconfiguration has run its course.
+ * XXX keyboard until autoconfiguration has run its course.
*/
hidkbd_is_console = 1;
-/* $OpenBSD: umcs.c,v 1.8 2020/07/31 10:49:33 mglocker Exp $ */
+/* $OpenBSD: umcs.c,v 1.9 2022/01/09 05:43:01 jsg Exp $ */
/* $NetBSD: umcs.c,v 1.8 2014/08/23 21:37:56 martin Exp $ */
/* $FreeBSD: head/sys/dev/usb/serial/umcs.c 260559 2014-01-12 11:44:28Z hselasky $ */
* Datasheets are available at MosChip www site at http://www.moschip.com.
* The datasheets don't contain full programming information for the chip.
*
- * It is nornal to have only two enabled ports in devices, based on quad-port
+ * It is normal to have only two enabled ports in devices, based on quad-port
* mos7840.
*/
#ifdef UMCS_DEBUG
if (!umcs_get_reg(sc, UMCS_MODE, &data)) {
- printf("%s: On-die confguration: RST: active %s, "
+ printf("%s: On-die configuration: RST: active %s, "
"HRD: %s, PLL: %s, POR: %s, Ports: %s, EEPROM write %s, "
"IrDA is %savailable\n", DEVNAME(sc),
(data & UMCS_MODE_RESET) ? "low" : "high",
DPRINTF("%s: portno %d set speed: %d (%02x/%d)\n", DEVNAME(sc), portno,
rate, clk, div);
- /* Set clock source for standard BAUD frequences */
+ /* Set clock source for standard BAUD frequencies */
if (umcs_get_reg(sc, spreg, &data))
return (EIO);
data &= UMCS_SPx_CLK_MASK;
return (0);
}
-/* Maximum speeds for standard frequences, when PLL is not used */
+/* Maximum speeds for standard frequencies, when PLL is not used */
static const uint32_t umcs_baudrate_divisors[] = {
0, 115200, 230400, 403200, 460800, 806400, 921600, 1572864, 3145728,
};
-/* $OpenBSD: umcs.h,v 1.3 2015/12/24 16:54:37 mmcc Exp $ */
+/* $OpenBSD: umcs.h,v 1.4 2022/01/09 05:43:01 jsg Exp $ */
/* $NetBSD: umcs.h,v 1.1 2014/03/16 09:34:45 martin Exp $ */
/*-
#define UMCS_READ_LENGTH 1 /* bytes */
-/* Read/Wrtire registers vendor commands */
+/* Read/Write registers vendor commands */
#define UMCS_READ 0x0d
#define UMCS_WRITE 0x0e
#define UMCS_CONFIG_NO 0
#define UMCS_IFACE_NO 0
-/* Read/Wrtie EEPROM values */
+/* Read/Write EEPROM values */
#define UMCS_EEPROM_RW_WVALUE 0x0900
/*
#define UMCS_ZERO_PERIOD4 0x3d /* Period btw frames for Port 4, R/W */
#define UMCS_ZERO_ENABLE 0x3e /* Enable zero-out frames, R/W */
-/* Low 8 bits and high 1 bit of threshhold values for Bulk-Out ports 1-4 */
+/* Low 8 bits and high 1 bit of threshold values for Bulk-Out ports 1-4 */
#define UMCS_THR_VAL_LOW1 0x3f
#define UMCS_THR_VAL_HIGH1 0x40
#define UMCS_THR_VAL_LOW2 0x41
/* Bits for SPx registers */
#define UMCS_SPx_LOOP_PIPES 0x01 /* Loop Out FIFO to In FIFO */
-#define UMCS_SPx_SKIP_ERR_DATA 0x02 /* Drop data recevied with errors */
+#define UMCS_SPx_SKIP_ERR_DATA 0x02 /* Drop data received with errors */
#define UMCS_SPx_RESET_OUT_FIFO 0x04 /* Reset Bulk-Out FIFO */
#define UMCS_SPx_RESET_IN_FIFO 0x08 /* Reset Bulk-In FIFO */
#define UMCS_SPx_CLK_MASK 0x70 /* Mask to extract Baud CLK source */
#define UMCS_SPx_CLK_X1 0x00 /* Max speed = 115200 bps, default */
#define UMCS_SPx_CLK_X2 0x10 /* Max speed = 230400 bps */
#define UMCS_SPx_CLK_X35 0x20 /* Max speed = 403200 bps */
-#define UMCS_SPx_CLK_X4 0x30 /* Nax speed = 460800 bps */
+#define UMCS_SPx_CLK_X4 0x30 /* Max speed = 460800 bps */
#define UMCS_SPx_CLK_X7 0x40 /* Max speed = 806400 bps */
#define UMCS_SPx_CLK_X8 0x50 /* Max speed = 921600 bps */
#define UMCS_SPx_CLK_24MHZ 0x60 /* Max speed = 1.5Mbps */
#define UMCS_GPIO_GPIO_1 0x02 /* GPIO_1 data */
/*
- * Constants for PLL dividers. Ouptut frequency of PLL is:
+ * Constants for PLL dividers. Output frequency of PLL is:
* Fout = (N/M) * Fin.
* Default PLL input frequency Fin is 12Mhz (on-chip).
*/
#define UMCS_CLK_SELECT3_SHIFT 0 /* Shift for port 3 in CLK_SELECT23 */
#define UMCS_CLK_SELECT4_MASK 0x38 /* Bits for port 4 in CLK_SELECT23 */
#define UMCS_CLK_SELECT4_SHIFT 3 /* Shift for port 4 in CLK_SELECT23 */
-#define UMCS_CLK_SELECT_STD 0x00 /* STANDARD rate devired from 96Mhz */
+#define UMCS_CLK_SELECT_STD 0x00 /* STANDARD rate derived from 96Mhz */
#define UMCS_CLK_SELECT_30MHZ 0x01 /* 30Mhz */
#define UMCS_CLK_SELECT_96MHZ 0x02 /* 96Mhz direct */
#define UMCS_CLK_SELECT_120MHZ 0x03 /* 120Mhz */
#define UMCS_RX_SAMPLINGx_DEF 7 /* Default for any RX Sampling */
#define UMCS_RX_SAMPLINGx_MAX 15 /* Min for any RX Sampling */
-/* Number of Bulk-in requests befor sending zero-sized reply */
+/* Number of Bulk-in requests before sending zero-sized reply */
#define UMCS_ZERO_PERIODx_DEF 20
/* Bits of DCR0 registers, documented in datasheet */
-#define UMCS_DCR0_PWRSAVE 0x01 /* Transiver off when USB Suspend */
+#define UMCS_DCR0_PWRSAVE 0x01 /* Transceiver off when USB Suspended */
#define UMCS_DCR0_RESERVED1 0x02 /* Unused */
#define UMCS_DCR0_GPIO_MASK 0x0c /* GPIO Mode bits */
#define UMCS_DCR0_GPIO_IN 0x00 /* GPIO Mode - Input (0b00) */
#define UMCS_DCR0_GPIO_OUT 0x08 /* GPIO Mode - Input (0b10) */
-#define UMCS_DCR0_RTS_ACTHI 0x10 /* RTS Active is Hight, (default low) */
+#define UMCS_DCR0_RTS_ACTHI 0x10 /* RTS Active is High, (default low) */
#define UMCS_DCR0_RTS_AUTO 0x20 /* Control by state TX buffer or MCR */
#define UMCS_DCR0_IRDA 0x40 /* IrDA mode */
#define UMCS_DCR0_RESERVED2 0x80 /* Unused */
/* Bits of DCR1 registers, documented in datasheet, work only for port 1. */
-#define UMCS_DCR1_GPIO_CURRENT_MASK 0x03 /* Mask to get GPIO valule */
+#define UMCS_DCR1_GPIO_CURRENT_MASK 0x03 /* Mask to get GPIO value */
#define UMCS_DCR1_GPIO_CURRENT_6MA 0x00 /* GPIO output current 6mA */
#define UMCS_DCR1_GPIO_CURRENT_8MA 0x01 /* GPIO output current 8mA */
#define UMCS_DCR1_GPIO_CURRENT_10MA 0x02 /* GPIO output current 10mA */
#define UMCS_REG_RHR 0x00 /* Receiver Holding Register R */
#define UMCS_REG_IER 0x01 /* Interrupt enable register - R/W */
#define UMCS_REG_FCR 0x02 /* FIFO Control register - W */
-#define UMCS_REG_ISR 0x02 /* Interrupt Status Registter R */
+#define UMCS_REG_ISR 0x02 /* Interrupt Status Register R */
#define UMCS_REG_LCR 0x03 /* Line control register R/W */
#define UMCS_REG_MCR 0x04 /* Modem control register R/W */
#define UMCS_REG_LSR 0x05 /* Line status register R */
#define UMCS_REG_DLM 0x01 /* High bits of BAUD divider */
/* IER bits */
-#define UMCS_IER_RXREADY 0x01 /* RX Ready interrumpt mask */
-#define UMCS_IER_TXREADY 0x02 /* TX Ready interrumpt mask */
-#define UMCS_IER_RXSTAT 0x04 /* RX Status interrumpt mask */
+#define UMCS_IER_RXREADY 0x01 /* RX Ready interrupt mask */
+#define UMCS_IER_TXREADY 0x02 /* TX Ready interrupt mask */
+#define UMCS_IER_RXSTAT 0x04 /* RX Status interrupt mask */
#define UMCS_IER_MODEM 0x08 /* Modem status change interrupt mask */
#define UMCS_IER_SLEEP 0x10 /* SLEEP enable */
/* ISR bits */
#define UMCS_ISR_NOPENDING 0x01 /* No interrupt pending */
#define UMCS_ISR_INTMASK 0x3f /* Mask to select interrupt source */
-#define UMCS_ISR_RXERR 0x06 /* Recevir error */
-#define UMCS_ISR_RXHASDATA 0x04 /* Recevier has data */
-#define UMCS_ISR_RXTIMEOUT 0x0c /* Recevier timeout */
+#define UMCS_ISR_RXERR 0x06 /* Receiver error */
+#define UMCS_ISR_RXHASDATA 0x04 /* Receiver has data */
+#define UMCS_ISR_RXTIMEOUT 0x0c /* Receiver timeout */
#define UMCS_ISR_TXEMPTY 0x02 /* Transmitter empty */
#define UMCS_ISR_MSCHANGE 0x00 /* Modem status change */
-/* $OpenBSD: umidivar.h,v 1.16 2013/11/10 10:22:39 pirofti Exp $ */
+/* $OpenBSD: umidivar.h,v 1.17 2022/01/09 05:43:01 jsg Exp $ */
/* $NetBSD: umidivar.h,v 1.5 2002/09/12 21:00:42 augustss Exp $ */
/*
* Copyright (c) 2001 The NetBSD Foundation, Inc.
};
/*
- * hierarchie
+ * hierarchy
*
* <-- parent child -->
*
-/* $OpenBSD: umsm.c,v 1.119 2021/05/18 14:23:03 kevlo Exp $ */
+/* $OpenBSD: umsm.c,v 1.120 2022/01/09 05:43:01 jsg Exp $ */
/*
* Copyright (c) 2008 Yojiro UO <yuo@nui.org>
target_ep = ed->bEndpointAddress;
}
- /* open command endppoint */
+ /* open command endpoint */
err = usbd_open_pipe(sc->sc_iface, target_ep,
USBD_EXCLUSIVE_USE, &cmdpipe);
if (err) {
-/* $OpenBSD: uoak.h,v 1.3 2013/04/15 09:23:02 mglocker Exp $ */
+/* $OpenBSD: uoak.h,v 1.4 2022/01/09 05:43:01 jsg Exp $ */
/*
* Copyright (c) 2012 Yojiro UO <yuo@nui.org>
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
-/* TORADEX OAK seriese sensors */
+/* TORADEX OAK series sensors */
/* http://developer.toradex.com/files/toradex-dev/uploads/media/Oak/Oak_ProgrammingGuide.pdf */
-/* feture request direction */
+/* feature request direction */
#define OAK_SET 0x0
#define OAK_GET 0x1
-/* $OpenBSD: uoak_subr.c,v 1.9 2018/05/01 18:14:46 landry Exp $ */
+/* $OpenBSD: uoak_subr.c,v 1.10 2022/01/09 05:43:01 jsg Exp $ */
/*
* Copyright (c) 2012 Yojiro UO <yuo@nui.org>
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
-/* TORADEX OAK seriese sensors: common functions */
+/* TORADEX OAK series sensors: common functions */
/* http://developer.toradex.com/files/toradex-dev/uploads/media/Oak/Oak_ProgrammingGuide.pdf */
#include <sys/param.h>
* basic procedure to issue command to the OAK device.
* 1) check the device is ready to accept command.
* if a report of a FEATURE_REPORT request is not start 0xff,
- * wait for a while, and retry till the reponse start with 0xff.
+ * wait for a while, and retry till the response start with 0xff.
* 2) issue command. (set or get)
* 3) if the command will response, wait for a while, and issue
* FEATURE_REPORT. leading 0xff indicate the response is valid.
(void)uoak_get_sample_rate(sc, target);
(void)uoak_get_report_rate(sc, target);
- /* get device spcecific information */
+ /* get device specific information */
if (sc->sc_methods->dev_setting != NULL)
sc->sc_methods->dev_setting(sc->sc_parent, target);
}
break;
}
- /* print device spcecific information */
+ /* print device specific information */
if (sc->sc_methods->dev_print != NULL)
sc->sc_methods->dev_print(sc->sc_parent, target);
printf("\n");
-/* $OpenBSD: uoaklux.c,v 1.15 2021/11/15 15:36:24 anton Exp $ */
+/* $OpenBSD: uoaklux.c,v 1.16 2022/01/09 05:43:01 jsg Exp $ */
/*
* Copyright (c) 2012 Yojiro UO <yuo@nui.org>
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
-/* TORADEX OAK seriese sensors: lux sensor driver */
+/* TORADEX OAK series sensors: lux sensor driver */
/* http://developer.toradex.com/files/toradex-dev/uploads/media/Oak/Oak_ProgrammingGuide.pdf */
#include <sys/param.h>
-/* $OpenBSD: uoakrh.c,v 1.17 2021/11/15 15:36:24 anton Exp $ */
+/* $OpenBSD: uoakrh.c,v 1.18 2022/01/09 05:43:01 jsg Exp $ */
/*
* Copyright (c) 2012 Yojiro UO <yuo@nui.org>
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
-/* TORADEX OAK seriese sensors: Temperature/Humidity sensor driver */
+/* TORADEX OAK series sensors: Temperature/Humidity sensor driver */
/* http://developer.toradex.com/files/toradex-dev/uploads/media/Oak/Oak_ProgrammingGuide.pdf */
#include <sys/param.h>
-/* $OpenBSD: uoakv.c,v 1.15 2021/11/15 15:36:24 anton Exp $ */
+/* $OpenBSD: uoakv.c,v 1.16 2022/01/09 05:43:02 jsg Exp $ */
/*
* Copyright (c) 2012 Yojiro UO <yuo@nui.org>
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
-/* TORADEX OAK seriese sensors: 8channel +/-10V ADC driver */
+/* TORADEX OAK series sensors: 8channel +/-10V ADC driver */
/* http://developer.toradex.com/files/toradex-dev/uploads/media/Oak/Oak_ProgrammingGuide.pdf */
#include <sys/param.h>
struct uoakv_softc *sc = (struct uoakv_softc *)parent;
int i;
- printf(", %s",
- (sc->sc_inputmode[target] ? "Psuedo-Diffential" : "Single-Ended"));
+ printf(", %s", (sc->sc_inputmode[target] ?
+ "Pseudo-Differential" : "Single-Ended"));
printf(", ADC channel offsets:\n");
printf("%s: ", sc->sc_hdev.sc_dev.dv_xname);
-/* $OpenBSD: uonerng.c,v 1.5 2020/05/29 04:42:25 deraadt Exp $ */
+/* $OpenBSD: uonerng.c,v 1.6 2022/01/09 05:43:02 jsg Exp $ */
/*
* Copyright (C) 2015 Devin Reade <gdr@gno.org>
* Copyright (C) 2015 Sean Levy <attila@stalphonsos.com>
#define ONERNG_OP_EXTRACT_FIRMWARE "cmdX\n"
/*
- * Noise sources include an avalache circuit and an RF circuit.
+ * Noise sources include an avalanche circuit and an RF circuit.
* There is also a whitener to provide a uniform distribution.
* Different combinations are possible.
*/
-/* $OpenBSD: usb.c,v 1.128 2021/09/05 16:16:13 mglocker Exp $ */
+/* $OpenBSD: usb.c,v 1.129 2022/01/09 05:43:02 jsg Exp $ */
/* $NetBSD: usb.c,v 1.77 2003/01/01 00:10:26 thorpej Exp $ */
/*
if (sc->sc_bus->flags & USB_BUS_CONFIG_PENDING) {
/*
* If this is a low/full speed hub and there is a high
- * speed hub that hasn't explored yet, reshedule this
+ * speed hub that hasn't explored yet, reschedule this
* task, allowing the high speed explore task to run.
*/
if (sc->sc_bus->usbrev < USBREV_2_0 && explore_pending > 0) {
-/* $OpenBSD: usb_subr.c,v 1.156 2021/12/04 07:01:59 anton Exp $ */
+/* $OpenBSD: usb_subr.c,v 1.157 2022/01/09 05:43:02 jsg Exp $ */
/* $NetBSD: usb_subr.c,v 1.103 2003/01/10 11:19:13 augustss Exp $ */
/* $FreeBSD: src/sys/dev/usb/usb_subr.c,v 1.18 1999/11/17 22:33:47 n_hibma Exp $ */
return (0);
} while ((UGETW(ps.wPortChange) & UPS_C_PORT_RESET) == 0 && --n > 0);
- /* Clear port reset even if a timeout occured. */
+ /* Clear port reset even if a timeout occurred. */
if (usbd_clear_port_feature(dev, port, UHF_C_PORT_RESET)) {
DPRINTF(("%s: clear port feature failed\n", __func__));
return (EIO);
/* Try to get device descriptor */
/*
* some device will need small size query at first (XXX: out of spec)
- * we will get full size descriptor later, just determin the maximum
+ * we will get full size descriptor later, just determine the maximum
* packet size of the control pipe at this moment.
*/
for (i = 0; i < 3; i++) {
-/* $OpenBSD: usbcdc.h,v 1.9 2013/04/15 09:23:02 mglocker Exp $ */
+/* $OpenBSD: usbcdc.h,v 1.10 2022/01/09 05:43:02 jsg Exp $ */
/* $NetBSD: usbcdc.h,v 1.8 2001/02/16 20:15:57 kenh Exp $ */
/* $FreeBSD: src/sys/dev/usb/usbcdc.h,v 1.7 1999/11/17 22:33:48 n_hibma Exp $ */
#define UCDC_CONNECTION_SPEED_LENGTH 8
/*
- * Bits set in the SERIAL STATE notifcation (first byte of data)
+ * Bits set in the SERIAL STATE notification (first byte of data)
*/
#define UCDC_N_SERIAL_OVERRUN 0x40
-/* $OpenBSD: uthum.c,v 1.37 2021/11/15 15:36:24 anton Exp $ */
+/* $OpenBSD: uthum.c,v 1.38 2022/01/09 05:43:02 jsg Exp $ */
/*
* Copyright (c) 2009, 2010 Yojiro UO <yuo@nui.org>
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
-/* Driver for HID base TEMPer seriese Temperature(/Humidity) sensors */
+/* Driver for HID based TEMPer series Temperature(/Humidity) sensors */
#include <sys/param.h>
#include <sys/systm.h>
-/* $OpenBSD: utpms.c,v 1.12 2021/11/22 11:29:18 anton Exp $ */
+/* $OpenBSD: utpms.c,v 1.13 2022/01/09 05:43:02 jsg Exp $ */
/*
* Copyright (c) 2005, Johan Wallén
to[i + 16] = from[5 * i + 42];
#if 0
/*
- * XXX This seems to introduce random ventical jumps,
+ * XXX This seems to introduce random vertical jumps,
* so we ignore these sensors until we figure out
* their meaning.
*/
-/* $OpenBSD: utrh.c,v 1.25 2021/11/15 15:36:24 anton Exp $ */
+/* $OpenBSD: utrh.c,v 1.26 2022/01/09 05:43:02 jsg Exp $ */
/*
* Copyright (c) 2009 Yojiro UO <yuo@nui.org>
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
-/* Driver for Strawberry linux USBRH Temerature/Humidity sensor */
+/* Driver for Strawberry linux USBRH Temperature/Humidity sensor */
#include <sys/param.h>
#include <sys/systm.h>
-/* $OpenBSD: uvideo.c,v 1.214 2021/11/22 10:17:14 mglocker Exp $ */
+/* $OpenBSD: uvideo.c,v 1.215 2022/01/09 05:43:02 jsg Exp $ */
/*
* Copyright (c) 2008 Robert Nagy <robert@openbsd.org>
/*
* Do negotiation.
*/
- /* save a copy of current fromat group in case of negotiation fails */
+ /* save a copy of current format group in case of negotiation fails */
fmtgrp_save = sc->sc_fmtgrp_cur;
frame_save = sc->sc_fmtgrp_cur->frame_cur;
/* set new format group */
-/* $OpenBSD: uvscom.c,v 1.39 2020/07/31 10:49:33 mglocker Exp $ */
+/* $OpenBSD: uvscom.c,v 1.40 2022/01/09 05:43:02 jsg Exp $ */
/* $NetBSD: uvscom.c,v 1.9 2003/02/12 15:36:20 ichiro Exp $ */
/*-
* Copyright (c) 2001-2002, Shunsuke Akiyama <akiyama@jp.FreeBSD.org>.
err = uvscom_readstat(sc);
if (err) {
- DPRINTF(("%s: uvscom_open: readstat faild\n",
+ DPRINTF(("%s: uvscom_open: readstat failed\n",
sc->sc_dev.dv_xname));
return (EIO);
}
-/* $OpenBSD: xhci.c,v 1.123 2021/11/22 10:17:14 mglocker Exp $ */
+/* $OpenBSD: xhci.c,v 1.124 2022/01/09 05:43:02 jsg Exp $ */
/*
* Copyright (c) 2014-2015 Martin Pieuchot
/*
* Get a slot and init the device's contexts.
*
- * Since the control enpoint, represented as the default
+ * Since the control endpoint, represented as the default
* pipe, is always opened first we are dealing with a
* new device. Put a new slot in the ENABLED state.
*
DEQPTR(xp->ring) | xp->ring.toggle
);
- /* Unmask the new endoint */
+ /* Unmask the new endpoint */
sdev->input_ctx->drop_flags = 0;
sdev->input_ctx->add_flags = htole32(XHCI_INCTX_MASK_DCI(xp->dci));
-/* $OpenBSD: xhcireg.h,v 1.17 2019/10/15 03:31:35 visa Exp $ */
+/* $OpenBSD: xhcireg.h,v 1.18 2022/01/09 05:43:02 jsg Exp $ */
/*-
* Copyright (c) 2014 Martin Pieuchot. All rights reserved.
#define XHCI_HCC_LHRC(x) (((x) >> 5) & 0x1) /* Light HC reset */
#define XHCI_HCC_LTC(x) (((x) >> 6) & 0x1) /* Latency tolerance msg */
#define XHCI_HCC_NSS(x) (((x) >> 7) & 0x1) /* No secondary sid */
-#define XHCI_HCC_PAE(x) (((x) >> 8) & 0x1) /* Pase All Event Data */
+#define XHCI_HCC_PAE(x) (((x) >> 8) & 0x1) /* Parse All Event Data */
#define XHCI_HCC_SPC(x) (((x) >> 9) & 0x1) /* Short packet */
#define XHCI_HCC_SEC(x) (((x) >> 10) & 0x1) /* Stopped EDTLA */
-#define XHCI_HCC_CFC(x) (((x) >> 11) & 0x1) /* Configuous Frame ID */
+#define XHCI_HCC_CFC(x) (((x) >> 11) & 0x1) /* Contiguous Frame ID */
#define XHCI_HCC_MAX_PSA_SZ(x) (((x) >> 12) & 0xf) /* Max pri. stream arr. */
#define XHCI_HCC_XECP(x) (((x) >> 16) & 0xffff) /* Ext. capabilities */
#define XHCI_PM3_U2TO(x) (((x) & 0xff) << 8) /* RW - U2 timeout */
#define XHCI_PM3_FLA 0x00010000 /* RW - Force Link PM Accept */
#define XHCI_PM2_L1S(x) (((x) >> 0) & 0x7) /* RO - L1 status */
-#define XHCI_PM2_RWE 0x00000008 /* RW - remote wakup enable */
+#define XHCI_PM2_RWE 0x00000008 /* RW - remote wakeup enable */
#define XHCI_PM2_HIRD(x) (((x) & 0xf) << 4) /* RW - resume duration */
#define XHCI_PM2_L1SLOT(x) (((x) & 0xff) << 8) /* RW - L1 device slot */
#define XHCI_PM2_HLE 0x00010000 /* RW - hardware LPM enable */
#define XHCI_CMD_SET_TR_DEQ (16 << 10)
#define XHCI_CMD_RESET_DEV (17 << 10)
#define XHCI_CMD_FEVENT (18 << 10)
-#define XHCI_CMD_NEG_BW (19 << 10) /* Negociate bandwith */
+#define XHCI_CMD_NEG_BW (19 << 10) /* Negotiate bandwidth */
#define XHCI_CMD_SET_LT (20 << 10) /* Set latency tolerance */
-#define XHCI_CMD_GET_BW (21 << 10) /* Get port bandwith */
+#define XHCI_CMD_GET_BW (21 << 10) /* Get port bandwidth */
#define XHCI_CMD_FHEADER (22 << 10)
#define XHCI_CMD_NOOP (23 << 10) /* To test the command ring */
#define XHCI_CODE_NO_SLOTS 9 /* MaxSlots limit reached */
#define XHCI_CODE_STREAM_TYPE 10 /* Stream Context Type value detected */
#define XHCI_CODE_SLOT_NOT_ON 11 /* Related device slot is disabled */
-#define XHCI_CODE_ENDP_NOT_ON 12 /* Related enpoint is disabled */
+#define XHCI_CODE_ENDP_NOT_ON 12 /* Related endpoint is disabled */
#define XHCI_CODE_SHORT_XFER 13 /* Short packet */
#define XHCI_CODE_RING_UNDERRUN 14 /* Empty ring when transmitting isoc */
#define XHCI_CODE_RING_OVERRUN 15 /* Empty ring when receiving isoc */
"640x480x67",
"640x480x60",
"720x400x85", /* should this really be "720x400x88" ? */
- "720x400x70", /* hmm... videmode.c doesn't have this one */
+ "720x400x70", /* hmm... videomode.c doesn't have this one */
};
#ifdef EDIDVERBOSE
* Note that I have heavily modified the program for use in the EDID
* kernel code for NetBSD, including removing the use of floating
* point operations and making significant adjustments to minimize
- * error propogation while operating with integer only math.
+ * error propagation while operating with integer only math.
*
* This has required the use of 64-bit integers in a few places, but
* the upshot is that for a calculation of 1920x1200x85 (as an
*
* Finally we multiply by another 1000, to get value in picosec.
* Why picosec? To minimize rounding errors. Gotta love integer
- * math and error propogation.
+ * math and error propagation.
*/
h_period_est = DIVIDE(((DIVIDE(2000000000000ULL, v_field_rqd)) -
* [V FIELD RATE EST] = 1000000000 / [H PERIOD EST] / [TOTAL V LINES]
*
* This is all scaled to get the result in uHz. Again, we're trying to
- * minimize error propogation.
+ * minimize error propagation.
*/
v_field_est = DIVIDE(DIVIDE(1000000000000000ULL, h_period_est),
total_v_lines);
*
* The ending result is that our ideal_duty_cycle is 256000x larger
* than the duty cycle used by VESA. But again, this reduces error
- * propogation.
+ * propagation.
*/
ideal_duty_cycle =
-/* $OpenBSD: x86emu.c,v 1.11 2019/04/01 06:03:57 naddy Exp $ */
+/* $OpenBSD: x86emu.c,v 1.12 2022/01/09 05:43:02 jsg Exp $ */
/* $NetBSD: x86emu.c,v 1.7 2009/02/03 19:26:29 joerg Exp $ */
/*
* addresses relative to SS (ie: on the stack). So, at the minimum, all
* decodings of addressing modes would have to set/clear a bit describing
* whether the access is relative to DS or SS. That is the function of the
- * cpu-state-varible emu->x86.mode. There are several potential states:
+ * cpu-state-variable emu->x86.mode. There are several potential states:
*
* repe prefix seen (handled elsewhere)
* repne prefix seen (ditto)
CONDITIONAL_SET_FLAG(res & 0x80, F_SF);
CONDITIONAL_SET_FLAG(PARITY(res), F_PF);
/* calculate the borrow chain --- modified such that d=0.
- * substitutiing d=0 into bc= res&(~d|s)|(~d&s); (the one used for
+ * substituting d=0 into bc= res&(~d|s)|(~d&s); (the one used for
* sub) and simplifying, since ~d=0xff..., ~d|s == 0xffff..., and
* res&0xfff... == res. Similarly ~d&s == s. So the simplified
* result is: */
CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
/* calculate the borrow chain --- modified such that d=0.
- * substitutiing d=0 into bc= res&(~d|s)|(~d&s); (the one used for
+ * substituting d=0 into bc= res&(~d|s)|(~d&s); (the one used for
* sub) and simplifying, since ~d=0xff..., ~d|s == 0xffff..., and
* res&0xfff... == res. Similarly ~d&s == s. So the simplified
* result is: */
CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
/* calculate the borrow chain --- modified such that d=0.
- * substitutiing d=0 into bc= res&(~d|s)|(~d&s); (the one used for
+ * substituting d=0 into bc= res&(~d|s)|(~d&s); (the one used for
* sub) and simplifying, since ~d=0xff..., ~d|s == 0xffff..., and
* res&0xfff... == res. Similarly ~d&s == s. So the simplified
* result is: */
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