The AMD756 requires a delay before reading the number of ports from the

controller to avoid getting 0 from it; from NetBSD.

diff --git a/sys/dev/usb/ohci.c b/sys/dev/usb/ohci.c
index b7bdf7d..8367d6b 100644 (file)
--- a/sys/dev/usb/ohci.c
+++ b/sys/dev/usb/ohci.c
@@ -1,5 +1,5 @@
-/*     $OpenBSD: ohci.c,v 1.10 2000/03/30 16:19:32 aaron Exp $ */
-/*     $NetBSD: ohci.c,v 1.84 2000/03/29 18:24:53 augustss Exp $       */
+/*     $OpenBSD: ohci.c,v 1.11 2000/04/01 19:11:35 aaron Exp $ */
+/*     $NetBSD: ohci.c,v 1.85 2000/04/01 09:27:35 augustss Exp $       */
 /*     $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $       */
 
 /*
@@ -851,9 +851,14 @@ ohci_init(sc)
        desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
        OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP);
        OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */
-       usb_delay_ms(&sc->sc_bus, 5);
+       usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY);
        OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca);
 
+       /*
+        * The AMD756 requires a delay before re-reading the register,
+        * otherwise it will occasionally report 0 ports.
+        */
+       usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY);
        sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A));
 
 #ifdef OHCI_DEBUG

diff --git a/sys/dev/usb/ohcireg.h b/sys/dev/usb/ohcireg.h
index d129720..ad74fd3 100644 (file)
--- a/sys/dev/usb/ohcireg.h
+++ b/sys/dev/usb/ohcireg.h
@@ -1,5 +1,5 @@
-/*     $OpenBSD: ohcireg.h,v 1.6 2000/03/30 16:19:32 aaron Exp $ */
-/*     $NetBSD: ohcireg.h,v 1.16 2000/03/29 01:46:27 augustss Exp $    */
+/*     $OpenBSD: ohcireg.h,v 1.7 2000/04/01 19:11:36 aaron Exp $ */
+/*     $NetBSD: ohcireg.h,v 1.17 2000/04/01 09:27:35 augustss Exp $    */
 /*     $FreeBSD: src/sys/dev/usb/ohcireg.h,v 1.8 1999/11/17 22:33:40 n_hibma Exp $     */
 
 
@@ -242,4 +242,8 @@ typedef struct {
 #define OHCI_CC_BUFFER_UNDERRUN                13
 #define OHCI_CC_NOT_ACCESSED           15
 
+/* Some delay needed when changing certain registers. */
+#define OHCI_ENABLE_POWER_DELAY        5
+#define OHCI_READ_DESC_DELAY   5
+
 #endif /* _DEV_PCI_OHCIREG_H_ */