-/* $OpenBSD: sxiccmu.c,v 1.17 2017/12/31 10:54:39 kettenis Exp $ */
+/* $OpenBSD: sxiccmu.c,v 1.18 2018/02/10 22:31:34 kettenis Exp $ */
/*
* Copyright (c) 2007,2009 Dale Rahn <drahn@openbsd.org>
* Copyright (c) 2013 Artturi Alm
OF_is_compatible(node, "allwinner,sun9i-a80-usb-clks") ||
OF_is_compatible(node, "allwinner,sun9i-a80-mmc-config-clk") ||
OF_is_compatible(node, "allwinner,sun50i-a64-ccu") ||
+ OF_is_compatible(node, "allwinner,sun50i-a64-r-ccu") ||
OF_is_compatible(node, "allwinner,sun50i-h5-ccu"));
}
sc->sc_nresets = nitems(sun8i_h3_resets);
sc->sc_get_frequency = sxiccmu_h3_get_frequency;
sc->sc_set_frequency = sxiccmu_h3_set_frequency;
- } else if (OF_is_compatible(node, "allwinner,sun8i-h3-r-ccu")) {
+ } else if (OF_is_compatible(node, "allwinner,sun8i-h3-r-ccu") ||
+ OF_is_compatible(node, "allwinner,sun50i-a64-r-ccu")) {
KASSERT(faa->fa_nreg > 0);
sc->sc_gates = sun8i_h3_r_gates;
sc->sc_ngates = nitems(sun8i_h3_r_gates);
#define A64_CLK_HOSC 253
struct sxiccmu_ccu_bit sun50i_a64_gates[] = {
+ [A64_CLK_PLL_PERIPH0] = { 0x0028, 31 },
[A64_CLK_BUS_MMC0] = { 0x0060, 8 },
[A64_CLK_BUS_MMC1] = { 0x0060, 9 },
[A64_CLK_BUS_MMC2] = { 0x0060, 10 },
#define H3_R_CLK_APB0 2
#define H3_R_CLK_APB0_PIO 3
+#define H3_R_CLK_APB0_RSB 6
#define H3_R_CLK_APB0_I2C 9
struct sxiccmu_ccu_bit sun8i_h3_r_gates[] = {
[H3_R_CLK_APB0_PIO] = { 0x0028, 0 },
+ [H3_R_CLK_APB0_RSB] = { 0x0028, 3, H3_R_CLK_APB0 },
[H3_R_CLK_APB0_I2C] = { 0x0028, 6, H3_R_CLK_APB0 },
};
[H3_RST_BUS_I2C2] = { 0x02d8, 2 },
};
+#define H3_R_RST_APB0_RSB 2
#define H3_R_RST_APB0_I2C 5
struct sxiccmu_ccu_bit sun8i_h3_r_resets[] = {
+ [H3_R_RST_APB0_RSB] = { 0x00b0, 3 },
[H3_R_RST_APB0_I2C] = { 0x00b0, 6 },
};