drm/i915/dsi: add support for ICL+ native MIPI GPIO sequence

From Jani Nikula
c7229577d93d53870fd77e961143305aeec97a7b in linux-6.1.y/6.1.5
963bbdb32b47cfa67a449e715e1dcc525fbd01fc in mainline linux

diff --git a/sys/dev/pci/drm/i915/display/intel_dsi_vbt.c b/sys/dev/pci/drm/i915/display/intel_dsi_vbt.c
index 8a894b0..3dfafae 100644 (file)
--- a/sys/dev/pci/drm/i915/display/intel_dsi_vbt.c
+++ b/sys/dev/pci/drm/i915/display/intel_dsi_vbt.c
@@ -43,9 +43,11 @@
 
 #include "i915_drv.h"
 #include "i915_reg.h"
+#include "intel_de.h"
 #include "intel_display_types.h"
 #include "intel_dsi.h"
 #include "intel_dsi_vbt.h"
+#include "intel_gmbus_regs.h"
 #include "vlv_dsi.h"
 #include "vlv_dsi_regs.h"
 #include "vlv_sideband.h"
@@ -384,6 +386,85 @@ static void icl_exec_gpio(struct intel_connector *connector,
        drm_dbg_kms(&dev_priv->drm, "Skipping ICL GPIO element execution\n");
 }
 
+enum {
+       MIPI_RESET_1 = 0,
+       MIPI_AVDD_EN_1,
+       MIPI_BKLT_EN_1,
+       MIPI_AVEE_EN_1,
+       MIPI_VIO_EN_1,
+       MIPI_RESET_2,
+       MIPI_AVDD_EN_2,
+       MIPI_BKLT_EN_2,
+       MIPI_AVEE_EN_2,
+       MIPI_VIO_EN_2,
+};
+
+static void icl_native_gpio_set_value(struct drm_i915_private *dev_priv,
+                                     int gpio, bool value)
+{
+       int index;
+
+       if (drm_WARN_ON(&dev_priv->drm, DISPLAY_VER(dev_priv) == 11 && gpio >= MIPI_RESET_2))
+               return;
+
+       switch (gpio) {
+       case MIPI_RESET_1:
+       case MIPI_RESET_2:
+               index = gpio == MIPI_RESET_1 ? HPD_PORT_A : HPD_PORT_B;
+
+               /*
+                * Disable HPD to set the pin to output, and set output
+                * value. The HPD pin should not be enabled for DSI anyway,
+                * assuming the board design and VBT are sane, and the pin isn't
+                * used by a non-DSI encoder.
+                *
+                * The locking protects against concurrent SHOTPLUG_CTL_DDI
+                * modifications in irq setup and handling.
+                */
+               spin_lock_irq(&dev_priv->irq_lock);
+               intel_de_rmw(dev_priv, SHOTPLUG_CTL_DDI,
+                            SHOTPLUG_CTL_DDI_HPD_ENABLE(index) |
+                            SHOTPLUG_CTL_DDI_HPD_OUTPUT_DATA(index),
+                            value ? SHOTPLUG_CTL_DDI_HPD_OUTPUT_DATA(index) : 0);
+               spin_unlock_irq(&dev_priv->irq_lock);
+               break;
+       case MIPI_AVDD_EN_1:
+       case MIPI_AVDD_EN_2:
+               index = gpio == MIPI_AVDD_EN_1 ? 0 : 1;
+
+               intel_de_rmw(dev_priv, PP_CONTROL(index), PANEL_POWER_ON,
+                            value ? PANEL_POWER_ON : 0);
+               break;
+       case MIPI_BKLT_EN_1:
+       case MIPI_BKLT_EN_2:
+               index = gpio == MIPI_AVDD_EN_1 ? 0 : 1;
+
+               intel_de_rmw(dev_priv, PP_CONTROL(index), EDP_BLC_ENABLE,
+                            value ? EDP_BLC_ENABLE : 0);
+               break;
+       case MIPI_AVEE_EN_1:
+       case MIPI_AVEE_EN_2:
+               index = gpio == MIPI_AVEE_EN_1 ? 1 : 2;
+
+               intel_de_rmw(dev_priv, GPIO(dev_priv, index),
+                            GPIO_CLOCK_VAL_OUT,
+                            GPIO_CLOCK_DIR_MASK | GPIO_CLOCK_DIR_OUT |
+                            GPIO_CLOCK_VAL_MASK | (value ? GPIO_CLOCK_VAL_OUT : 0));
+               break;
+       case MIPI_VIO_EN_1:
+       case MIPI_VIO_EN_2:
+               index = gpio == MIPI_VIO_EN_1 ? 1 : 2;
+
+               intel_de_rmw(dev_priv, GPIO(dev_priv, index),
+                            GPIO_DATA_VAL_OUT,
+                            GPIO_DATA_DIR_MASK | GPIO_DATA_DIR_OUT |
+                            GPIO_DATA_VAL_MASK | (value ? GPIO_DATA_VAL_OUT : 0));
+               break;
+       default:
+               MISSING_CASE(gpio);
+       }
+}
+
 static const u8 *mipi_exec_gpio(struct intel_dsi *intel_dsi, const u8 *data)
 {
        struct drm_device *dev = intel_dsi->base.base.dev;
@@ -391,8 +472,7 @@ static const u8 *mipi_exec_gpio(struct intel_dsi *intel_dsi, const u8 *data)
        struct intel_connector *connector = intel_dsi->attached_connector;
        u8 gpio_source, gpio_index = 0, gpio_number;
        bool value;
-
-       drm_dbg_kms(&dev_priv->drm, "\n");
+       bool native = DISPLAY_VER(dev_priv) >= 11;
 
        if (connector->panel.vbt.dsi.seq_version >= 3)
                gpio_index = *data++;
@@ -405,10 +485,18 @@ static const u8 *mipi_exec_gpio(struct intel_dsi *intel_dsi, const u8 *data)
        else
                gpio_source = 0;
 
+       if (connector->panel.vbt.dsi.seq_version >= 4 && *data & BIT(1))
+               native = false;
+
        /* pull up/down */
        value = *data++ & 1;
 
-       if (DISPLAY_VER(dev_priv) >= 11)
+       drm_dbg_kms(&dev_priv->drm, "GPIO index %u, number %u, source %u, native %s, set to %s\n",
+                   gpio_index, gpio_number, gpio_source, str_yes_no(native), str_on_off(value));
+
+       if (native)
+               icl_native_gpio_set_value(dev_priv, gpio_number, value);
+       else if (DISPLAY_VER(dev_priv) >= 11)
                icl_exec_gpio(connector, gpio_source, gpio_index, value);
        else if (IS_VALLEYVIEW(dev_priv))
                vlv_exec_gpio(connector, gpio_source, gpio_number, value);

diff --git a/sys/dev/pci/drm/i915/i915_irq.c b/sys/dev/pci/drm/i915/i915_irq.c
index 4ab9ff4..93c2d92 100644 (file)
--- a/sys/dev/pci/drm/i915/i915_irq.c
+++ b/sys/dev/pci/drm/i915/i915_irq.c
@@ -1981,8 +1981,11 @@ static void icp_irq_handler(struct drm_i915_private *dev_priv, u32 pch_iir)
        if (ddi_hotplug_trigger) {
                u32 dig_hotplug_reg;
 
+               /* Locking due to DSI native GPIO sequences */
+               spin_lock(&dev_priv->irq_lock);
                dig_hotplug_reg = intel_uncore_read(&dev_priv->uncore, SHOTPLUG_CTL_DDI);
                intel_uncore_write(&dev_priv->uncore, SHOTPLUG_CTL_DDI, dig_hotplug_reg);
+               spin_unlock(&dev_priv->irq_lock);
 
                intel_get_hpd_pins(dev_priv, &pin_mask, &long_mask,
                                   ddi_hotplug_trigger, dig_hotplug_reg,

diff --git a/sys/dev/pci/drm/i915/i915_reg.h b/sys/dev/pci/drm/i915/i915_reg.h
index da35bb2..64eacd1 100644 (file)
--- a/sys/dev/pci/drm/i915/i915_reg.h
+++ b/sys/dev/pci/drm/i915/i915_reg.h
@@ -6035,6 +6035,7 @@
 
 #define SHOTPLUG_CTL_DDI                               _MMIO(0xc4030)
 #define   SHOTPLUG_CTL_DDI_HPD_ENABLE(hpd_pin)                 (0x8 << (_HPD_PIN_DDI(hpd_pin) * 4))
+#define   SHOTPLUG_CTL_DDI_HPD_OUTPUT_DATA(hpd_pin)            (0x4 << (_HPD_PIN_DDI(hpd_pin) * 4))
 #define   SHOTPLUG_CTL_DDI_HPD_STATUS_MASK(hpd_pin)            (0x3 << (_HPD_PIN_DDI(hpd_pin) * 4))
 #define   SHOTPLUG_CTL_DDI_HPD_NO_DETECT(hpd_pin)              (0x0 << (_HPD_PIN_DDI(hpd_pin) * 4))
 #define   SHOTPLUG_CTL_DDI_HPD_SHORT_DETECT(hpd_pin)           (0x1 << (_HPD_PIN_DDI(hpd_pin) * 4))