drm/amd/display: Fix max vstartup calculation for modes with borders

From Nicholas Kazlauskas
98b070694f4570908a0e8ea5afb68d81b0aa2051 in linux 5.10.y/5.10.57
d7940911fc0754d99b208f0e3098762d39f403a0 in mainline linux

diff --git a/sys/dev/pci/drm/amd/display/dc/dcn20/dcn20_resource.c b/sys/dev/pci/drm/amd/display/dc/dcn20/dcn20_resource.c
index 1812ec7..cfe85ba 100644 (file)
--- a/sys/dev/pci/drm/amd/display/dc/dcn20/dcn20_resource.c
+++ b/sys/dev/pci/drm/amd/display/dc/dcn20/dcn20_resource.c
@@ -2077,8 +2077,10 @@ int dcn20_populate_dml_pipes_from_context(
                                - timing->v_border_bottom;
                pipes[pipe_cnt].pipe.dest.htotal = timing->h_total;
                pipes[pipe_cnt].pipe.dest.vtotal = v_total;
-               pipes[pipe_cnt].pipe.dest.hactive = timing->h_addressable;
-               pipes[pipe_cnt].pipe.dest.vactive = timing->v_addressable;
+               pipes[pipe_cnt].pipe.dest.hactive =
+                       timing->h_addressable + timing->h_border_left + timing->h_border_right;
+               pipes[pipe_cnt].pipe.dest.vactive =
+                       timing->v_addressable + timing->v_border_top + timing->v_border_bottom;
                pipes[pipe_cnt].pipe.dest.interlaced = timing->flags.INTERLACE;
                pipes[pipe_cnt].pipe.dest.pixel_rate_mhz = timing->pix_clk_100hz/10000.0;
                if (timing->timing_3d_format == TIMING_3D_FORMAT_HW_FRAME_PACKING)