drm/amd/display: Update correct DCN314 register header

From Cruise Hung
41c666e2b7515c551940ae5ba0437bd2e17fbe85 in linux-6.1.y/6.1.43
268182606f26434c5d3ebd0e86efcb0418dec487 in mainline linux

diff --git a/sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn314.c b/sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn314.c
new file mode 100644 (file)
index 0000000..48a06db
--- /dev/null
+++ b/sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn314.c
@@ -0,0 +1,62 @@
+/*
+ * Copyright 2021 Advanced Micro Devices, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: AMD
+ *
+ */
+
+#include "../dmub_srv.h"
+#include "dmub_reg.h"
+#include "dmub_dcn314.h"
+
+#include "dcn/dcn_3_1_4_offset.h"
+#include "dcn/dcn_3_1_4_sh_mask.h"
+
+#define DCN_BASE__INST0_SEG0                       0x00000012
+#define DCN_BASE__INST0_SEG1                       0x000000C0
+#define DCN_BASE__INST0_SEG2                       0x000034C0
+#define DCN_BASE__INST0_SEG3                       0x00009000
+#define DCN_BASE__INST0_SEG4                       0x02403C00
+#define DCN_BASE__INST0_SEG5                       0
+
+#define BASE_INNER(seg) DCN_BASE__INST0_SEG##seg
+#define CTX dmub
+#define REGS dmub->regs_dcn31
+#define REG_OFFSET_EXP(reg_name) (BASE(reg##reg_name##_BASE_IDX) + reg##reg_name)
+
+/* Registers. */
+
+const struct dmub_srv_dcn31_regs dmub_srv_dcn314_regs = {
+#define DMUB_SR(reg) REG_OFFSET_EXP(reg),
+       {
+               DMUB_DCN31_REGS()
+               DMCUB_INTERNAL_REGS()
+       },
+#undef DMUB_SR
+
+#define DMUB_SF(reg, field) FD_MASK(reg, field),
+       { DMUB_DCN31_FIELDS() },
+#undef DMUB_SF
+
+#define DMUB_SF(reg, field) FD_SHIFT(reg, field),
+       { DMUB_DCN31_FIELDS() },
+#undef DMUB_SF
+};

diff --git a/sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn314.h b/sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn314.h
new file mode 100644 (file)
index 0000000..674267a
--- /dev/null
+++ b/sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn314.h
@@ -0,0 +1,33 @@
+/*
+ * Copyright 2021 Advanced Micro Devices, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: AMD
+ *
+ */
+
+#ifndef _DMUB_DCN314_H_
+#define _DMUB_DCN314_H_
+
+#include "dmub_dcn31.h"
+
+extern const struct dmub_srv_dcn31_regs dmub_srv_dcn314_regs;
+
+#endif /* _DMUB_DCN314_H_ */

diff --git a/sys/dev/pci/drm/amd/display/dmub/src/dmub_srv.c b/sys/dev/pci/drm/amd/display/dmub/src/dmub_srv.c
index 92c18bf..6d76ce3 100644 (file)
--- a/sys/dev/pci/drm/amd/display/dmub/src/dmub_srv.c
+++ b/sys/dev/pci/drm/amd/display/dmub/src/dmub_srv.c
@@ -32,6 +32,7 @@
 #include "dmub_dcn302.h"
 #include "dmub_dcn303.h"
 #include "dmub_dcn31.h"
+#include "dmub_dcn314.h"
 #include "dmub_dcn315.h"
 #include "dmub_dcn316.h"
 #include "dmub_dcn32.h"
@@ -226,7 +227,9 @@ static bool dmub_srv_hw_setup(struct dmub_srv *dmub, enum dmub_asic asic)
        case DMUB_ASIC_DCN314:
        case DMUB_ASIC_DCN315:
        case DMUB_ASIC_DCN316:
-               if (asic == DMUB_ASIC_DCN315)
+               if (asic == DMUB_ASIC_DCN314)
+                       dmub->regs_dcn31 = &dmub_srv_dcn314_regs;
+               else if (asic == DMUB_ASIC_DCN315)
                        dmub->regs_dcn31 = &dmub_srv_dcn315_regs;
                else if (asic == DMUB_ASIC_DCN316)
                        dmub->regs_dcn31 = &dmub_srv_dcn316_regs;

diff --git a/sys/dev/pci/drm/files.drm b/sys/dev/pci/drm/files.drm
index 3808ea5..609574d 100644 (file)
--- a/sys/dev/pci/drm/files.drm
+++ b/sys/dev/pci/drm/files.drm
@@ -1,4 +1,4 @@
-# $OpenBSD: files.drm,v 1.59 2023/01/01 01:34:34 jsg Exp $
+# $OpenBSD: files.drm,v 1.60 2023/08/04 08:49:46 jsg Exp $
 
 #file  dev/pci/drm/aperture.c          drm
 file   dev/pci/drm/dma-resv.c                  drm
@@ -1182,6 +1182,7 @@ file      dev/pci/drm/amd/display/dmub/src/dmub_dcn301.c          amdgpu
 file   dev/pci/drm/amd/display/dmub/src/dmub_dcn302.c          amdgpu
 file   dev/pci/drm/amd/display/dmub/src/dmub_dcn303.c          amdgpu
 file   dev/pci/drm/amd/display/dmub/src/dmub_dcn31.c           amdgpu
+file   dev/pci/drm/amd/display/dmub/src/dmub_dcn314.c          amdgpu
 file   dev/pci/drm/amd/display/dmub/src/dmub_dcn315.c          amdgpu
 file   dev/pci/drm/amd/display/dmub/src/dmub_dcn316.c          amdgpu
 file   dev/pci/drm/amd/display/dmub/src/dmub_dcn32.c           amdgpu