Add support for RTL8153D.

The RTL8153D chipset shares many similarities with the already supported
RTL8156B chip but additionally requires a few semi-unique configurations.

Tested by weerd@
ok jmatthew@

diff --git a/sys/dev/usb/if_ure.c b/sys/dev/usb/if_ure.c
index 6793824..0c8bace 100644 (file)
--- a/sys/dev/usb/if_ure.c
+++ b/sys/dev/usb/if_ure.c
@@ -1,4 +1,4 @@
-/*     $OpenBSD: if_ure.c,v 1.31 2022/10/27 13:21:14 patrick Exp $     */
+/*     $OpenBSD: if_ure.c,v 1.32 2023/05/06 08:07:10 kevlo Exp $       */
 /*-
  * Copyright (c) 2015, 2016, 2019 Kevin Lo <kevlo@openbsd.org>
  * Copyright (c) 2020 Jonathon Fletcher <jonathon.fletcher@gmail.com>
@@ -270,7 +270,7 @@ ure_read_1(struct ure_softc *sc, uint16_t reg, uint16_t index)
 
        shift = (reg & 3) << 3;
        reg &= ~3;
-       
+
        ure_read_mem(sc, reg, index, &temp, 4);
        val = UGETDW(temp);
        val >>= shift;
@@ -466,8 +466,8 @@ ure_ifmedia_init(struct ifnet *ifp)
 
                reg = sc->ure_rxbufsz - URE_FRAMELEN(ifp->if_mtu) -
                    sizeof(struct ure_rxpkt) - URE_RX_BUF_ALIGN;
-               if (sc->ure_flags & (URE_FLAG_8153B | URE_FLAG_8156 |
-                   URE_FLAG_8156B)) {
+               if (sc->ure_flags &
+                   (URE_FLAG_8153B | URE_FLAG_8156 | URE_FLAG_8156B)) {
                        ure_write_2(sc, URE_USB_RX_EARLY_SIZE, URE_MCU_TYPE_USB,
                            reg / 8);
 
@@ -493,6 +493,11 @@ ure_ifmedia_init(struct ifnet *ifp)
                            reg);
                }
 
+               if (sc->ure_chip & URE_CHIP_VER_7420) {
+                       URE_SETBIT_2(sc, URE_PLA_MAC_PWR_CTRL4,
+                           URE_MCU_TYPE_PLA, URE_IDLE_SPDWN_EN);
+               }
+
                if ((sc->ure_chip & URE_CHIP_VER_6010) ||
                    (sc->ure_flags & URE_FLAG_8156B)) {
                        URE_CLRBIT_2(sc, URE_USB_FW_TASK, URE_MCU_TYPE_USB,
@@ -502,7 +507,7 @@ ure_ifmedia_init(struct ifnet *ifp)
                            URE_FC_PATCH_TASK);
                }
        }
-               
+
        /* Reset the packet filter. */
        URE_CLRBIT_2(sc, URE_PLA_FMC, URE_MCU_TYPE_PLA, URE_FMC_FCR_MCU_EN);
        URE_SETBIT_2(sc, URE_PLA_FMC, URE_MCU_TYPE_PLA, URE_FMC_FCR_MCU_EN);
@@ -530,15 +535,18 @@ ure_ifmedia_upd(struct ifnet *ifp)
                if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER)
                        return (EINVAL);
 
-               reg = ure_ocp_reg_read(sc, 0xa5d4);
-               reg &= ~URE_ADV_2500TFDX;
+               if (!(sc->ure_chip & URE_CHIP_VER_7420)) {
+                       reg = ure_ocp_reg_read(sc, URE_OCP_10GBT_CTRL);
+                       reg &= ~URE_ADV_2500TFDX;
+               }
 
                anar = gig = 0;
                switch (IFM_SUBTYPE(ifm->ifm_media)) {
                case IFM_AUTO:
                        anar |= ANAR_TX_FD | ANAR_TX | ANAR_10_FD | ANAR_10;
                        gig |= GTCR_ADV_1000TFDX | GTCR_ADV_1000THDX;
-                       reg |= URE_ADV_2500TFDX;
+                       if (!(sc->ure_chip & URE_CHIP_VER_7420))
+                               reg |= URE_ADV_2500TFDX;
                        break;
                case IFM_2500_T:
                        anar |= ANAR_TX_FD | ANAR_TX | ANAR_10_FD | ANAR_10;
@@ -566,9 +574,10 @@ ure_ifmedia_upd(struct ifnet *ifp)
                }
 
                ure_ocp_reg_write(sc, URE_OCP_BASE_MII + MII_ANAR * 2,
-                   anar | ANAR_PAUSE_ASYM | ANAR_FC); 
-               ure_ocp_reg_write(sc, URE_OCP_BASE_MII + MII_100T2CR * 2, gig); 
-               ure_ocp_reg_write(sc, 0xa5d4, reg);
+                   anar | ANAR_PAUSE_ASYM | ANAR_FC);
+               ure_ocp_reg_write(sc, URE_OCP_BASE_MII + MII_100T2CR * 2, gig);
+               if (!(sc->ure_chip & URE_CHIP_VER_7420))
+                       ure_ocp_reg_write(sc, URE_OCP_10GBT_CTRL, reg);
                ure_ocp_reg_write(sc, URE_OCP_BASE_MII + MII_BMCR,
                    BMCR_AUTOEN | BMCR_STARTNEG);
 
@@ -602,7 +611,7 @@ ure_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
                        status = ure_read_2(sc, URE_PLA_PHYSTATUS,
                            URE_MCU_TYPE_PLA);
                        if ((status & URE_PHYSTATUS_FDX) ||
-                           (status & URE_PHYSTATUS_2500MBPS)) 
+                           (status & URE_PHYSTATUS_2500MBPS))
                                ifmr->ifm_active |= IFM_FDX;
                        else
                                ifmr->ifm_active |= IFM_HDX;
@@ -634,9 +643,11 @@ ure_add_media_types(struct ure_softc *sc)
        ifmedia_add(&sc->ure_ifmedia, IFM_ETHER | IFM_1000_T, 0, NULL);
        ifmedia_add(&sc->ure_ifmedia, IFM_ETHER | IFM_1000_T | IFM_FDX, 0,
            NULL);
-       ifmedia_add(&sc->ure_ifmedia, IFM_ETHER | IFM_2500_T, 0, NULL);
-       ifmedia_add(&sc->ure_ifmedia, IFM_ETHER | IFM_2500_T | IFM_FDX, 0,
-           NULL);
+       if (!(sc->ure_chip & URE_CHIP_VER_7420)) {
+               ifmedia_add(&sc->ure_ifmedia, IFM_ETHER | IFM_2500_T, 0, NULL);
+               ifmedia_add(&sc->ure_ifmedia, IFM_ETHER | IFM_2500_T | IFM_FDX,
+                   0, NULL);
+       }
 }
 
 void
@@ -929,7 +940,7 @@ ure_start(struct ifnet *ifp)
                        continue;
                }
 
-               /* 
+               /*
                 * If packet larger than remaining space, send buffer and
                 * continue.
                 */
@@ -1176,12 +1187,12 @@ ure_rtl8153_init(struct ure_softc *sc)
        }
 
        URE_SETBIT_1(sc, URE_USB_CSR_DUMMY2, URE_MCU_TYPE_USB, URE_EP4_FULL_FC);
-       
+
        URE_CLRBIT_2(sc, URE_USB_WDT11_CTRL, URE_MCU_TYPE_USB, URE_TIMER11_EN);
 
        URE_CLRBIT_2(sc, URE_PLA_LED_FEATURE, URE_MCU_TYPE_PLA,
            URE_LED_MODE_MASK);
-           
+
        if ((sc->ure_chip & URE_CHIP_VER_5C10) &&
            sc->ure_udev->speed != USB_SPEED_SUPER)
                reg = URE_LPM_TIMER_500MS;
@@ -1269,7 +1280,7 @@ ure_rtl8153b_init(struct ure_softc *sc)
        URE_CLRBIT_1(sc, URE_USB_POWER_CUT, URE_MCU_TYPE_USB,
            URE_UPS_EN | URE_USP_PREWAKE);
        URE_CLRBIT_1(sc, URE_USB_MISC_2, URE_MCU_TYPE_USB,
-           URE_UPS_FORCE_PWR_DOWN);
+           URE_UPS_FORCE_PWR_DOWN | URE_UPS_NO_UPS);
 
        URE_CLRBIT_1(sc, URE_PLA_INDICATE_FALG, URE_MCU_TYPE_PLA,
            URE_UPCOMING_RUNTIME_D3);
@@ -1318,7 +1329,7 @@ ure_rtl8153b_init(struct ure_softc *sc)
                URE_SETBIT_2(sc, URE_USB_FW_TASK, URE_MCU_TYPE_USB,
                    URE_FC_PATCH_TASK);
        }
-       
+
        /* MAC clock speed down. */
        if (sc->ure_flags & (URE_FLAG_8156 | URE_FLAG_8156B)) {
                ure_write_2(sc, URE_PLA_MAC_PWR_CTRL, URE_MCU_TYPE_PLA, 0x0403);
@@ -1350,6 +1361,17 @@ ure_rtl8153b_init(struct ure_softc *sc)
                URE_SETBIT_1(sc, URE_USB_BMU_CONFIG, URE_MCU_TYPE_USB,
                    URE_ACT_ODMA);
 
+       if (!(sc->ure_flags & URE_FLAG_8153B)) {
+               /*
+                * Select force mode through 0xa5b4 bit 15
+                * 0: MDIO force mode
+                * 1: MMD force mode
+                */
+               reg = ure_ocp_reg_read(sc, 0xa5b4);
+               if (reg & 0x8000)
+                       ure_ocp_reg_write(sc, 0xa5b4, reg & ~0x8000);
+       }
+
        URE_SETBIT_2(sc, URE_PLA_RSTTALLY, URE_MCU_TYPE_PLA, URE_TALLY_RESET);
 }
 
@@ -1523,9 +1545,7 @@ ure_rtl8153_nic_reset(struct ure_softc *sc)
 
                ure_write_4(sc, URE_USB_RX_BUF_TH, URE_MCU_TYPE_USB,
                    0x00600400);
-       }
-
-       if (!(sc->ure_flags & (URE_FLAG_8156 | URE_FLAG_8156B))) {
+       } else {
                URE_SETBIT_2(sc, URE_PLA_TCR0, URE_MCU_TYPE_PLA,
                    URE_TCR0_AUTO_FIFO);
                ure_reset(sc);
@@ -1611,7 +1631,7 @@ ure_wait_for_flash(struct ure_softc *sc)
        int i;
 
        if ((ure_read_2(sc, URE_PLA_GPHY_CTRL, URE_MCU_TYPE_PLA) &
-           URE_GPHY_FLASH) && 
+           URE_GPHY_FLASH) &&
            !(ure_read_2(sc, URE_USB_GPHY_CTRL, URE_MCU_TYPE_USB) &
            URE_BYPASS_FLASH)) {
                for (i = 0; i < 100; i++) {
@@ -1712,7 +1732,7 @@ ure_match(struct device *parent, void *match, void *aux)
 
        if (uaa->iface == NULL || uaa->configno != 1)
                return (UMATCH_NONE);
-       
+
        return (usb_lookup(ure_devs, uaa->vendor, uaa->product) != NULL ?
            UMATCH_VENDOR_PRODUCT_CONF_IFACE : UMATCH_NONE);
 }
@@ -1811,6 +1831,11 @@ ure_attach(struct device *parent, struct device *self, void *aux)
                sc->ure_flags = URE_FLAG_8156B;
                printf("RTL8156B (0x7410)");
                break;
+       case 0x7420:
+               sc->ure_flags = URE_FLAG_8156B;
+               sc->ure_chip = URE_CHIP_VER_7420;
+               printf("RTL8153D (0x7420)");
+               break;
        default:
                printf(", unknown ver %02x", ver);
                break;
@@ -1981,7 +2006,7 @@ ure_rxeof(struct usbd_xfer *xfer, void *priv, usbd_status status)
        struct mbuf             *m;
        int                     pktlen = 0, s;
        struct ure_rxpkt        rxhdr;
-       
+
        if (usbd_is_dying(sc->ure_udev))
                return;
 

diff --git a/sys/dev/usb/if_urereg.h b/sys/dev/usb/if_urereg.h
index 47b7cdb..4d61531 100644 (file)
--- a/sys/dev/usb/if_urereg.h
+++ b/sys/dev/usb/if_urereg.h
@@ -1,4 +1,4 @@
-/*     $OpenBSD: if_urereg.h,v 1.11 2022/04/02 12:22:56 kevlo Exp $    */
+/*     $OpenBSD: if_urereg.h,v 1.12 2023/05/06 08:07:10 kevlo Exp $    */
 /*-
  * Copyright (c) 2015, 2016, 2019 Kevin Lo <kevlo@openbsd.org>
  * All rights reserved.
@@ -167,6 +167,7 @@
 #define        URE_OCP_EEE_ABLE        0xa5c4
 #define        URE_OCP_EEE_ADV         0xa5d0
 #define        URE_OCP_EEE_LPABLE      0xa5d2
+#define        URE_OCP_10GBT_CTRL      0xa5d4
 #define        URE_OCP_PHY_STATE       0xa708
 #define        URE_OCP_ADC_CFG         0xbc06
 
@@ -248,19 +249,19 @@
 #define        URE_CRWECR_CONFIG       0xc0
 
 /* URE_PLA_OOB_CTRL */
-#define        URE_DIS_MCU_CLROOB      0x01    
-#define        URE_LINK_LIST_READY     0x02    
-#define        URE_RXFIFO_EMPTY        0x10    
-#define        URE_TXFIFO_EMPTY        0x20    
-#define        URE_NOW_IS_OOB          0x80    
+#define        URE_DIS_MCU_CLROOB      0x01
+#define        URE_LINK_LIST_READY     0x02
+#define        URE_RXFIFO_EMPTY        0x10
+#define        URE_TXFIFO_EMPTY        0x20
+#define        URE_NOW_IS_OOB          0x80
 #define        URE_FIFO_EMPTY          (URE_TXFIFO_EMPTY | URE_RXFIFO_EMPTY)
 
 /* URE_PLA_MISC_1 */
-#define        URE_RXDY_GATED_EN       0x0008  
+#define        URE_RXDY_GATED_EN       0x0008
 
 /* URE_PLA_SFF_STS_7 */
-#define        URE_MCU_BORW_EN         0x4000  
-#define        URE_RE_INIT_LL          0x8000  
+#define        URE_MCU_BORW_EN         0x4000
+#define        URE_RE_INIT_LL          0x8000
 
 /* URE_PLA_CPCR */
 #define        URE_FLOW_CTRL_EN        0x0001
@@ -312,6 +313,7 @@
 #define        URE_TP1000_SPDWN_EN     0x0008
 #define        URE_TP500_SPDWN_EN      0x0010
 #define        URE_TP100_SPDWN_EN      0x0020
+#define        URE_IDLE_SPDWN_EN       0x0040
 #define        URE_TX10MIDLE_EN        0x0100
 #define        URE_RXDV_SPDWN_EN       0x0800
 #define        URE_PWRSAVE_SPDWN_EN    0x1000
@@ -391,6 +393,7 @@
 
 /* URE_USB_MISC_2 */
 #define        URE_UPS_FORCE_PWR_DOWN  0x01
+#define        URE_UPS_NO_UPS          0x80
 
 /* URE_USB_ECM_OPTION */
 #define        URE_BYPASS_MAC_RESET    0x0020
@@ -493,15 +496,15 @@
 #define URE_UPS_FLAGS_MASK     0xffffffff
 
 /* URE_OCP_ALDPS_CONFIG */
-#define        URE_ENPWRSAVE           0x8000  
-#define        URE_ENPDNPS             0x0200  
-#define        URE_LINKENA             0x0100  
+#define        URE_ENPWRSAVE           0x8000
+#define        URE_ENPDNPS             0x0200
+#define        URE_LINKENA             0x0100
 #define        URE_DIS_SDSAVE          0x0010
 
 /* URE_OCP_PHY_STATUS */
 #define        URE_PHY_STAT_MASK       0x0007
 #define        URE_PHY_STAT_EXT_INIT   2
-#define        URE_PHY_STAT_LAN_ON     3       
+#define        URE_PHY_STAT_LAN_ON     3
 #define        URE_PHY_STAT_PWRDN      5
 
 /* URE_OCP_POWER_CFG */
@@ -646,4 +649,5 @@ struct ure_softc {
 #define        URE_CHIP_VER_5C20       0x10
 #define        URE_CHIP_VER_5C30       0x20
 #define        URE_CHIP_VER_6010       0x40
+#define        URE_CHIP_VER_7420       0x80
 };