drm/amdgpu: implement IRQ_STATE_ENABLE for SDMA v4.4.2

From Tao Zhou
c0beff4e35af8ef3f5e30ac3f55a6109f751d9c0 in linux-6.6.y/6.6.31
f886b49feaae30acd599e37d4284836024b0f3ed in mainline linux

diff --git a/sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c b/sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c
index a8f2d88..f624b1b 100644 (file)
--- a/sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c
+++ b/sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c
@@ -1613,19 +1613,9 @@ static int sdma_v4_4_2_set_ecc_irq_state(struct amdgpu_device *adev,
        u32 sdma_cntl;
 
        sdma_cntl = RREG32_SDMA(type, regSDMA_CNTL);
-       switch (state) {
-       case AMDGPU_IRQ_STATE_DISABLE:
-               sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA_CNTL,
-                                         DRAM_ECC_INT_ENABLE, 0);
-               WREG32_SDMA(type, regSDMA_CNTL, sdma_cntl);
-               break;
-       /* sdma ecc interrupt is enabled by default
-        * driver doesn't need to do anything to
-        * enable the interrupt */
-       case AMDGPU_IRQ_STATE_ENABLE:
-       default:
-               break;
-       }
+       sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA_CNTL, DRAM_ECC_INT_ENABLE,
+                                       state == AMDGPU_IRQ_STATE_ENABLE ? 1 : 0);
+       WREG32_SDMA(type, regSDMA_CNTL, sdma_cntl);
 
        return 0;
 }