recognise a small number of riscv relocations in readelf

ok kettenis@

diff --git a/gnu/usr.bin/binutils-2.17/binutils/readelf.c b/gnu/usr.bin/binutils-2.17/binutils/readelf.c
index 7a95a04..507520f 100644 (file)
--- a/gnu/usr.bin/binutils-2.17/binutils/readelf.c
+++ b/gnu/usr.bin/binutils-2.17/binutils/readelf.c
@@ -103,6 +103,7 @@
 #include "elf/pj.h"
 #include "elf/ppc.h"
 #include "elf/ppc64.h"
+#include "elf/riscv.h"
 #include "elf/s390.h"
 #include "elf/sh.h"
 #include "elf/sparc.h"
@@ -618,6 +619,7 @@ guess_is_rela (unsigned long e_machine)
     case EM_ALTERA_NIOS2:
     case EM_88K:
     case EM_AARCH64:
+    case EM_RISCV:
       return TRUE;
 
     case EM_MMA:
@@ -1145,6 +1147,10 @@ dump_relocations (FILE *file,
        case EM_AARCH64:
          rtype = elf_aarch64_reloc_type (type);
          break;
+
+       case EM_RISCV:
+         rtype = elf_riscv_reloc_type (type);
+         break;
        }
 
       if (rtype == NULL)

diff --git a/gnu/usr.bin/binutils-2.17/include/elf/common.h b/gnu/usr.bin/binutils-2.17/include/elf/common.h
index 8a4220d..37efa3b 100644 (file)
--- a/gnu/usr.bin/binutils-2.17/include/elf/common.h
+++ b/gnu/usr.bin/binutils-2.17/include/elf/common.h
@@ -186,6 +186,7 @@
 #define EM_ALTERA_NIOS2        113     /* Altera Nios II soft-core processor */
 #define EM_CRX         114     /* National Semiconductor CRX */
 #define EM_AARCH64     183 
+#define EM_RISCV       243
 
 /* If it is necessary to assign new unofficial EM_* values, please pick large
    random numbers (0x8523, 0xa7f2, etc.) to minimize the chances of collision

diff --git a/gnu/usr.bin/binutils-2.17/include/elf/riscv.h b/gnu/usr.bin/binutils-2.17/include/elf/riscv.h
new file mode 100644 (file)
index 0000000..52ceb96
--- /dev/null
+++ b/gnu/usr.bin/binutils-2.17/include/elf/riscv.h
@@ -0,0 +1,34 @@
+/* RISC-V ELF support for BFD.
+ * Copyright (c) 2017 Philip Guenther <guenther@openbsd.org>
+ *
+ * Permission to use, copy, modify, and distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#ifndef _ELF_RISCV_H
+#define _ELF_RISCV_H
+
+#include "elf/reloc-macros.h"
+
+START_RELOC_NUMBERS (elf_riscv_reloc_type )
+     RELOC_NUMBER (R_RISCV_NONE,            0)   /* No reloc */
+     RELOC_NUMBER (R_RISCV_64,              2)   /* Adjust by symbol value */
+     RELOC_NUMBER (R_RISCV_RELATIVE,        3)   /* Adjust by object base */
+     RELOC_NUMBER (R_RISCV_COPY,            4)   /* Copy symbol at runtime */
+     RELOC_NUMBER (R_RISCV_JUMP_SLOT,       5)   /* Create PLT entry */
+     RELOC_NUMBER (R_RISCV_TLS_DTPMOD64,    7)   /* Dynamic TLS module */
+     RELOC_NUMBER (R_RISCV_TLS_DTPREL64,    9)   /* Dynamic TLS offset */
+     RELOC_NUMBER (R_RISCV_TLS_TPREL64,    11)   /* Thread pointer relative */
+     RELOC_NUMBER (R_RISCV_IRELATIVE,      58)   /* Indirect relative */
+END_RELOC_NUMBERS (R_RISCV_max)
+
+#endif