Move SC_* defines into <machine/setjmp.h>, and rename them,

so that <machine/signal.h> is not needed in setjmp.S.

Suggested by kettenis@ long ago, OK deraadt@

diff --git a/lib/libc/arch/mips64/gen/_setjmp.S b/lib/libc/arch/mips64/gen/_setjmp.S
index 5e32f99..12208f5 100644 (file)
--- a/lib/libc/arch/mips64/gen/_setjmp.S
+++ b/lib/libc/arch/mips64/gen/_setjmp.S
@@ -1,4 +1,4 @@
-/*     $OpenBSD: _setjmp.S,v 1.7 2016/05/30 02:06:02 guenther Exp $ */
+/*     $OpenBSD: _setjmp.S,v 1.8 2018/01/08 16:44:32 visa Exp $ */
 
 /*
  * Copyright (c) 2002 Opsycon AB  (www.opsycon.se / www.opsycon.com)
@@ -31,7 +31,7 @@
 
 #include "SYS.h"
 #include <machine/regnum.h>
-#include <machine/signal.h>
+#include <machine/setjmp.h>
 
        .globl  __jmpxor
 
@@ -51,57 +51,57 @@ LEAF(_setjmp, FRAMESZ)
        SETUP_GP64(GPOFF, _setjmp)
        .set    noreorder
        LI      v0, 0xACEDBADE                  # sigcontext magic number
-       REG_S   v0, SC_REGS+ZERO*REGSZ(a0)
-       REG_S   s0, SC_REGS+S0*REGSZ(a0)
-       REG_S   s1, SC_REGS+S1*REGSZ(a0)
-       REG_S   s2, SC_REGS+S2*REGSZ(a0)
-       REG_S   s3, SC_REGS+S3*REGSZ(a0)
-       REG_S   s4, SC_REGS+S4*REGSZ(a0)
-       REG_S   s5, SC_REGS+S5*REGSZ(a0)
-       REG_S   s6, SC_REGS+S6*REGSZ(a0)
-       REG_S   s7, SC_REGS+S7*REGSZ(a0)
-       REG_S   s8, SC_REGS+S8*REGSZ(a0)
+       REG_S   v0, _JB_REGS+ZERO*REGSZ(a0)
+       REG_S   s0, _JB_REGS+S0*REGSZ(a0)
+       REG_S   s1, _JB_REGS+S1*REGSZ(a0)
+       REG_S   s2, _JB_REGS+S2*REGSZ(a0)
+       REG_S   s3, _JB_REGS+S3*REGSZ(a0)
+       REG_S   s4, _JB_REGS+S4*REGSZ(a0)
+       REG_S   s5, _JB_REGS+S5*REGSZ(a0)
+       REG_S   s6, _JB_REGS+S6*REGSZ(a0)
+       REG_S   s7, _JB_REGS+S7*REGSZ(a0)
+       REG_S   s8, _JB_REGS+S8*REGSZ(a0)
        LA      t0, __jmpxor                    # load cookie addr
        REG_L   v0, 0(t0)                       # load gp cookie
        REG_L   v1, GPOFF(sp)
        xor     v0, v0, v1
-       REG_S   v0, SC_REGS+GP*REGSZ(a0)
+       REG_S   v0, _JB_REGS+GP*REGSZ(a0)
        REG_L   v0, REGSZ(t0)                   # load sp cookie over gp cookie
        PTR_ADDU v1, sp, FRAMESZ
        xor     v0, v0, v1
-       REG_S   v0, SC_REGS+SP*REGSZ(a0)
+       REG_S   v0, _JB_REGS+SP*REGSZ(a0)
        REG_L   t0, 2*REGSZ(t0)                 # load ra cookie over addr
        xor     t0, ra, t0
-       REG_S   t0, SC_PC(a0)
+       REG_S   t0, _JB_PC(a0)
        cfc1    t0, $31                         # overwrite ra cookie
 #if _MIPS_FPSET == 32
-       sdc1    $f20, SC_FPREGS+((F20-F0)*REGSZ)(a0)
-       sdc1    $f21, SC_FPREGS+((F21-F0)*REGSZ)(a0)
-       sdc1    $f22, SC_FPREGS+((F22-F0)*REGSZ)(a0)
-       sdc1    $f23, SC_FPREGS+((F23-F0)*REGSZ)(a0)
-       sdc1    $f24, SC_FPREGS+((F24-F0)*REGSZ)(a0)
-       sdc1    $f25, SC_FPREGS+((F25-F0)*REGSZ)(a0)
-       sdc1    $f26, SC_FPREGS+((F26-F0)*REGSZ)(a0)
-       sdc1    $f27, SC_FPREGS+((F27-F0)*REGSZ)(a0)
-       sdc1    $f28, SC_FPREGS+((F28-F0)*REGSZ)(a0)
-       sdc1    $f29, SC_FPREGS+((F29-F0)*REGSZ)(a0)
-       sdc1    $f30, SC_FPREGS+((F30-F0)*REGSZ)(a0)
-       sdc1    $f31, SC_FPREGS+((F31-F0)*REGSZ)(a0)
+       sdc1    $f20, _JB_FPREGS+((F20-F0)*REGSZ)(a0)
+       sdc1    $f21, _JB_FPREGS+((F21-F0)*REGSZ)(a0)
+       sdc1    $f22, _JB_FPREGS+((F22-F0)*REGSZ)(a0)
+       sdc1    $f23, _JB_FPREGS+((F23-F0)*REGSZ)(a0)
+       sdc1    $f24, _JB_FPREGS+((F24-F0)*REGSZ)(a0)
+       sdc1    $f25, _JB_FPREGS+((F25-F0)*REGSZ)(a0)
+       sdc1    $f26, _JB_FPREGS+((F26-F0)*REGSZ)(a0)
+       sdc1    $f27, _JB_FPREGS+((F27-F0)*REGSZ)(a0)
+       sdc1    $f28, _JB_FPREGS+((F28-F0)*REGSZ)(a0)
+       sdc1    $f29, _JB_FPREGS+((F29-F0)*REGSZ)(a0)
+       sdc1    $f30, _JB_FPREGS+((F30-F0)*REGSZ)(a0)
+       sdc1    $f31, _JB_FPREGS+((F31-F0)*REGSZ)(a0)
 #else
-       swc1    $f20, SC_FPREGS+((F20-F0)*REGSZ)(a0)
-       swc1    $f21, SC_FPREGS+((F21-F0)*REGSZ)(a0)
-       swc1    $f22, SC_FPREGS+((F22-F0)*REGSZ)(a0)
-       swc1    $f23, SC_FPREGS+((F23-F0)*REGSZ)(a0)
-       swc1    $f24, SC_FPREGS+((F24-F0)*REGSZ)(a0)
-       swc1    $f25, SC_FPREGS+((F25-F0)*REGSZ)(a0)
-       swc1    $f26, SC_FPREGS+((F26-F0)*REGSZ)(a0)
-       swc1    $f27, SC_FPREGS+((F27-F0)*REGSZ)(a0)
-       swc1    $f28, SC_FPREGS+((F28-F0)*REGSZ)(a0)
-       swc1    $f29, SC_FPREGS+((F29-F0)*REGSZ)(a0)
-       swc1    $f30, SC_FPREGS+((F30-F0)*REGSZ)(a0)
-       swc1    $f31, SC_FPREGS+((F31-F0)*REGSZ)(a0)
+       swc1    $f20, _JB_FPREGS+((F20-F0)*REGSZ)(a0)
+       swc1    $f21, _JB_FPREGS+((F21-F0)*REGSZ)(a0)
+       swc1    $f22, _JB_FPREGS+((F22-F0)*REGSZ)(a0)
+       swc1    $f23, _JB_FPREGS+((F23-F0)*REGSZ)(a0)
+       swc1    $f24, _JB_FPREGS+((F24-F0)*REGSZ)(a0)
+       swc1    $f25, _JB_FPREGS+((F25-F0)*REGSZ)(a0)
+       swc1    $f26, _JB_FPREGS+((F26-F0)*REGSZ)(a0)
+       swc1    $f27, _JB_FPREGS+((F27-F0)*REGSZ)(a0)
+       swc1    $f28, _JB_FPREGS+((F28-F0)*REGSZ)(a0)
+       swc1    $f29, _JB_FPREGS+((F29-F0)*REGSZ)(a0)
+       swc1    $f30, _JB_FPREGS+((F30-F0)*REGSZ)(a0)
+       swc1    $f31, _JB_FPREGS+((F31-F0)*REGSZ)(a0)
 #endif
-       REG_S   t0, SC_FPREGS+((FSR-F0)*REGSZ)(a0)
+       REG_S   t0, _JB_FPREGS+((FSR-F0)*REGSZ)(a0)
        RESTORE_GP64
        PTR_ADDU sp, FRAMESZ
        j       ra
@@ -112,55 +112,55 @@ LEAF(_longjmp, FRAMESZ)
        PTR_SUBU sp, FRAMESZ
        SETUP_GP64(GPOFF, _longjmp)
        .set    noreorder
-       REG_L   v0, SC_REGS+ZERO*REGSZ(a0)
+       REG_L   v0, _JB_REGS+ZERO*REGSZ(a0)
        bne     v0, 0xACEDBADE, botch           # jump if error
        LA      v0, __jmpxor                    # load cookie addr
        REG_L   v1, 2*REGSZ(v0)                 # load ra cookie
-       REG_L   ra, SC_PC(a0)
+       REG_L   ra, _JB_PC(a0)
        xor     ra, ra, v1
-       REG_L   s0, SC_REGS+S0*REGSZ(a0)
-       REG_L   s1, SC_REGS+S1*REGSZ(a0)
-       REG_L   s2, SC_REGS+S2*REGSZ(a0)
-       REG_L   s3, SC_REGS+S3*REGSZ(a0)
-       REG_L   s4, SC_REGS+S4*REGSZ(a0)
-       REG_L   s5, SC_REGS+S5*REGSZ(a0)
-       REG_L   s6, SC_REGS+S6*REGSZ(a0)
-       REG_L   s7, SC_REGS+S7*REGSZ(a0)
-       REG_L   s8, SC_REGS+S8*REGSZ(a0)
+       REG_L   s0, _JB_REGS+S0*REGSZ(a0)
+       REG_L   s1, _JB_REGS+S1*REGSZ(a0)
+       REG_L   s2, _JB_REGS+S2*REGSZ(a0)
+       REG_L   s3, _JB_REGS+S3*REGSZ(a0)
+       REG_L   s4, _JB_REGS+S4*REGSZ(a0)
+       REG_L   s5, _JB_REGS+S5*REGSZ(a0)
+       REG_L   s6, _JB_REGS+S6*REGSZ(a0)
+       REG_L   s7, _JB_REGS+S7*REGSZ(a0)
+       REG_L   s8, _JB_REGS+S8*REGSZ(a0)
        REG_L   v1, 0(v0)                       # load gp cookie over ra cookie
-       REG_L   gp, SC_REGS+GP*REGSZ(a0)
+       REG_L   gp, _JB_REGS+GP*REGSZ(a0)
        xor     gp, gp, v1
        REG_L   v1, REGSZ(v0)                   # load sp cookie over gp cookie
-       REG_L   sp, SC_REGS+SP*REGSZ(a0)
+       REG_L   sp, _JB_REGS+SP*REGSZ(a0)
        xor     sp, sp, v1
-       REG_L   v1, SC_FPREGS+((FSR-F0)*REGSZ)(a0)      # overwrite sp cookie
+       REG_L   v1, _JB_FPREGS+((FSR-F0)*REGSZ)(a0)     # overwrite sp cookie
        ctc1    v1, $31
 #if _MIPS_FPSET == 32
-       ldc1    $f20, SC_FPREGS+((F20-F0)*REGSZ)(a0)
-       ldc1    $f21, SC_FPREGS+((F21-F0)*REGSZ)(a0)
-       ldc1    $f22, SC_FPREGS+((F22-F0)*REGSZ)(a0)
-       ldc1    $f23, SC_FPREGS+((F23-F0)*REGSZ)(a0)
-       ldc1    $f24, SC_FPREGS+((F24-F0)*REGSZ)(a0)
-       ldc1    $f25, SC_FPREGS+((F25-F0)*REGSZ)(a0)
-       ldc1    $f26, SC_FPREGS+((F26-F0)*REGSZ)(a0)
-       ldc1    $f27, SC_FPREGS+((F27-F0)*REGSZ)(a0)
-       ldc1    $f28, SC_FPREGS+((F28-F0)*REGSZ)(a0)
-       ldc1    $f29, SC_FPREGS+((F29-F0)*REGSZ)(a0)
-       ldc1    $f30, SC_FPREGS+((F30-F0)*REGSZ)(a0)
-       ldc1    $f31, SC_FPREGS+((F31-F0)*REGSZ)(a0)
+       ldc1    $f20, _JB_FPREGS+((F20-F0)*REGSZ)(a0)
+       ldc1    $f21, _JB_FPREGS+((F21-F0)*REGSZ)(a0)
+       ldc1    $f22, _JB_FPREGS+((F22-F0)*REGSZ)(a0)
+       ldc1    $f23, _JB_FPREGS+((F23-F0)*REGSZ)(a0)
+       ldc1    $f24, _JB_FPREGS+((F24-F0)*REGSZ)(a0)
+       ldc1    $f25, _JB_FPREGS+((F25-F0)*REGSZ)(a0)
+       ldc1    $f26, _JB_FPREGS+((F26-F0)*REGSZ)(a0)
+       ldc1    $f27, _JB_FPREGS+((F27-F0)*REGSZ)(a0)
+       ldc1    $f28, _JB_FPREGS+((F28-F0)*REGSZ)(a0)
+       ldc1    $f29, _JB_FPREGS+((F29-F0)*REGSZ)(a0)
+       ldc1    $f30, _JB_FPREGS+((F30-F0)*REGSZ)(a0)
+       ldc1    $f31, _JB_FPREGS+((F31-F0)*REGSZ)(a0)
 #else
-       lwc1    $f20, SC_FPREGS+((F20-F0)*REGSZ)(a0)
-       lwc1    $f21, SC_FPREGS+((F21-F0)*REGSZ)(a0)
-       lwc1    $f22, SC_FPREGS+((F22-F0)*REGSZ)(a0)
-       lwc1    $f23, SC_FPREGS+((F23-F0)*REGSZ)(a0)
-       lwc1    $f24, SC_FPREGS+((F24-F0)*REGSZ)(a0)
-       lwc1    $f25, SC_FPREGS+((F25-F0)*REGSZ)(a0)
-       lwc1    $f26, SC_FPREGS+((F26-F0)*REGSZ)(a0)
-       lwc1    $f27, SC_FPREGS+((F27-F0)*REGSZ)(a0)
-       lwc1    $f28, SC_FPREGS+((F28-F0)*REGSZ)(a0)
-       lwc1    $f29, SC_FPREGS+((F29-F0)*REGSZ)(a0)
-       lwc1    $f30, SC_FPREGS+((F30-F0)*REGSZ)(a0)
-       lwc1    $f31, SC_FPREGS+((F31-F0)*REGSZ)(a0)
+       lwc1    $f20, _JB_FPREGS+((F20-F0)*REGSZ)(a0)
+       lwc1    $f21, _JB_FPREGS+((F21-F0)*REGSZ)(a0)
+       lwc1    $f22, _JB_FPREGS+((F22-F0)*REGSZ)(a0)
+       lwc1    $f23, _JB_FPREGS+((F23-F0)*REGSZ)(a0)
+       lwc1    $f24, _JB_FPREGS+((F24-F0)*REGSZ)(a0)
+       lwc1    $f25, _JB_FPREGS+((F25-F0)*REGSZ)(a0)
+       lwc1    $f26, _JB_FPREGS+((F26-F0)*REGSZ)(a0)
+       lwc1    $f27, _JB_FPREGS+((F27-F0)*REGSZ)(a0)
+       lwc1    $f28, _JB_FPREGS+((F28-F0)*REGSZ)(a0)
+       lwc1    $f29, _JB_FPREGS+((F29-F0)*REGSZ)(a0)
+       lwc1    $f30, _JB_FPREGS+((F30-F0)*REGSZ)(a0)
+       lwc1    $f31, _JB_FPREGS+((F31-F0)*REGSZ)(a0)
 #endif
        beql    a1, zero, 1f
        li      a1, 1           # only executed if branch taken.

diff --git a/lib/libc/arch/mips64/gen/setjmp.S b/lib/libc/arch/mips64/gen/setjmp.S
index 87235ca..9574804 100644 (file)
--- a/lib/libc/arch/mips64/gen/setjmp.S
+++ b/lib/libc/arch/mips64/gen/setjmp.S
@@ -1,4 +1,4 @@
-/*     $OpenBSD: setjmp.S,v 1.11 2016/05/30 02:06:02 guenther Exp $ */
+/*     $OpenBSD: setjmp.S,v 1.12 2018/01/08 16:44:32 visa Exp $ */
 
 /*
  * Copyright (c) 2001-2002 Opsycon AB  (www.opsycon.se / www.opsycon.com)
@@ -31,7 +31,7 @@
 
 #include "SYS.h"
 #include <machine/regnum.h>
-#include <machine/signal.h>
+#include <machine/setjmp.h>
 
        .section        .openbsd.randomdata,"aw",@progbits
        .balign 8
@@ -62,60 +62,60 @@ LEAF(setjmp, FRAMESZ)
        li      v0, SYS_sigprocmask
        syscall                                 # mask in v0
        bne     a3, zero, botch
-       REG_S   v0, SC_MASK(a2)                 # save sc_mask
+       REG_S   v0, _JB_MASK(a2)                # save sc_mask
 
        LI      v0, 0xACEDBADE                  # sigcontext magic number
-       REG_S   v0, SC_REGS+ZERO*REGSZ(a2)
-       REG_S   s0, SC_REGS+S0*REGSZ(a2)
-       REG_S   s1, SC_REGS+S1*REGSZ(a2)
-       REG_S   s2, SC_REGS+S2*REGSZ(a2)
-       REG_S   s3, SC_REGS+S3*REGSZ(a2)
-       REG_S   s4, SC_REGS+S4*REGSZ(a2)
-       REG_S   s5, SC_REGS+S5*REGSZ(a2)
-       REG_S   s6, SC_REGS+S6*REGSZ(a2)
-       REG_S   s7, SC_REGS+S7*REGSZ(a2)
-       REG_S   s8, SC_REGS+S8*REGSZ(a2)
+       REG_S   v0, _JB_REGS+ZERO*REGSZ(a2)
+       REG_S   s0, _JB_REGS+S0*REGSZ(a2)
+       REG_S   s1, _JB_REGS+S1*REGSZ(a2)
+       REG_S   s2, _JB_REGS+S2*REGSZ(a2)
+       REG_S   s3, _JB_REGS+S3*REGSZ(a2)
+       REG_S   s4, _JB_REGS+S4*REGSZ(a2)
+       REG_S   s5, _JB_REGS+S5*REGSZ(a2)
+       REG_S   s6, _JB_REGS+S6*REGSZ(a2)
+       REG_S   s7, _JB_REGS+S7*REGSZ(a2)
+       REG_S   s8, _JB_REGS+S8*REGSZ(a2)
        LA      t0, __jmpxor                    # load cookie addr
        REG_L   v0, 0(t0)                       # load gp cookie
        REG_L   v1, GPOFF(sp)
        xor     v0, v0, v1
-       REG_S   v0, SC_REGS+GP*REGSZ(a2)
+       REG_S   v0, _JB_REGS+GP*REGSZ(a2)
        REG_L   v0, REGSZ(t0)                   # load sp cookie over gp cookie
        PTR_ADDU v1, sp, FRAMESZ
        xor     v0, v0, v1
-       REG_S   v0, SC_REGS+SP*REGSZ(a2)
+       REG_S   v0, _JB_REGS+SP*REGSZ(a2)
        REG_L   t0, 2*REGSZ(t0)                 # load ra cookie over addr
        xor     t0, ra, t0
-       REG_S   t0, SC_PC(a2)
+       REG_S   t0, _JB_PC(a2)
        cfc1    t0, $31                         # overwrite ra cookie
 #if _MIPS_FPSET == 32
-       sdc1    $f20, SC_FPREGS+((F20-F0)*REGSZ)(a2)
-       sdc1    $f21, SC_FPREGS+((F21-F0)*REGSZ)(a2)
-       sdc1    $f22, SC_FPREGS+((F22-F0)*REGSZ)(a2)
-       sdc1    $f23, SC_FPREGS+((F23-F0)*REGSZ)(a2)
-       sdc1    $f24, SC_FPREGS+((F24-F0)*REGSZ)(a2)
-       sdc1    $f25, SC_FPREGS+((F25-F0)*REGSZ)(a2)
-       sdc1    $f26, SC_FPREGS+((F26-F0)*REGSZ)(a2)
-       sdc1    $f27, SC_FPREGS+((F27-F0)*REGSZ)(a2)
-       sdc1    $f28, SC_FPREGS+((F28-F0)*REGSZ)(a2)
-       sdc1    $f29, SC_FPREGS+((F29-F0)*REGSZ)(a2)
-       sdc1    $f30, SC_FPREGS+((F30-F0)*REGSZ)(a2)
-       sdc1    $f31, SC_FPREGS+((F31-F0)*REGSZ)(a2)
+       sdc1    $f20, _JB_FPREGS+((F20-F0)*REGSZ)(a2)
+       sdc1    $f21, _JB_FPREGS+((F21-F0)*REGSZ)(a2)
+       sdc1    $f22, _JB_FPREGS+((F22-F0)*REGSZ)(a2)
+       sdc1    $f23, _JB_FPREGS+((F23-F0)*REGSZ)(a2)
+       sdc1    $f24, _JB_FPREGS+((F24-F0)*REGSZ)(a2)
+       sdc1    $f25, _JB_FPREGS+((F25-F0)*REGSZ)(a2)
+       sdc1    $f26, _JB_FPREGS+((F26-F0)*REGSZ)(a2)
+       sdc1    $f27, _JB_FPREGS+((F27-F0)*REGSZ)(a2)
+       sdc1    $f28, _JB_FPREGS+((F28-F0)*REGSZ)(a2)
+       sdc1    $f29, _JB_FPREGS+((F29-F0)*REGSZ)(a2)
+       sdc1    $f30, _JB_FPREGS+((F30-F0)*REGSZ)(a2)
+       sdc1    $f31, _JB_FPREGS+((F31-F0)*REGSZ)(a2)
 #else
-       swc1    $f20, SC_FPREGS+((F20-F0)*REGSZ)(a2)
-       swc1    $f21, SC_FPREGS+((F21-F0)*REGSZ)(a2)
-       swc1    $f22, SC_FPREGS+((F22-F0)*REGSZ)(a2)
-       swc1    $f23, SC_FPREGS+((F23-F0)*REGSZ)(a2)
-       swc1    $f24, SC_FPREGS+((F24-F0)*REGSZ)(a2)
-       swc1    $f25, SC_FPREGS+((F25-F0)*REGSZ)(a2)
-       swc1    $f26, SC_FPREGS+((F26-F0)*REGSZ)(a2)
-       swc1    $f27, SC_FPREGS+((F27-F0)*REGSZ)(a2)
-       swc1    $f28, SC_FPREGS+((F28-F0)*REGSZ)(a2)
-       swc1    $f29, SC_FPREGS+((F29-F0)*REGSZ)(a2)
-       swc1    $f30, SC_FPREGS+((F30-F0)*REGSZ)(a2)
-       swc1    $f31, SC_FPREGS+((F31-F0)*REGSZ)(a2)
+       swc1    $f20, _JB_FPREGS+((F20-F0)*REGSZ)(a2)
+       swc1    $f21, _JB_FPREGS+((F21-F0)*REGSZ)(a2)
+       swc1    $f22, _JB_FPREGS+((F22-F0)*REGSZ)(a2)
+       swc1    $f23, _JB_FPREGS+((F23-F0)*REGSZ)(a2)
+       swc1    $f24, _JB_FPREGS+((F24-F0)*REGSZ)(a2)
+       swc1    $f25, _JB_FPREGS+((F25-F0)*REGSZ)(a2)
+       swc1    $f26, _JB_FPREGS+((F26-F0)*REGSZ)(a2)
+       swc1    $f27, _JB_FPREGS+((F27-F0)*REGSZ)(a2)
+       swc1    $f28, _JB_FPREGS+((F28-F0)*REGSZ)(a2)
+       swc1    $f29, _JB_FPREGS+((F29-F0)*REGSZ)(a2)
+       swc1    $f30, _JB_FPREGS+((F30-F0)*REGSZ)(a2)
+       swc1    $f31, _JB_FPREGS+((F31-F0)*REGSZ)(a2)
 #endif
-       REG_S   t0, SC_FPREGS+((FSR-F0)*REGSZ)(a2)
+       REG_S   t0, _JB_FPREGS+((FSR-F0)*REGSZ)(a2)
        RESTORE_GP64
        PTR_ADDU sp, FRAMESZ
        j       ra
@@ -129,61 +129,61 @@ LEAF(longjmp, FRAMESZ)
 
        move    a2, a0                          # save jmpbuf
        move    a4, a1                          # save val
-       REG_L   a1, SC_MASK(a2)                 # load sc_mask
+       REG_L   a1, _JB_MASK(a2)                # load sc_mask
        li      a0, 3                           # how = SIG_SETMASK
        li      v0, SYS_sigprocmask
        syscall
        bne     a3, zero, botch
 
-       REG_L   v0, SC_REGS+ZERO*REGSZ(a2)
+       REG_L   v0, _JB_REGS+ZERO*REGSZ(a2)
        bne     v0, 0xACEDBADE, botch           # jump if error
        LA      v0, __jmpxor                    # load cookie addr
        REG_L   v1, 2*REGSZ(v0)                 # load ra cookie
-       REG_L   ra, SC_PC(a2)
+       REG_L   ra, _JB_PC(a2)
        xor     ra, ra, v1
-       REG_L   s0, SC_REGS+S0*REGSZ(a2)
-       REG_L   s1, SC_REGS+S1*REGSZ(a2)
-       REG_L   s2, SC_REGS+S2*REGSZ(a2)
-       REG_L   s3, SC_REGS+S3*REGSZ(a2)
-       REG_L   s4, SC_REGS+S4*REGSZ(a2)
-       REG_L   s5, SC_REGS+S5*REGSZ(a2)
-       REG_L   s6, SC_REGS+S6*REGSZ(a2)
-       REG_L   s7, SC_REGS+S7*REGSZ(a2)
-       REG_L   s8, SC_REGS+S8*REGSZ(a2)
+       REG_L   s0, _JB_REGS+S0*REGSZ(a2)
+       REG_L   s1, _JB_REGS+S1*REGSZ(a2)
+       REG_L   s2, _JB_REGS+S2*REGSZ(a2)
+       REG_L   s3, _JB_REGS+S3*REGSZ(a2)
+       REG_L   s4, _JB_REGS+S4*REGSZ(a2)
+       REG_L   s5, _JB_REGS+S5*REGSZ(a2)
+       REG_L   s6, _JB_REGS+S6*REGSZ(a2)
+       REG_L   s7, _JB_REGS+S7*REGSZ(a2)
+       REG_L   s8, _JB_REGS+S8*REGSZ(a2)
        REG_L   v1, 0(v0)                       # load gp cookie over ra cookie
-       REG_L   gp, SC_REGS+GP*REGSZ(a2)
+       REG_L   gp, _JB_REGS+GP*REGSZ(a2)
        xor     gp, gp, v1
        REG_L   v1, REGSZ(v0)                   # load sp cookie over gp cookie
-       REG_L   sp, SC_REGS+SP*REGSZ(a2)
+       REG_L   sp, _JB_REGS+SP*REGSZ(a2)
        xor     sp, sp, v1
-       REG_L   v1, SC_FPREGS+((FSR-F0)*REGSZ)(a2)      # overwrite sp cookie
+       REG_L   v1, _JB_FPREGS+((FSR-F0)*REGSZ)(a2)     # overwrite sp cookie
        ctc1    v1, $31
 #if _MIPS_FPSET == 32
-       ldc1    $f20, SC_FPREGS+((F20-F0)*REGSZ)(a2)
-       ldc1    $f21, SC_FPREGS+((F21-F0)*REGSZ)(a2)
-       ldc1    $f22, SC_FPREGS+((F22-F0)*REGSZ)(a2)
-       ldc1    $f23, SC_FPREGS+((F23-F0)*REGSZ)(a2)
-       ldc1    $f24, SC_FPREGS+((F24-F0)*REGSZ)(a2)
-       ldc1    $f25, SC_FPREGS+((F25-F0)*REGSZ)(a2)
-       ldc1    $f26, SC_FPREGS+((F26-F0)*REGSZ)(a2)
-       ldc1    $f27, SC_FPREGS+((F27-F0)*REGSZ)(a2)
-       ldc1    $f28, SC_FPREGS+((F28-F0)*REGSZ)(a2)
-       ldc1    $f29, SC_FPREGS+((F29-F0)*REGSZ)(a2)
-       ldc1    $f30, SC_FPREGS+((F30-F0)*REGSZ)(a2)
-       ldc1    $f31, SC_FPREGS+((F31-F0)*REGSZ)(a2)
+       ldc1    $f20, _JB_FPREGS+((F20-F0)*REGSZ)(a2)
+       ldc1    $f21, _JB_FPREGS+((F21-F0)*REGSZ)(a2)
+       ldc1    $f22, _JB_FPREGS+((F22-F0)*REGSZ)(a2)
+       ldc1    $f23, _JB_FPREGS+((F23-F0)*REGSZ)(a2)
+       ldc1    $f24, _JB_FPREGS+((F24-F0)*REGSZ)(a2)
+       ldc1    $f25, _JB_FPREGS+((F25-F0)*REGSZ)(a2)
+       ldc1    $f26, _JB_FPREGS+((F26-F0)*REGSZ)(a2)
+       ldc1    $f27, _JB_FPREGS+((F27-F0)*REGSZ)(a2)
+       ldc1    $f28, _JB_FPREGS+((F28-F0)*REGSZ)(a2)
+       ldc1    $f29, _JB_FPREGS+((F29-F0)*REGSZ)(a2)
+       ldc1    $f30, _JB_FPREGS+((F30-F0)*REGSZ)(a2)
+       ldc1    $f31, _JB_FPREGS+((F31-F0)*REGSZ)(a2)
 #else
-       lwc1    $f20, SC_FPREGS+((F20-F0)*REGSZ)(a2)
-       lwc1    $f21, SC_FPREGS+((F21-F0)*REGSZ)(a2)
-       lwc1    $f22, SC_FPREGS+((F22-F0)*REGSZ)(a2)
-       lwc1    $f23, SC_FPREGS+((F23-F0)*REGSZ)(a2)
-       lwc1    $f24, SC_FPREGS+((F24-F0)*REGSZ)(a2)
-       lwc1    $f25, SC_FPREGS+((F25-F0)*REGSZ)(a2)
-       lwc1    $f26, SC_FPREGS+((F26-F0)*REGSZ)(a2)
-       lwc1    $f27, SC_FPREGS+((F27-F0)*REGSZ)(a2)
-       lwc1    $f28, SC_FPREGS+((F28-F0)*REGSZ)(a2)
-       lwc1    $f29, SC_FPREGS+((F29-F0)*REGSZ)(a2)
-       lwc1    $f30, SC_FPREGS+((F30-F0)*REGSZ)(a2)
-       lwc1    $f31, SC_FPREGS+((F31-F0)*REGSZ)(a2)
+       lwc1    $f20, _JB_FPREGS+((F20-F0)*REGSZ)(a2)
+       lwc1    $f21, _JB_FPREGS+((F21-F0)*REGSZ)(a2)
+       lwc1    $f22, _JB_FPREGS+((F22-F0)*REGSZ)(a2)
+       lwc1    $f23, _JB_FPREGS+((F23-F0)*REGSZ)(a2)
+       lwc1    $f24, _JB_FPREGS+((F24-F0)*REGSZ)(a2)
+       lwc1    $f25, _JB_FPREGS+((F25-F0)*REGSZ)(a2)
+       lwc1    $f26, _JB_FPREGS+((F26-F0)*REGSZ)(a2)
+       lwc1    $f27, _JB_FPREGS+((F27-F0)*REGSZ)(a2)
+       lwc1    $f28, _JB_FPREGS+((F28-F0)*REGSZ)(a2)
+       lwc1    $f29, _JB_FPREGS+((F29-F0)*REGSZ)(a2)
+       lwc1    $f30, _JB_FPREGS+((F30-F0)*REGSZ)(a2)
+       lwc1    $f31, _JB_FPREGS+((F31-F0)*REGSZ)(a2)
 #endif
        beql    a4, zero, 1f
        li      a4, 1           # only executed if branch taken.

diff --git a/sys/arch/mips64/include/setjmp.h b/sys/arch/mips64/include/setjmp.h
index 5109798..2cd201f 100644 (file)
--- a/sys/arch/mips64/include/setjmp.h
+++ b/sys/arch/mips64/include/setjmp.h
@@ -1,10 +1,15 @@
-/*     $OpenBSD: setjmp.h,v 1.3 2011/03/23 16:54:36 pirofti Exp $      */
+/*     $OpenBSD: setjmp.h,v 1.4 2018/01/08 16:44:32 visa Exp $ */
 
 /* Public domain */
 
 #ifndef _MIPS64_SETJMP_H_
 #define _MIPS64_SETJMP_H_
 
+#define        _JB_MASK        (1 * REGSZ)
+#define        _JB_PC          (2 * REGSZ)
+#define        _JB_REGS        (3 * REGSZ)
+#define        _JB_FPREGS      (37 * REGSZ)
+
 #define        _JBLEN  83              /* size, in longs, of a jmp_buf */
 
 #endif /* !_MIPS64_SETJMP_H_ */

diff --git a/sys/arch/mips64/include/signal.h b/sys/arch/mips64/include/signal.h
index fc91e8e..a1a0dbc 100644 (file)
--- a/sys/arch/mips64/include/signal.h
+++ b/sys/arch/mips64/include/signal.h
@@ -1,4 +1,4 @@
-/*     $OpenBSD: signal.h,v 1.12 2017/04/10 14:35:30 visa Exp $        */
+/*     $OpenBSD: signal.h,v 1.13 2018/01/08 16:44:32 visa Exp $        */
 
 /*
  * Copyright (c) 1992, 1993
@@ -38,8 +38,6 @@
 #define _MIPS64_SIGNAL_H_
 
 #include <sys/cdefs.h>
-
-#if !defined(__ASSEMBLER__)
 #include <sys/types.h>
 
 /*
@@ -69,16 +67,4 @@ struct       sigcontext {
 };
 #endif /* __BSD_VISIBLE || __XPG_VISIBLE >= 420 */
 
-#else /* __ASSEMBLER__ */
-#define SC_ONSTACK     (0 * REGSZ)
-#define        SC_MASK         (1 * REGSZ)
-#define        SC_PC           (2 * REGSZ)
-#define        SC_REGS         (3 * REGSZ)
-#define        SC_MULLO        (35 * REGSZ)
-#define        SC_MULHI        (36 * REGSZ)
-#define        SC_FPREGS       (37 * REGSZ)
-#define        SC_FPUSED       (70 * REGSZ)
-#define        SC_FPC_EIR      (71 * REGSZ)
-#endif /* __ASSEMBLER__ */
-
 #endif /* !_MIPS64_SIGNAL_H_ */