drm/amd/display: Use DRAM speed from validation for dummy p-state

From Alvin Lee
6ef7f13c72df6bc95d39eb1614306768141377db in linux-6.1.y/6.1.66
9be601135ba8ac69880c01606c82140f2dde105e in mainline linux

diff --git a/sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c b/sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
index c89b761..85e0d1c 100644 (file)
--- a/sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
+++ b/sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
@@ -1788,6 +1788,7 @@ void dcn32_calculate_wm_and_dlg_fpu(struct dc *dc, struct dc_state *context,
        int i, pipe_idx, vlevel_temp = 0;
        double dcfclk = dcn3_2_soc.clock_limits[0].dcfclk_mhz;
        double dcfclk_from_validation = context->bw_ctx.dml.vba.DCFCLKState[vlevel][context->bw_ctx.dml.vba.maxMpcComb];
+       double dram_speed_from_validation = context->bw_ctx.dml.vba.DRAMSpeed;
        double dcfclk_from_fw_based_mclk_switching = dcfclk_from_validation;
        bool pstate_en = context->bw_ctx.dml.vba.DRAMClockChangeSupport[vlevel][context->bw_ctx.dml.vba.maxMpcComb] !=
                        dm_dram_clock_change_unsupported;
@@ -1921,7 +1922,7 @@ void dcn32_calculate_wm_and_dlg_fpu(struct dc *dc, struct dc_state *context,
        }
 
        if (dc->clk_mgr->bw_params->wm_table.nv_entries[WM_C].valid) {
-               min_dram_speed_mts = context->bw_ctx.dml.vba.DRAMSpeed;
+               min_dram_speed_mts = dram_speed_from_validation;
                min_dram_speed_mts_margin = 160;
 
                context->bw_ctx.dml.soc.dram_clock_change_latency_us =