drm/amdgpu/gmc11: implement get_vbios_fb_size()
authorjsg <jsg@openbsd.org>
Thu, 15 Jun 2023 03:06:36 +0000 (03:06 +0000)
committerjsg <jsg@openbsd.org>
Thu, 15 Jun 2023 03:06:36 +0000 (03:06 +0000)
From Alex Deucher
9de5a985884acff022375a29bd5166bfabbded07 in linux-6.1.y/6.1.30
68518294d00da6a2433357af75a63abc6030676e in mainline linux

sys/dev/pci/drm/amd/amdgpu/gmc_v11_0.c

index 2252e10..47b5640 100644 (file)
@@ -31,6 +31,8 @@
 #include "umc_v8_10.h"
 #include "athub/athub_3_0_0_sh_mask.h"
 #include "athub/athub_3_0_0_offset.h"
+#include "dcn/dcn_3_2_0_offset.h"
+#include "dcn/dcn_3_2_0_sh_mask.h"
 #include "oss/osssys_6_0_0_offset.h"
 #include "ivsrcid/vmc/irqsrcs_vmc_1_0.h"
 #include "navi10_enum.h"
@@ -523,7 +525,24 @@ static void gmc_v11_0_get_vm_pte(struct amdgpu_device *adev,
 
 static unsigned gmc_v11_0_get_vbios_fb_size(struct amdgpu_device *adev)
 {
-       return 0;
+       u32 d1vga_control = RREG32_SOC15(DCE, 0, regD1VGA_CONTROL);
+       unsigned size;
+
+       if (REG_GET_FIELD(d1vga_control, D1VGA_CONTROL, D1VGA_MODE_ENABLE)) {
+               size = AMDGPU_VBIOS_VGA_ALLOCATION;
+       } else {
+               u32 viewport;
+               u32 pitch;
+
+               viewport = RREG32_SOC15(DCE, 0, regHUBP0_DCSURF_PRI_VIEWPORT_DIMENSION);
+               pitch = RREG32_SOC15(DCE, 0, regHUBPREQ0_DCSURF_SURFACE_PITCH);
+               size = (REG_GET_FIELD(viewport,
+                                       HUBP0_DCSURF_PRI_VIEWPORT_DIMENSION, PRI_VIEWPORT_HEIGHT) *
+                               REG_GET_FIELD(pitch, HUBPREQ0_DCSURF_SURFACE_PITCH, PITCH) *
+                               4);
+       }
+
+       return size;
 }
 
 static const struct amdgpu_gmc_funcs gmc_v11_0_gmc_funcs = {