-/* $OpenBSD: fpu.c,v 1.23 2022/10/21 18:55:42 miod Exp $ */
+/* $OpenBSD: fpu.c,v 1.24 2024/03/29 21:07:11 miod Exp $ */
/* $NetBSD: fpu.c,v 1.11 2000/12/06 01:47:50 mrg Exp $ */
/*
* unknown FPops do enter the queue, however.
*/
void
-fpu_cleanup(register struct proc *p, register struct fpstate *fs)
+fpu_cleanup(struct proc *p, struct fpstate *fs)
{
- register int i, fsr = fs->fs_fsr, error;
+ int i, fsr = fs->fs_fsr, error;
union instr instr;
union sigval sv;
struct fpemu fe;
-/* $OpenBSD: fpu_add.c,v 1.3 2022/10/16 01:22:39 jsg Exp $ */
+/* $OpenBSD: fpu_add.c,v 1.4 2024/03/29 21:07:11 miod Exp $ */
/* $NetBSD: fpu_add.c,v 1.3 1996/03/14 19:41:52 christos Exp $ */
/*
#include <sparc64/fpu/fpu_extern.h>
struct fpn *
-fpu_add(register struct fpemu *fe)
+fpu_add(struct fpemu *fe)
{
- register struct fpn *x = &fe->fe_f1, *y = &fe->fe_f2, *r;
- register u_int r0, r1, r2, r3;
- register int rd;
+ struct fpn *x = &fe->fe_f1, *y = &fe->fe_f2, *r;
+ u_int r0, r1, r2, r3;
+ int rd;
/*
* Put the `heavier' operand on the right (see fpu_emu.h).
-/* $OpenBSD: fpu_compare.c,v 1.3 2003/06/02 23:27:55 millert Exp $ */
+/* $OpenBSD: fpu_compare.c,v 1.4 2024/03/29 21:07:11 miod Exp $ */
/* $NetBSD: fpu_compare.c,v 1.3 2001/08/26 05:46:31 eeh Exp $ */
/*
void
fpu_compare(struct fpemu *fe, int cmpe)
{
- register struct fpn *a, *b;
- register int cc;
+ struct fpn *a, *b;
+ int cc;
FPU_DECL_CARRY
a = &fe->fe_f1;
-/* $OpenBSD: fpu_div.c,v 1.4 2022/10/16 01:22:39 jsg Exp $ */
+/* $OpenBSD: fpu_div.c,v 1.5 2024/03/29 21:07:11 miod Exp $ */
/* $NetBSD: fpu_div.c,v 1.2 1994/11/20 20:52:38 deraadt Exp $ */
/*
*/
struct fpn *
-fpu_div(register struct fpemu *fe)
+fpu_div(struct fpemu *fe)
{
- register struct fpn *x = &fe->fe_f1, *y = &fe->fe_f2;
- register u_int q, bit;
- register u_int r0, r1, r2, r3, d0, d1, d2, d3, y0, y1, y2, y3;
+ struct fpn *x = &fe->fe_f1, *y = &fe->fe_f2;
+ u_int q, bit;
+ u_int r0, r1, r2, r3, d0, d1, d2, d3, y0, y1, y2, y3;
FPU_DECL_CARRY
/*
-/* $OpenBSD: fpu_emu.h,v 1.6 2022/10/21 18:55:42 miod Exp $ */
+/* $OpenBSD: fpu_emu.h,v 1.7 2024/03/29 21:07:11 miod Exp $ */
/* $NetBSD: fpu_emu.h,v 1.4 2000/08/03 18:32:07 eeh Exp $ */
/*
SWAP(x, y); \
}
#define SWAP(x, y) { \
- register struct fpn *swap; \
+ struct fpn *swap; \
swap = (x), (x) = (y), (y) = swap; \
}
-/* $OpenBSD: fpu_explode.c,v 1.6 2022/10/16 01:22:39 jsg Exp $ */
+/* $OpenBSD: fpu_explode.c,v 1.7 2024/03/29 21:07:11 miod Exp $ */
/* $NetBSD: fpu_explode.c,v 1.5 2000/08/03 18:32:08 eeh Exp $ */
/*
* int -> fpn.
*/
int
-fpu_itof(register struct fpn *fp, register u_int i)
+fpu_itof(struct fpn *fp, u_int i)
{
if (i == 0)
* 64-bit int -> fpn.
*/
int
-fpu_xtof(register struct fpn *fp, register u_int64_t i)
+fpu_xtof(struct fpn *fp, u_int64_t i)
{
if (i == 0)
return (FPC_ZERO);
* format: i.e., needs at most fp_mant[0] and fp_mant[1].
*/
int
-fpu_stof(register struct fpn *fp, register u_int i)
+fpu_stof(struct fpn *fp, u_int i)
{
- register int exp;
- register u_int frac, f0, f1;
+ int exp;
+ u_int frac, f0, f1;
#define SNG_SHIFT (SNG_FRACBITS - FP_LG)
exp = (i >> (32 - 1 - SNG_EXPBITS)) & mask(SNG_EXPBITS);
* We assume this uses at most (96-FP_LG) bits.
*/
int
-fpu_dtof(register struct fpn *fp, register u_int i, register u_int j)
+fpu_dtof(struct fpn *fp, u_int i, u_int j)
{
- register int exp;
- register u_int frac, f0, f1, f2;
+ int exp;
+ u_int frac, f0, f1, f2;
#define DBL_SHIFT (DBL_FRACBITS - 32 - FP_LG)
exp = (i >> (32 - 1 - DBL_EXPBITS)) & mask(DBL_EXPBITS);
* 128-bit extended -> fpn.
*/
int
-fpu_qtof(register struct fpn *fp, register u_int i, register u_int j,
- register u_int k, register u_int l)
+fpu_qtof(struct fpn *fp, u_int i, u_int j, u_int k, u_int l)
{
- register int exp;
- register u_int frac, f0, f1, f2, f3;
+ int exp;
+ u_int frac, f0, f1, f2, f3;
#define EXT_SHIFT (-(EXT_FRACBITS - 3 * 32 - FP_LG)) /* left shift! */
/*
* operations are performed.)
*/
void
-fpu_explode(register struct fpemu *fe, register struct fpn *fp, int type,
- int reg)
+fpu_explode(struct fpemu *fe, struct fpn *fp, int type, int reg)
{
- register u_int s, *space;
+ u_int s, *space;
u_int64_t l, *xspace;
xspace = (u_int64_t *)&fe->fe_fpstate->fs_regs[reg & ~1];
-/* $OpenBSD: fpu_extern.h,v 1.7 2022/10/21 18:55:42 miod Exp $ */
+/* $OpenBSD: fpu_extern.h,v 1.8 2024/03/29 21:07:11 miod Exp $ */
/* $NetBSD: fpu_extern.h,v 1.4 2000/08/03 18:32:08 eeh Exp $ */
/*-
struct fpn *fpu_sqrt(struct fpemu *);
/* fpu_subr.c */
-int fpu_shr(register struct fpn *, register int);
-void fpu_norm(register struct fpn *);
-struct fpn *fpu_newnan(register struct fpemu *);
+int fpu_shr(struct fpn *, int);
+void fpu_norm(struct fpn *);
+struct fpn *fpu_newnan(struct fpemu *);
-/* $OpenBSD: fpu_implode.c,v 1.9 2022/10/16 01:22:39 jsg Exp $ */
+/* $OpenBSD: fpu_implode.c,v 1.10 2024/03/29 21:07:11 miod Exp $ */
/* $NetBSD: fpu_implode.c,v 1.7 2000/08/03 18:32:08 eeh Exp $ */
/*
#include <sparc64/fpu/fpu_emu.h>
#include <sparc64/fpu/fpu_extern.h>
-static int fpu_round(register struct fpemu *, register struct fpn *);
+static int fpu_round(struct fpemu *, struct fpn *);
static int toinf(struct fpemu *, int);
/*
* responsibility to fix this if necessary.
*/
static int
-fpu_round(register struct fpemu *fe, register struct fpn *fp)
+fpu_round(struct fpemu *fe, struct fpn *fp)
{
- register u_int m0, m1, m2, m3;
- register int gr, s;
+ u_int m0, m1, m2, m3;
+ int gr, s;
m0 = fp->fp_mant[0];
m1 = fp->fp_mant[1];
* of the SPARC instruction set).
*/
u_int
-fpu_ftoi(struct fpemu *fe, register struct fpn *fp)
+fpu_ftoi(struct fpemu *fe, struct fpn *fp)
{
- register u_int i;
- register int sign, exp;
+ u_int i;
+ int sign, exp;
sign = fp->fp_sign;
switch (fp->fp_class) {
* of the SPARC instruction set).
*/
u_int
-fpu_ftox(struct fpemu *fe, register struct fpn *fp, u_int *res)
+fpu_ftox(struct fpemu *fe, struct fpn *fp, u_int *res)
{
- register u_int64_t i;
- register int sign, exp;
+ u_int64_t i;
+ int sign, exp;
sign = fp->fp_sign;
switch (fp->fp_class) {
* We assume <= 29 bits in a single-precision fraction (1.f part).
*/
u_int
-fpu_ftos(struct fpemu *fe, register struct fpn *fp)
+fpu_ftos(struct fpemu *fe, struct fpn *fp)
{
- register u_int sign = fp->fp_sign << 31;
- register int exp;
+ u_int sign = fp->fp_sign << 31;
+ int exp;
#define SNG_EXP(e) ((e) << SNG_FRACBITS) /* makes e an exponent */
#define SNG_MASK (SNG_EXP(1) - 1) /* mask for fraction */
* This code mimics fpu_ftos; see it for comments.
*/
u_int
-fpu_ftod(struct fpemu *fe, register struct fpn *fp, u_int *res)
+fpu_ftod(struct fpemu *fe, struct fpn *fp, u_int *res)
{
- register u_int sign = fp->fp_sign << 31;
- register int exp;
+ u_int sign = fp->fp_sign << 31;
+ int exp;
#define DBL_EXP(e) ((e) << (DBL_FRACBITS & 31))
#define DBL_MASK (DBL_EXP(1) - 1)
* so we can avoid a small bit of work.
*/
u_int
-fpu_ftoq(struct fpemu *fe, register struct fpn *fp, u_int *res)
+fpu_ftoq(struct fpemu *fe, struct fpn *fp, u_int *res)
{
- register u_int sign = fp->fp_sign << 31;
- register int exp;
+ u_int sign = fp->fp_sign << 31;
+ int exp;
#define EXT_EXP(e) ((e) << (EXT_FRACBITS & 31))
#define EXT_MASK (EXT_EXP(1) - 1)
* Implode an fpn, writing the result into the given space.
*/
void
-fpu_implode(struct fpemu *fe, register struct fpn *fp, int type,
- register u_int *space)
+fpu_implode(struct fpemu *fe, struct fpn *fp, int type, u_int *space)
{
DPRINTF(FPE_INSN, ("fpu_implode: "));
switch (type) {
-/* $OpenBSD: fpu_mul.c,v 1.3 2022/10/16 01:22:39 jsg Exp $ */
+/* $OpenBSD: fpu_mul.c,v 1.4 2024/03/29 21:07:11 miod Exp $ */
/* $NetBSD: fpu_mul.c,v 1.2 1994/11/20 20:52:44 deraadt Exp $ */
/*
*
* Since we do not have efficient multiword arithmetic, we code the
* accumulator as four separate words, just like any other mantissa.
- * We use local `register' variables in the hope that this is faster
- * than memory. We keep x->fp_mant in locals for the same reason.
*
* In the algorithm above, the bits in y are inspected one at a time.
* We will pick them up 32 at a time and then deal with those 32, one
* until we reach a nonzero word.
*/
struct fpn *
-fpu_mul(register struct fpemu *fe)
+fpu_mul(struct fpemu *fe)
{
- register struct fpn *x = &fe->fe_f1, *y = &fe->fe_f2;
- register u_int a3, a2, a1, a0, x3, x2, x1, x0, bit, m;
- register int sticky;
+ struct fpn *x = &fe->fe_f1, *y = &fe->fe_f2;
+ u_int a3, a2, a1, a0, x3, x2, x1, x0, bit, m;
+ int sticky;
FPU_DECL_CARRY
/*
-/* $OpenBSD: fpu_sqrt.c,v 1.6 2022/10/16 01:22:39 jsg Exp $ */
+/* $OpenBSD: fpu_sqrt.c,v 1.7 2024/03/29 21:07:11 miod Exp $ */
/* $NetBSD: fpu_sqrt.c,v 1.2 1994/11/20 20:52:46 deraadt Exp $ */
/*
struct fpn *
fpu_sqrt(struct fpemu *fe)
{
- register struct fpn *x = &fe->fe_f1;
- register u_int bit, q, tt;
- register u_int x0, x1, x2, x3;
- register u_int y0, y1, y2, y3;
- register u_int d0, d1, d2, d3;
- register int e;
+ struct fpn *x = &fe->fe_f1;
+ u_int bit, q, tt;
+ u_int x0, x1, x2, x3;
+ u_int y0, y1, y2, y3;
+ u_int d0, d1, d2, d3;
+ int e;
/*
* Take care of special cases first. In order:
-/* $OpenBSD: fpu_subr.c,v 1.2 2003/06/02 23:27:55 millert Exp $ */
+/* $OpenBSD: fpu_subr.c,v 1.3 2024/03/29 21:07:11 miod Exp $ */
/* $NetBSD: fpu_subr.c,v 1.3 1996/03/14 19:42:01 christos Exp $ */
/*
* sticky field is ignored anyway.
*/
int
-fpu_shr(register struct fpn *fp, register int rsh)
+fpu_shr(struct fpn *fp, int rsh)
{
- register u_int m0, m1, m2, m3, s;
- register int lsh;
+ u_int m0, m1, m2, m3, s;
+ int lsh;
#ifdef DIAGNOSTIC
if (rsh <= 0 || (fp->fp_class != FPC_NUM && !ISNAN(fp)))
* a supernormal and it will fix it (provided fp->fp_mant[3] == 0).
*/
void
-fpu_norm(register struct fpn *fp)
+fpu_norm(struct fpn *fp)
{
- register u_int m0, m1, m2, m3, top, sup, nrm;
- register int lsh, rsh, exp;
+ u_int m0, m1, m2, m3, top, sup, nrm;
+ int lsh, rsh, exp;
exp = fp->fp_exp;
m0 = fp->fp_mant[0];
* As a side effect, we set NV (invalid) for the current exceptions.
*/
struct fpn *
-fpu_newnan(register struct fpemu *fe)
+fpu_newnan(struct fpemu *fe)
{
- register struct fpn *fp;
+ struct fpn *fp;
fe->fe_cx = FSR_NV;
fp = &fe->fe_f3;
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