Remove PHY ID checks. The Linux driver is no longer checking for

the PHY ID because there is only one venor.
ok kevlo@

diff --git a/sys/dev/pci/igc_i225.c b/sys/dev/pci/igc_i225.c
index 2f192e5..521a10c 100644 (file)
--- a/sys/dev/pci/igc_i225.c
+++ b/sys/dev/pci/igc_i225.c
@@ -1,4 +1,4 @@
-/*     $OpenBSD: igc_i225.c,v 1.3 2022/05/11 06:14:15 kevlo Exp $      */
+/*     $OpenBSD: igc_i225.c,v 1.4 2023/02/03 11:31:52 mbuhl Exp $      */
 /*-
  * Copyright 2021 Intel Corp
  * Copyright 2021 Rubicon Communications, LLC (Netgate)
@@ -163,16 +163,7 @@ igc_init_phy_params_i225(struct igc_hw *hw)
                goto out;
 
        ret_val = igc_get_phy_id(hw);
-       /* Verify phy id and set remaining function pointers */
-       switch (phy->id) {
-       case I225_I_PHY_ID:
-       default:
-               phy->type = igc_phy_i225;
-               phy->ops.set_d0_lplu_state = igc_set_d0_lplu_state_i225;
-               phy->ops.set_d3_lplu_state = igc_set_d3_lplu_state_i225;
-               /* TODO - complete with GPY PHY information */
-               break;
-       }
+       phy->type = igc_phy_i225;
 
 out:
        return ret_val;
@@ -1106,66 +1097,6 @@ igc_init_hw_i225(struct igc_hw *hw)
        return ret_val;
 }
 
-/*
- * igc_set_d0_lplu_state_i225 - Set Low-Power-Link-Up (LPLU) D0 state
- * @hw: pointer to the HW structure
- * @active: true to enable LPLU, false to disable
- *
- * Note: since I225 does not actually support LPLU, this function
- * simply enables/disables 1G and 2.5G speeds in D0.
- */
-int
-igc_set_d0_lplu_state_i225(struct igc_hw *hw, bool active)
-{
-       uint32_t data;
-
-       DEBUGFUNC("igc_set_d0_lplu_state_i225");
-
-       data = IGC_READ_REG(hw, IGC_I225_PHPM);
-
-       if (active) {
-               data |= IGC_I225_PHPM_DIS_1000;
-               data |= IGC_I225_PHPM_DIS_2500;
-       } else {
-               data &= ~IGC_I225_PHPM_DIS_1000;
-               data &= ~IGC_I225_PHPM_DIS_2500;
-       }
-
-       IGC_WRITE_REG(hw, IGC_I225_PHPM, data);
-       return IGC_SUCCESS;
-}
-
-/*
- * igc_set_d3_lplu_state_i225 - Set Low-Power-Link-Up (LPLU) D3 state
- * @hw: pointer to the HW structure
- * @active: true to enable LPLU, false to disable
- *
- * Note: since I225 does not actually support LPLU, this function
- * simply enables/disables 100M, 1G and 2.5G speeds in D3.
- */
-int
-igc_set_d3_lplu_state_i225(struct igc_hw *hw, bool active)
-{
-       uint32_t data;
-
-       DEBUGFUNC("igc_set_d3_lplu_state_i225");
-
-       data = IGC_READ_REG(hw, IGC_I225_PHPM);
-
-       if (active) {
-               data |= IGC_I225_PHPM_DIS_100_D3;
-               data |= IGC_I225_PHPM_DIS_1000_D3;
-               data |= IGC_I225_PHPM_DIS_2500_D3;
-       } else {
-               data &= ~IGC_I225_PHPM_DIS_100_D3;
-               data &= ~IGC_I225_PHPM_DIS_1000_D3;
-               data &= ~IGC_I225_PHPM_DIS_2500_D3;
-       }
-
-       IGC_WRITE_REG(hw, IGC_I225_PHPM, data);
-       return IGC_SUCCESS;
-}
-
 /**
  *  igc_set_eee_i225 - Enable/disable EEE support
  *  @hw: pointer to the HW structure

diff --git a/sys/dev/pci/igc_i225.h b/sys/dev/pci/igc_i225.h
index cb28541..41e3900 100644 (file)
--- a/sys/dev/pci/igc_i225.h
+++ b/sys/dev/pci/igc_i225.h
@@ -1,4 +1,4 @@
-/*     $OpenBSD: igc_i225.h,v 1.1 2021/10/31 14:52:57 patrick Exp $    */
+/*     $OpenBSD: igc_i225.h,v 1.2 2023/02/03 11:31:52 mbuhl Exp $      */
 /*-
  * Copyright 2021 Intel Corp
  * Copyright 2021 Rubicon Communications, LLC (Netgate)
@@ -27,8 +27,6 @@ void  igc_release_swfw_sync_i225(struct igc_hw *, uint16_t);
 int    igc_set_ltr_i225(struct igc_hw *, bool);
 int    igc_init_hw_i225(struct igc_hw *);
 int    igc_setup_copper_link_i225(struct igc_hw *);
-int    igc_set_d0_lplu_state_i225(struct igc_hw *, bool);
-int    igc_set_d3_lplu_state_i225(struct igc_hw *, bool);
 int    igc_set_eee_i225(struct igc_hw *, bool, bool, bool);
 
 #define ID_LED_DEFAULT_I225                                            \

diff --git a/sys/dev/pci/igc_phy.c b/sys/dev/pci/igc_phy.c
index ba3efe6..fe050f2 100644 (file)
--- a/sys/dev/pci/igc_phy.c
+++ b/sys/dev/pci/igc_phy.c
@@ -1,4 +1,4 @@
-/*     $OpenBSD: igc_phy.c,v 1.2 2022/05/11 06:14:15 kevlo Exp $       */
+/*     $OpenBSD: igc_phy.c,v 1.3 2023/02/03 11:31:52 mbuhl Exp $       */
 /*-
  * Copyright 2021 Intel Corp
  * Copyright 2021 Rubicon Communications, LLC (Netgate)
@@ -307,8 +307,7 @@ igc_phy_setup_autoneg(struct igc_hw *hw)
                        return ret_val;
        }
 
-       if ((phy->autoneg_mask & ADVERTISE_2500_FULL) &&
-           hw->phy.id == I225_I_PHY_ID) {
+       if (phy->autoneg_mask & ADVERTISE_2500_FULL) {
                /* Read the MULTI GBT AN Control Register - reg 7.32 */
                ret_val = phy->ops.read_reg(hw, (STANDARD_AN_REG_MASK <<
                    MMD_DEVADDR_SHIFT) | ANEG_MULTIGBT_AN_CTRL,
@@ -443,8 +442,7 @@ igc_phy_setup_autoneg(struct igc_hw *hw)
                ret_val = phy->ops.write_reg(hw, PHY_1000T_CTRL,
                    mii_1000t_ctrl_reg);
 
-       if ((phy->autoneg_mask & ADVERTISE_2500_FULL) &&
-           hw->phy.id == I225_I_PHY_ID)
+       if (phy->autoneg_mask & ADVERTISE_2500_FULL)
                ret_val = phy->ops.write_reg(hw,
                    (STANDARD_AN_REG_MASK << MMD_DEVADDR_SHIFT) |
                    ANEG_MULTIGBT_AN_CTRL, aneg_multigbt_an_ctrl);