add endbr defines and control protection trap

ok deraadt@

diff --git a/sys/arch/amd64/amd64/trap.c b/sys/arch/amd64/amd64/trap.c
index 272d84b..783184b 100644 (file)
--- a/sys/arch/amd64/amd64/trap.c
+++ b/sys/arch/amd64/amd64/trap.c
@@ -1,4 +1,4 @@
-/*     $OpenBSD: trap.c,v 1.97 2023/02/11 23:07:26 deraadt Exp $       */
+/*     $OpenBSD: trap.c,v 1.98 2023/04/15 01:22:50 jsg Exp $   */
 /*     $NetBSD: trap.c,v 1.2 2003/05/04 23:51:56 fvdl Exp $    */
 
 /*-
@@ -121,6 +121,8 @@ const char * const trap_type[] = {
        "stack fault",                          /* 17 T_STKFLT */
        "machine check",                        /* 18 T_MCA */
        "SSE FP exception",                     /* 19 T_XMM */
+       "virtualization exception",             /* 20 T_VE */
+       "control protection exception",         /* 21 T_CP */
 };
 const int      trap_types = nitems(trap_type);
 

diff --git a/sys/arch/amd64/amd64/vector.S b/sys/arch/amd64/amd64/vector.S
index c0e2a76..c2f11f0 100644 (file)
--- a/sys/arch/amd64/amd64/vector.S
+++ b/sys/arch/amd64/amd64/vector.S
@@ -1,4 +1,4 @@
-/*     $OpenBSD: vector.S,v 1.88 2023/01/20 16:01:04 deraadt Exp $     */
+/*     $OpenBSD: vector.S,v 1.89 2023/04/15 01:22:50 jsg Exp $ */
 /*     $NetBSD: vector.S,v 1.5 2004/06/28 09:13:11 fvdl Exp $  */
 
 /*
@@ -359,7 +359,9 @@ IDTVEC(trap12)
 IDTVEC(trap13)
        ZTRAP(T_XMM)
 IDTVEC(trap14)
-IDTVEC_NOALIGN(trap15)
+       ZTRAP(T_VE)
+IDTVEC(trap15)
+       ZTRAP(T_CP)
 IDTVEC_NOALIGN(trap16)
 IDTVEC_NOALIGN(trap17)
 IDTVEC_NOALIGN(trap18)
@@ -370,7 +372,7 @@ IDTVEC_NOALIGN(trap1c)
 IDTVEC_NOALIGN(trap1d)
 IDTVEC_NOALIGN(trap1e)
 IDTVEC_NOALIGN(trap1f)
-       /* 20 - 31 reserved for future exp */
+       /* 22 - 31 reserved for future exp */
        ZTRAP(T_RESERVED)
 
        .section .rodata

diff --git a/sys/arch/amd64/include/specialreg.h b/sys/arch/amd64/include/specialreg.h
index 30ac4e5..703c9ea 100644 (file)
--- a/sys/arch/amd64/include/specialreg.h
+++ b/sys/arch/amd64/include/specialreg.h
@@ -1,4 +1,4 @@
-/*     $OpenBSD: specialreg.h,v 1.100 2023/04/14 18:27:31 dv Exp $     */
+/*     $OpenBSD: specialreg.h,v 1.101 2023/04/15 01:22:50 jsg Exp $    */
 /*     $NetBSD: specialreg.h,v 1.1 2003/04/26 18:39:48 fvdl Exp $      */
 /*     $NetBSD: x86/specialreg.h,v 1.2 2003/04/25 21:54:30 fvdl Exp $  */
 
@@ -502,6 +502,9 @@
 #define MSR_MC3_STATUS         0x411
 #define MSR_MC3_ADDR           0x412
 #define MSR_MC3_MISC           0x413
+#define MSR_U_CET              0x6a0
+#define MSR_CET_ENDBR_EN               (1 << 2)
+#define MSR_S_CET              0x6a2
 #define MSR_PKRS               0x6e1
 
 /* VIA MSR */

diff --git a/sys/arch/amd64/include/trap.h b/sys/arch/amd64/include/trap.h
index b334a5d..fa322ba 100644 (file)
--- a/sys/arch/amd64/include/trap.h
+++ b/sys/arch/amd64/include/trap.h
@@ -1,4 +1,4 @@
-/*     $OpenBSD: trap.h,v 1.4 2020/11/13 23:08:10 guenther Exp $       */
+/*     $OpenBSD: trap.h,v 1.5 2023/04/15 01:22:50 jsg Exp $    */
 /*     $NetBSD: trap.h,v 1.4 1994/10/27 04:16:30 cgd Exp $     */
 
 /*-
@@ -60,3 +60,5 @@
 #define        T_STKFLT        17      /* stack fault */
 #define        T_MCA           18      /* machine check ([P]Pro) */
 #define        T_XMM           19      /* SSE FP exception */
+#define        T_VE            20      /* virtualization exception */
+#define        T_CP            21      /* control protection exception */