drm/i915: Check pipe source size when using skl+ scalers

From Ville Syrjala
74a03d3c8d895a7d137bb4be8e40cae886f5d973 in linux-6.1.y/6.1.29
d944eafed618a8507270b324ad9d5405bb7f0b3e in mainline linux

diff --git a/sys/dev/pci/drm/i915/display/skl_scaler.c b/sys/dev/pci/drm/i915/display/skl_scaler.c
index e6ec5ed..90f42f6 100644 (file)
--- a/sys/dev/pci/drm/i915/display/skl_scaler.c
+++ b/sys/dev/pci/drm/i915/display/skl_scaler.c
@@ -105,6 +105,8 @@ skl_update_scaler(struct intel_crtc_state *crtc_state, bool force_detach,
        struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
        const struct drm_display_mode *adjusted_mode =
                &crtc_state->hw.adjusted_mode;
+       int pipe_src_w = drm_rect_width(&crtc_state->pipe_src);
+       int pipe_src_h = drm_rect_height(&crtc_state->pipe_src);
        int min_src_w, min_src_h, min_dst_w, min_dst_h;
        int max_src_w, max_src_h, max_dst_w, max_dst_h;
 
@@ -196,6 +198,21 @@ skl_update_scaler(struct intel_crtc_state *crtc_state, bool force_detach,
                return -EINVAL;
        }
 
+       /*
+        * The pipe scaler does not use all the bits of PIPESRC, at least
+        * on the earlier platforms. So even when we're scaling a plane
+        * the *pipe* source size must not be too large. For simplicity
+        * we assume the limits match the scaler source size limits. Might
+        * not be 100% accurate on all platforms, but good enough for now.
+        */
+       if (pipe_src_w > max_src_w || pipe_src_h > max_src_h) {
+               drm_dbg_kms(&dev_priv->drm,
+                           "scaler_user index %u.%u: pipe src size %ux%u "
+                           "is out of scaler range\n",
+                           crtc->pipe, scaler_user, pipe_src_w, pipe_src_h);
+               return -EINVAL;
+       }
+
        /* mark this plane as a scaler user in crtc_state */
        scaler_state->scaler_users |= (1 << scaler_user);
        drm_dbg_kms(&dev_priv->drm, "scaler_user index %u.%u: "