Add another reset for the PCIe controller on the RK3588.

ok dlg@

diff --git a/sys/dev/fdt/rkclock.c b/sys/dev/fdt/rkclock.c
index dfa79af..728a10a 100644 (file)
--- a/sys/dev/fdt/rkclock.c
+++ b/sys/dev/fdt/rkclock.c
@@ -1,4 +1,4 @@
-/*     $OpenBSD: rkclock.c,v 1.76 2023/04/27 08:55:59 kettenis Exp $   */
+/*     $OpenBSD: rkclock.c,v 1.77 2023/06/19 09:54:15 kettenis Exp $   */
 /*
  * Copyright (c) 2017, 2018 Mark Kettenis <kettenis@openbsd.org>
  *
@@ -4341,6 +4341,10 @@ rk3588_reset(void *cookie, uint32_t *cells, int on)
                reg = RK3588_CRU_SOFTRST_CON(33);
                bit = 1;
                break;
+       case RK3588_SRST_P_PCIE4:
+               reg = RK3588_CRU_SOFTRST_CON(34);
+               bit = 0;
+               break;
        case RK3588_SRST_REF_PIPE_PHY0:
                reg = RK3588_CRU_SOFTRST_CON(77);
                bit = 6;

diff --git a/sys/dev/fdt/rkclock_clocks.h b/sys/dev/fdt/rkclock_clocks.h
index 94faf47..f506b0b 100644 (file)
--- a/sys/dev/fdt/rkclock_clocks.h
+++ b/sys/dev/fdt/rkclock_clocks.h
@@ -468,5 +468,6 @@
 #define RK3588_XIN24M                  1023
 
 #define RK3588_SRST_PCIE4_POWER_UP     298
+#define RK3588_SRST_P_PCIE4            303
 #define RK3588_SRST_REF_PIPE_PHY0      572
 #define RK3588_SRST_P_PCIE2_PHY0       579