-/* $OpenBSD: cpu.h,v 1.114 2017/03/02 10:38:10 natano Exp $ */
+/* $OpenBSD: cpu.h,v 1.115 2017/04/07 14:17:38 visa Exp $ */
/*-
* Copyright (c) 1992, 1993
#define MIPS_LOONGSON2 0x63 /* STC LoongSon2/3 CPU ISA III+ */
#define MIPS_CN61XX 0x93 /* Cavium OCTEON II CN6[01]xx MIPS64R2 */
#define MIPS_CN71XX 0x96 /* Cavium OCTEON III CN7[01]xx MIPS64R2 */
+#define MIPS_CN73XX 0x97 /* Cavium OCTEON III CN7[23]xx MIPS64R2 */
/*
* MIPS FPU types. Only soft, rest is the same as cpu type.
-/* $OpenBSD: cpu.c,v 1.63 2016/12/17 11:51:02 visa Exp $ */
+/* $OpenBSD: cpu.c,v 1.64 2017/04/07 14:17:38 visa Exp $ */
/*
* Copyright (c) 1997-2004 Opsycon AB (www.opsycon.se)
case MIPS_CN71XX:
printf("CN70xx/CN71xx CPU");
break;
+ case MIPS_CN73XX:
+ printf("CN72xx/CN73xx CPU");
+ break;
default:
printf("Unknown CPU type (0x%x)", ch->type);
break;
case MIPS_CN71XX:
printf("CN70xx/CN71xx FPU");
break;
+ case MIPS_CN73XX:
+ printf("CN72xx/CN73xx FPU");
+ break;
default:
printf("Unknown FPU type (0x%x)", fptype);
break;
-/* $OpenBSD: octeon_model.h,v 1.5 2016/12/17 14:14:09 visa Exp $ */
+/* $OpenBSD: octeon_model.h,v 1.6 2017/04/07 14:17:38 visa Exp $ */
/*
* Copyright (c) 2007
#define OCTEON_MODEL_FAMILY_CN50XX 0x000d0600
#define OCTEON_MODEL_FAMILY_CN61XX 0x000d9300
#define OCTEON_MODEL_FAMILY_CN71XX 0x000d9600
+#define OCTEON_MODEL_FAMILY_CN73XX 0x000d9700
/*
* get chip id
-/* $OpenBSD: machdep.c,v 1.84 2017/04/07 13:30:43 visa Exp $ */
+/* $OpenBSD: machdep.c,v 1.85 2017/04/07 14:17:38 visa Exp $ */
/*
* Copyright (c) 2009, 2010 Miodrag Vallat.
octeon_ver = OCTEON_2;
break;
case MIPS_CN71XX:
+ case MIPS_CN73XX:
octeon_ver = OCTEON_3;
break;
}