drm/amd/display: Add DSC Support for Synaptics Cascaded MST Hub
authorjsg <jsg@openbsd.org>
Fri, 7 Apr 2023 04:00:35 +0000 (04:00 +0000)
committerjsg <jsg@openbsd.org>
Fri, 7 Apr 2023 04:00:35 +0000 (04:00 +0000)
From Fangzhi Zuo
41abe8828c83e8f73940790a3861b498a8b5ee3f in linux-6.1.y/6.1.23
f4f3b7dedbe849e780c779ba67365bb1db0d8637 in mainline linux

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.h

index 8561e9b..36c1957 100644 (file)
@@ -208,6 +208,21 @@ bool needs_dsc_aux_workaround(struct dc_link *link)
        return false;
 }
 
+bool is_synaptics_cascaded_panamera(struct dc_link *link, struct drm_dp_mst_port *port)
+{
+       u8 branch_vendor_data[4] = { 0 }; // Vendor data 0x50C ~ 0x50F
+
+       if (drm_dp_dpcd_read(port->mgr->aux, DP_BRANCH_VENDOR_SPECIFIC_START, &branch_vendor_data, 4) == 4) {
+               if (link->dpcd_caps.branch_dev_id == DP_BRANCH_DEVICE_ID_90CC24 &&
+                               IS_SYNAPTICS_CASCADED_PANAMERA(link->dpcd_caps.branch_dev_name, branch_vendor_data)) {
+                       DRM_INFO("Synaptics Cascaded MST hub\n");
+                       return true;
+               }
+       }
+
+       return false;
+}
+
 static bool validate_dsc_caps_on_connector(struct amdgpu_dm_connector *aconnector)
 {
        struct dc_sink *dc_sink = aconnector->dc_sink;
@@ -231,6 +246,10 @@ static bool validate_dsc_caps_on_connector(struct amdgpu_dm_connector *aconnecto
            needs_dsc_aux_workaround(aconnector->dc_link))
                aconnector->dsc_aux = &aconnector->mst_port->dm_dp_aux.aux;
 
+       /* synaptics cascaded MST hub case */
+       if (!aconnector->dsc_aux && is_synaptics_cascaded_panamera(aconnector->dc_link, port))
+               aconnector->dsc_aux = port->mgr->aux;
+
        if (!aconnector->dsc_aux)
                return false;
 
index 97fd70d..0b57502 100644 (file)
 #define SYNAPTICS_RC_OFFSET        0x4BC
 #define SYNAPTICS_RC_DATA          0x4C0
 
+#define DP_BRANCH_VENDOR_SPECIFIC_START 0x50C
+
+/**
+ * Panamera MST Hub detection
+ * Offset DPCD 050Eh == 0x5A indicates cascaded MST hub case
+ * Check from beginning of branch device vendor specific field (050Ch)
+ */
+#define IS_SYNAPTICS_PANAMERA(branchDevName) (((int)branchDevName[4] & 0xF0) == 0x50 ? 1 : 0)
+#define BRANCH_HW_REVISION_PANAMERA_A2 0x10
+#define SYNAPTICS_CASCADED_HUB_ID  0x5A
+#define IS_SYNAPTICS_CASCADED_PANAMERA(devName, data) ((IS_SYNAPTICS_PANAMERA(devName) && ((int)data[2] == SYNAPTICS_CASCADED_HUB_ID)) ? 1 : 0)
+
 struct amdgpu_display_manager;
 struct amdgpu_dm_connector;