-/* $OpenBSD: conf.c,v 1.3 1996/02/21 12:53:41 mickey Exp $ */
+/* $OpenBSD: conf.c,v 1.4 1996/03/30 22:18:06 niklas Exp $ */
+/* $NetBSD: conf.c,v 1.33 1996/03/14 21:22:23 christos Exp $ */
/*-
* Copyright (c) 1991 The Regents of the University of California.
cdev_decl(vnd);
cdev_decl(ccd);
cdev_decl(st);
-dev_decl(fd,open);
+dev_decl(filedesc,open);
#include "bpfilter.h"
cdev_decl(bpf);
#include "tun.h"
#undef fdopen
cdev_disk_init(NVND,vnd), /* 19: vnode disk driver */
cdev_tape_init(NST,st), /* 20: SCSI tape */
- cdev_fd_init(1,fd), /* 21: file descriptor pseudo-dev */
+ cdev_fd_init(1,filedesc), /* 21: file descriptor pseudo-dev */
cdev_bpftun_init(NBPFILTER,bpf),/* 22: Berkeley packet filter */
cdev_bpftun_init(NTUN,tun), /* 23: network tunnel */
cdev_lkm_init(NLKM,lkm), /* 24: loadable module driver */
-/* $NetBSD: genassym.c,v 1.23 1996/02/02 19:42:08 mycroft Exp $ */
+/* $OpenBSD: genassym.c,v 1.4 1996/03/30 22:18:07 niklas Exp $ */
+/* $NetBSD: genassym.c,v 1.24 1996/03/15 19:47:45 is Exp $ */
/*
* Copyright (c) 1982, 1990 The Regents of the University of California.
printf("#define\tAMIGA_68020 %d\n", AMIGA_68020);
printf("#define\tAMIGA_68030 %d\n", AMIGA_68030);
printf("#define\tAMIGA_68040 %d\n", AMIGA_68040);
+ printf("#define\tAMIGA_68060 %d\n", AMIGA_68060);
printf("#define\tISR_FORW %d\n", &isr->isr_forw);
printf("#define\tISR_INTR %d\n", &isr->isr_intr);
printf("#define\tISR_ARG %d\n", &isr->isr_arg);
-# $Id: GENERIC,v 1.5 1996/02/06 09:17:42 niklas Exp $
+# $OpenBSD: GENERIC,v 1.6 1996/03/30 22:18:09 niklas Exp $
+# $NetBSD: GENERIC,v 1.53 1996/03/05 17:46:23 veego Exp $
#
# GENERIC AMIGA
# Networking options
#
options INET # IP networking support (Required)
-#options ISO # ISO Networking support
-#options TPIP # ARGO TP networking support
-#options CCITT # CCITT X.25
-#options NS # Xerox XNS
-#options EON # ISO CLNL over IP
#options GATEWAY # Packet forwarding
#options DIRECTED_BROADCAST # Broadcast across subnets
-#options NSIP # XNS over IP
-
-#
-# File system related options
-#
-options QUOTA # Disk quotas for local disks
-options NFSSERVER # Network File System server side code
-options NFSCLIENT # Network File System client side code
+#options MROUTING # Multicast routing
+#options NS # XNS
+#options ISO,TPIP # OSI
+#options EON # OSI tunneling over IP
+#options CCITT,LLC,HDLC # X.25
#
# File systems
#
options FFS # Berkeley fast file system
+options QUOTA # UFS quotas
+#options LFS # log-structured filesystem
options MFS # Memory based filesystem
-options PROCFS # Process filesystem
-options KERNFS # Kernel parameter filesystem (Recommended)
-options FDESC # /dev/fd filesystem
-options NULLFS # Loopback filesystem
-options FIFO # FIFO operations on vnodes (Recommended)
+
+options NFSSERVER # Network File System server side code
+options NFSCLIENT # Network File System client side code
+
options ADOSFS # AmigaDOS file system
-options "CD9660" # ISO 9660 file system, with Rock Ridge
-options UNION # union file system
-options UMAPFS # uid/gid remapping filesystem
-#options PORTAL # Portal filesystem
-#options MSDOSFS # MS-DOS filesystem
+options CD9660 # ISO 9660 + Rock Ridge file system
+#options MSDOSFS # MS-DOS file system [does not work]
+options FDESC # /dev/fd
+options FIFO # FIFOs; RECOMMENDED
+options KERNFS # /kern
+options NULLFS # loopback file system
+#options PORTAL # Portal Filesystem
+options PROCFS # /proc
+options UMAPFS # NULLFS + uid and gid remapping
+options UNION # union file system
#
#
# Support for various kernel options
#
+
+options UCONSOLE # only super-user can redirect console
+
options GENERIC # Mini-root boot support
options LKM # Loadable kernel modules
-options KTRACE # Add kernel tracing system call
-options DIAGNOSTIC # Add additional error checking code
options "NKMEMCLUSTERS=256" # Size of kernel malloc area
#
# Misc. debuging options
#
-options PANICWAIT # Require keystroke to dump/reboot
-#options DEBUG # Add debugging statements
options DDB # Kernel debugger
+options DIAGNOSTIC # Add additional error checking code
+options KTRACE # Add kernel tracing system call
+#options DEBUG # Add debugging statements
#options SYSCALL_DEBUG # debug all syscalls.
#options SCSIDEBUG # Add SCSI debugging statements
#options KGDB # Kernel debugger (KGDB) support
#
options MACHINE_NONCONTIG # Non-contiguous memory support
+# These options improve performance with the built-in serial port
+# on slower Amigas. Try the larger buffers first then lev6_defer.
+#options "SERIBUF_SIZE=4096"
+#options "SEROBUF_SIZE=32"
+#options LEV6_DEFER # defers l6 to l4 (below serial l5)
+
options RETINACONSOLE # enable code to allow retina to be console
options ULOWELLCONSOLE # enable code to allow a2410 to be console
-options CL5426CONSOLE # Cirrus console
+options CL5426CONSOLE # Cirrus console
+options CV64CONSOLE # CyberVision console
options GRF_ECS # Enhanced Chip Set
options GRF_NTSC # NTSC
options GRF_AGA # AGA Chip Set
options GRF_CL5426 # Cirrus board support
#options "KFONT_8X11" # 8x11 font
-#options LEV6_DEFER # Defer handling of level 6 interrupts
-#options IPL_REMAP_1 # Remap level 6 ints version 1
-#options IPL_REMAP_2 # Remap level 6 ints version 2
# This is how you would tell the kernel the A2410 oscillator frequencies:
# The used frequencies are the defaults, and don't need option setting
ite2 at grf2 # terminal emulators for grf's
ite3 at grf3 # terminal emulators for grf's
ite4 at grf4 # terminal emulators for grf's
+ite5 at grf5 # terminal emulators for grf's
msc0 at zbus0 # A2232 MSC multiport serial.
mfc0 at zbus0 # MultiFaceCard I/O board
st* at scsibus? target ? lun ? # scsi tapes
cd* at scsibus? target ? lun ? # scsi cd's
-pseudo-device sl # slip
-pseudo-device ppp # ppp
+pseudo-device loop 1 # network loopback
+pseudo-device sl 1 # slip
+pseudo-device ppp 1 # ppp
+#pseudo-device tun 1 # network tunnel line discipline
+pseudo-device bpfilter 4 # berkeley packet filters
+
pseudo-device view 10 # views
pseudo-device pty 16 # pseudo terminals
-pseudo-device loop # network loopback
-pseudo-device vnd 4
-#pseudo-device bpfilter 2 # berkeley packet filters
-#pseudo-device tun 2
+
+pseudo-device vnd 4 # paging to files
config bsd swap on generic
-# $NetBSD: Makefile.amiga,v 1.37 1996/02/09 02:21:17 mycroft Exp $
+# $OpenBSD: Makefile.amiga,v 1.10 1996/03/30 22:18:10 niklas Exp $
+# $NetBSD: Makefile.amiga,v 1.40 1996/03/15 20:09:52 is Exp $
# Makefile for OpenBSD
#
# DEBUG is set to -g if debugging.
# PROF is set to -pg if profiling.
-AS= as
-AWK= awk
-CC= cc
-CPP= cpp
-LD= ld
-STRIP= strip -d
-TOUCH= touch -f -c
+AS?= as
+CC?= cc
+CPP?= cpp
+LD?= ld
+STRIP?= strip -d
+TOUCH?= touch -f -c
# source tree is located via $S relative to the compilation directory
S= ../../../..
INCLUDES= -I. -I$S/arch -I$S
CPPFLAGS= ${INCLUDES} ${IDENT} -D_KERNEL -Dmc68020 -Damiga
-CFLAGS= ${DEBUG} -O2 -Werror -mc68020 -msoft-float
+.if empty(IDENT:M-DM68060)
+CFLAGS= ${DEBUG} -O2 -Werror -m68020 -msoft-float ${COPTS}
+.else
+CFLAGS= ${DEBUG} -O2 -Werror -m68060 -msoft-float ${COPTS}
+.endif
+
AFLAGS= -x assembler-with-cpp -traditional-cpp -D_LOCORE
LINKFLAGS= -n -Ttext 0 -e start
clean::
- rm -f eddep *netbsd netbsd.gdb tags *.[io] [a-z]*.s \
+ rm -f eddep *bsd bsd.gdb tags *.[io] [a-z]*.s \
[Ee]rrs linterrs makelinks genassym genassym.o assym.h
lint:
-# $OpenBSD: files.amiga,v 1.7 1996/03/24 16:50:15 niklas Exp $
-# $NetBSD: files.amiga,v 1.34 1996/02/24 08:59:21 chopps Exp $
+# $OpenBSD: files.amiga,v 1.8 1996/03/30 22:18:10 niklas Exp $
+# $NetBSD: files.amiga,v 1.36 1996/03/02 14:00:32 veego Exp $
# maxpartitions must be first item in files.${ARCH}
maxpartitions 16 # NOTE THAT AMIGA IS SPECIAL!
# cirrus grf
device grfcl at zbus: grfbus
file arch/amiga/dev/grf_cl.c grfcl needs-flag
-file arch/amiga/dev/ite_cl.c grfcl ite
+file arch/amiga/dev/ite_cl.c grfcl ite
# CyberVison 64 grf
device grfcv at zbus: grfbus
file arch/amiga/dev/grf_cv.c grfcv needs-flag
+file arch/amiga/dev/ite_cv.c grfcv ite
# A2410 grf
device grful at zbus: grfbus
-/* $NetBSD: afsc.c,v 1.10 1996/01/28 19:23:24 chopps Exp $ */
+/* $OpenBSD: afsc.c,v 1.3 1996/03/30 22:18:12 niklas Exp $ */
+/* $NetBSD: afsc.c,v 1.11 1996/03/15 22:11:09 mhitch Exp $ */
/*
* Copyright (c) 1994 Michael L. Hitch
NULL, "afsc", (cfmatch_t)afscmatch, afscattach,
DV_DULL, sizeof(struct siop_softc), NULL, 0 };
struct cfdriver aftsccd = {
- NULL, "afsc", (cfmatch_t)afscmatch, afscattach,
+ NULL, "aftsc", (cfmatch_t)afscmatch, afscattach,
DV_DULL, sizeof(struct siop_softc), NULL, 0 };
/*
return(1); /* It's an A4091 SCSI card */
if (!is_a4000() || !matchname(auxp, "afsc"))
return(0); /* Not on an A4000 or not A4000T SCSI */
-#ifdef DEBUG
- printf("afscmatch: probing for A4000T\n");
-#endif
rp = ztwomap(0xdd0040);
if (badaddr(&rp->siop_scratch) || badaddr(&rp->siop_temp)) {
-#ifdef DEBUG
- printf("afscmatch: A4000T probed bad address\n");
-#endif
return(0);
}
scratch = rp->siop_scratch;
temp = rp->siop_temp;
rp->siop_scratch = 0xdeadbeef;
rp->siop_temp = 0xaaaa5555;
-#ifdef DEBUG
- printf("afscmatch: probe %x %x %x %x\n", scratch, temp,
- rp->siop_scratch, rp->siop_temp);
-#endif
if (rp->siop_scratch != 0xdeadbeef || rp->siop_temp != 0xaaaa5555)
return(0);
rp->siop_scratch = scratch;
* CTEST7 = 80 [disable burst]
*/
sc->sc_clock_freq = 50; /* Clock = 50Mhz */
- sc->sc_ctest7 = 0x80; /* CDIS */
+ sc->sc_ctest7 = SIOP_CTEST7_CDIS;
+ sc->sc_dcntl = SIOP_DCNTL_EA;
sc->sc_link.adapter_softc = sc;
sc->sc_link.adapter_target = 7;
-/* $NetBSD: grf_cl.c,v 1.5 1995/10/09 03:47:44 chopps Exp $ */
+/* $OpenBSD: grf_cl.c,v 1.2 1996/03/30 22:18:13 niklas Exp $ */
+/* $NetBSD: grf_cl.c,v 1.6 1996/03/05 18:08:33 is Exp $ */
/*
* Copyright (c) 1995 Ezra Story
* Graphics routines for Cirrus CL GD 5426 boards,
*
* This code offers low-level routines to access Cirrus Cl GD 5426
- * graphics-boards from within NetBSD for the Amiga.
+ * graphics-boards from within OpenBSD for the Amiga.
* No warranties for any kind of function at all - this
* code may crash your hardware and scratch your harddisk. Use at your
* own risk. Freely distributable.
* Lutz Vieweg's retina driver by Kari Mettinen 08/94
* Contributions by Ill, ScottE, MiL
* Extensively hacked and rewritten by Ezra Story (Ezy) 01/95
+ * Picasso/040 patches (wee!) by crest 01/96
*
* Thanks to Village Tronic Marketing Gmbh for providing me with
* a Picasso-II board.
ba = gfp->g_regkva;
/* first read colors out of the chip, then copyout to userspace */
- vgaw(ba, VDAC_ADDRESS_W, cmap->index);
+ vgaw(ba, VDAC_ADDRESS_R, cmap->index);
x = cmap->count - 1;
/* Some sort 'o Magic. Spectrum has some changes on the board to speed
(clkdiv << 1));
delay(200000);
- vgaw(ba, VDAC_MASK, 0xff);
+
+ /* write 0x00 to VDAC_MASK before accessing HDR this helps
+ sometimes, out of "secret" application note (crest) */
+ vgaw(ba, VDAC_MASK, 0);
+ delay(200000);
+ /* reset HDR "magic" access counter (crest) */
+ vgar(ba, VDAC_ADDRESS);
+
delay(200000);
vgar(ba, VDAC_MASK);
delay(200000);
HDE = (gv->disp_width / 8) * 3;
break;
}
+ delay(20000);
+
+ /* reset HDR "magic" access counter (crest) */
+ vgar(ba, VDAC_ADDRESS);
delay(200000);
+ /* then enable all bit in VDAC_MASK afterwards (crest) */
+ vgaw(ba, VDAC_MASK, 0xff);
+ delay(20000);
WCrt(ba, CRT_ID_OFFSET, HDE);
WCrt(ba, CRT_ID_EXT_DISP_CNTL,
+/* $OpenBSD: grf_clreg.h,v 1.2 1996/03/30 22:18:14 niklas Exp $ */
/*
* Copyright (c) 1995 Ezra Story
#define PASS_ADDRESS_WP 0x9000
/* Video DAC */
-#define VDAC_ADDRESS 0x03c8
-#define VDAC_ADDRESS_W 0x03c8
-#define VDAC_ADDRESS_R 0x03c7
-#define VDAC_STATE 0x03c7
-#define VDAC_DATA 0x03c9
-#define VDAC_MASK 0x03c6
-#define HDR 0x03c6 /* Hidden DAC register, 4 reads to access */
+#define VDAC_ADDRESS 0x03c8
+#define VDAC_ADDRESS_W 0x03c8
+#define VDAC_ADDRESS_R ((cltype==PICASSO)?0x03c7+0xfff:0x3c7)
+#define VDAC_STATE 0x03c7
+#define VDAC_DATA ((cltype==PICASSO)?0x03c9+0xfff:0x3c9)
+#define VDAC_MASK 0x03c6
+#define HDR 0x03c6 /* Hidden DAC register, 4 reads to access */
#define WGfx(ba, idx, val) \
#define WAttr(ba, idx, val) \
do { \
- unsigned char tmp;\
- vgaw(ba, CRT_ADDRESS, CRT_ID_ACT_TOGGLE_RBACK);\
- tmp = vgar(ba, CRT_ADDRESS_R);\
- if(tmp & 0x80)vgaw(ba,ACT_ADDRESS_W,vgar(ba,ACT_ADDRESS_R));\
+ vgar(ba, ACT_ADDRESS_RESET);\
vgaw(ba, ACT_ADDRESS_W, idx);\
vgaw(ba, ACT_ADDRESS_W, val);\
} while (0)
}
static inline unsigned char RAttr(volatile void * ba, short idx) {
-
- unsigned char tmp;
- vgaw(ba, CRT_ADDRESS, CRT_ID_ACT_TOGGLE_RBACK);
- tmp = vgar(ba, CRT_ADDRESS_R);
- if(tmp & 0x80)vgar(ba,ACT_ADDRESS_R);
+ vgar(ba, ACT_ADDRESS_RESET);
vgaw(ba, ACT_ADDRESS_W, idx);
return vgar (ba, ACT_ADDRESS_R);
}
-/* $OpenBSD: grf_cv.c,v 1.5 1996/02/26 21:08:00 niklas Exp $ */
-/* $NetBSD: grf_cv.c,v 1.6 1996/02/24 20:13:01 chopps Exp $ */
+/* $OpenBSD: grf_cv.c,v 1.6 1996/03/30 22:18:15 niklas Exp $ */
+/* $NetBSD: grf_cv.c,v 1.9 1996/03/06 16:40:16 is Exp $ */
/*
* Copyright (c) 1995 Michael Teske
* Mettinen and by Bernd Ernesti.
* 4. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission
- *
+ *
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
+ */
#include "grfcv.h"
#if NGRFCV > 0
-#undef CV64CONSOLE /* DO NOT REMOVE THIS till ite5 is ready */
-
/*
* Graphics routines for the CyberVision 64 board, using the S3 Trio64.
*
*
* TODO:
* Hardware Cursor support
- * Blitter support
- *
- * BUGS:
- * Xamiag24 and grf_cv can crash when you use fvwm with xterm's, you can
- * avoid this by starting the xterm with '-ah', see the manpage of xterm
- * for more informations about this switch.
- * There is a bug in the Trio64 which produce a small (1 or 2 pixel) white
- * vertical bar on the right side of an 8bit-Screen (only when you use more
- * then 80MHz pixelclock). This has to be fixed in the Xserver.
- *
*/
#include <sys/param.h>
#include <sys/systm.h>
#include <machine/cpu.h>
#include <dev/cons.h>
+#include <amiga/dev/itevar.h>
#include <amiga/amiga/device.h>
#include <amiga/dev/grfioctl.h>
#include <amiga/dev/grfvar.h>
void grfcvattach __P((struct device *, struct device *, void *));
int grfcvprint __P((void *, char *));
-static int cv_has_4mb __P((volatile char *));
+static int cv_has_4mb __P((volatile caddr_t));
static unsigned short compute_clock __P((unsigned long));
void cv_boardinit __P((struct grf_softc *));
int cv_getvmode __P((struct grf_softc *, struct grfvideo_mode *));
int cv_load_mon __P((struct grf_softc *, struct grfcvtext_mode *));
void cv_inittextmode __P((struct grf_softc *));
void cv_memset __P((unsigned char *, unsigned char, int));
-
-#ifdef CV64CONSOLE
-extern void grfcv_iteinit __P((struct grf_softc *));
-#endif
+static inline void cv_write_port __P((unsigned short, volatile caddr_t));
+static inline void cvscreen __P((int, volatile caddr_t));
+static inline void gfx_on_off __P((int, volatile caddr_t));
/* Graphics display definitions.
* These are filled by 'grfconfig' using GRFIOCSETMON.
*/
-#define monitor_def_max 8
-static struct grfvideo_mode monitor_def[8] = {
+#define monitor_def_max 24
+static struct grfvideo_mode monitor_def[24] = {
+ {0}, {0}, {0}, {0}, {0}, {0}, {0}, {0},
+ {0}, {0}, {0}, {0}, {0}, {0}, {0}, {0},
{0}, {0}, {0}, {0}, {0}, {0}, {0}, {0}
};
static struct grfvideo_mode *monitor_current = &monitor_def[0];
*/
/* Console font */
+#ifdef KFONT_8X11
+#define S3FONT kernel_font_8x11
+#define S3FONTY 11
+#else
#define S3FONT kernel_font_8x8
-#define S3FONTX 8
#define S3FONTY 8
+#endif
extern unsigned char S3FONT[];
+/*
+ * Define default console mode
+ * (Internally, we still have to use hvalues/8!)
+ */
struct grfcvtext_mode cvconsole_mode = {
- {255, "", 25000000, 640, 400, 4, 640, 656, 672, 720, 760, 406,
- 441, 412, 426, 447},
- S3FONTX, S3FONTY, 80, 506/S3FONTY, S3FONT, 32, 255
+ {255, "", 25000000, 640, 480, 4, 640/8, 784/8, 680/8, 768/8, 800/8,
+ 481, 521, 491, 493, 525},
+ 8, S3FONTY, 80, 480 / S3FONTY, S3FONT, 32, 255
};
/* Console colors */
-unsigned char cvconscolors[3][3] = { /* background, foreground, hilite */
- {0,0x40,0x50}, {152,152,152}, {255,255,255}
+unsigned char cvconscolors[4][3] = { /* background, foreground, hilite */
+ {0x30, 0x30, 0x30}, {0, 0, 0}, {0x18, 0x20, 0x34}, {0x2a, 0x2a, 0x2a}
};
+static unsigned char clocks[]={
+0x13, 0x61, 0x6b, 0x6d, 0x51, 0x69, 0x54, 0x69,
+0x4f, 0x68, 0x6b, 0x6b, 0x18, 0x61, 0x7b, 0x6c,
+0x51, 0x67, 0x24, 0x62, 0x56, 0x67, 0x77, 0x6a,
+0x1d, 0x61, 0x53, 0x66, 0x6b, 0x68, 0x79, 0x69,
+0x7c, 0x69, 0x7f, 0x69, 0x22, 0x61, 0x54, 0x65,
+0x56, 0x65, 0x58, 0x65, 0x67, 0x66, 0x41, 0x63,
+0x27, 0x61, 0x13, 0x41, 0x37, 0x62, 0x6b, 0x4d,
+0x23, 0x43, 0x51, 0x49, 0x79, 0x66, 0x54, 0x49,
+0x7d, 0x66, 0x34, 0x56, 0x4f, 0x63, 0x1f, 0x42,
+0x6b, 0x4b, 0x7e, 0x4d, 0x18, 0x41, 0x2a, 0x43,
+0x7b, 0x4c, 0x74, 0x4b, 0x51, 0x47, 0x65, 0x49,
+0x24, 0x42, 0x68, 0x49, 0x56, 0x47, 0x75, 0x4a,
+0x77, 0x4a, 0x31, 0x43, 0x1d, 0x41, 0x71, 0x49,
+0x53, 0x46, 0x29, 0x42, 0x6b, 0x48, 0x1f, 0x41,
+0x79, 0x49, 0x6f, 0x48, 0x7c, 0x49, 0x38, 0x43,
+0x7f, 0x49, 0x5d, 0x46, 0x22, 0x41, 0x53, 0x45,
+0x54, 0x45, 0x55, 0x45, 0x56, 0x45, 0x57, 0x45,
+0x58, 0x45, 0x25, 0x41, 0x67, 0x46, 0x5b, 0x45,
+0x41, 0x43, 0x78, 0x47, 0x27, 0x41, 0x51, 0x44,
+0x13, 0x21, 0x7d, 0x47, 0x37, 0x42, 0x71, 0x46,
+0x6b, 0x2d, 0x14, 0x21, 0x23, 0x23, 0x7d, 0x2f,
+0x51, 0x29, 0x61, 0x2b, 0x79, 0x46, 0x1d, 0x22,
+0x54, 0x29, 0x45, 0x27, 0x7d, 0x46, 0x7f, 0x46,
+0x4f, 0x43, 0x2f, 0x41, 0x1f, 0x22, 0x6a, 0x2b,
+0x6b, 0x2b, 0x5b, 0x29, 0x7e, 0x2d, 0x65, 0x44,
+0x18, 0x21, 0x5e, 0x29, 0x2a, 0x23, 0x45, 0x26,
+0x7b, 0x2c, 0x19, 0x21, 0x74, 0x2b, 0x75, 0x2b,
+0x51, 0x27, 0x3f, 0x25, 0x65, 0x29, 0x40, 0x25,
+0x24, 0x22, 0x41, 0x25, 0x68, 0x29, 0x42, 0x25,
+0x56, 0x27, 0x7e, 0x2b, 0x75, 0x2a, 0x1c, 0x21,
+0x77, 0x2a, 0x4f, 0x26, 0x31, 0x23, 0x6f, 0x29,
+0x1d, 0x21, 0x32, 0x23, 0x71, 0x29, 0x72, 0x29,
+0x53, 0x26, 0x69, 0x28, 0x29, 0x22, 0x75, 0x29,
+0x6b, 0x28, 0x1f, 0x21, 0x1f, 0x21, 0x6d, 0x28,
+0x79, 0x29, 0x2b, 0x22, 0x6f, 0x28, 0x59, 0x26,
+0x7c, 0x29, 0x7d, 0x29, 0x38, 0x23, 0x21, 0x21,
+0x7f, 0x29, 0x39, 0x23, 0x5d, 0x26, 0x75, 0x28,
+0x22, 0x21, 0x77, 0x28, 0x53, 0x25, 0x6c, 0x27,
+0x54, 0x25, 0x61, 0x26, 0x55, 0x25, 0x30, 0x22,
+0x56, 0x25, 0x63, 0x26, 0x57, 0x25, 0x71, 0x27,
+0x58, 0x25, 0x7f, 0x28, 0x25, 0x21, 0x74, 0x27,
+0x67, 0x26, 0x40, 0x23, 0x5b, 0x25, 0x26, 0x21,
+0x41, 0x23, 0x34, 0x22, 0x78, 0x27, 0x6b, 0x26,
+0x27, 0x21, 0x35, 0x22, 0x51, 0x24, 0x7b, 0x27,
+0x13, 0x1, 0x13, 0x1, 0x7d, 0x27, 0x4c, 0x9,
+0x37, 0x22, 0x5b, 0xb, 0x71, 0x26, 0x5c, 0xb,
+0x6b, 0xd, 0x47, 0x23, 0x14, 0x1, 0x4f, 0x9,
+0x23, 0x3, 0x75, 0x26, 0x7d, 0xf, 0x1c, 0x2,
+0x51, 0x9, 0x59, 0x24, 0x61, 0xb, 0x69, 0x25,
+0x79, 0x26, 0x34, 0x5, 0x1d, 0x2, 0x6b, 0x25,
+0x54, 0x9, 0x35, 0x5, 0x45, 0x7, 0x6d, 0x25,
+0x7d, 0x26, 0x16, 0x1, 0x7f, 0x26, 0x77, 0xd,
+0x4f, 0x23, 0x78, 0xd, 0x2f, 0x21, 0x27, 0x3,
+0x1f, 0x2, 0x59, 0x9, 0x6a, 0xb, 0x73, 0x25,
+0x6b, 0xb, 0x63, 0x24, 0x5b, 0x9, 0x20, 0x2,
+0x7e, 0xd, 0x4b, 0x7, 0x65, 0x24, 0x43, 0x22,
+0x18, 0x1, 0x6f, 0xb, 0x5e, 0x9, 0x70, 0xb,
+0x2a, 0x3, 0x33, 0x4, 0x45, 0x6, 0x60, 0x9,
+0x7b, 0xc, 0x19, 0x1, 0x19, 0x1, 0x7d, 0xc,
+0x74, 0xb, 0x50, 0x7, 0x75, 0xb, 0x63, 0x9,
+0x51, 0x7, 0x23, 0x2, 0x3f, 0x5, 0x1a, 0x1,
+0x65, 0x9, 0x2d, 0x3, 0x40, 0x5, 0x0, 0x0,
+};
-/* Board Address of CV64 */
+/* Board Address of CV64 */
static volatile caddr_t cv_boardaddr;
static int cv_fbsize;
-int
-grfcv_cnprobe()
-{
- int rv;
- rv = CN_DEAD;
- return (rv);
-}
+/*
+ * Memory clock (binpatchable).
+ * Let's be defensive: 45 MHz runs on all boards I know of.
+ * 55 MHz runs on most boards. But you should know what you're doing
+ * if you set this flag. Again: This flag may destroy your CV Board.
+ * Use it at your own risk!!!
+ * Anyway, this doesn't imply that I'm responsible if your board breaks
+ * without setting this flag :-).
+ */
+#ifdef CV_AGGRESSIVE_TIMING
+long cv_memclk = 55000000;
+#else
+long cv_memclk = 45000000;
+#endif
/* standard driver stuff */
struct cfdriver grfcvcd = {
static struct cfdata *cfdata;
-/* Reads from the fb must be done at addr + 0x02000000 */
-#define READ_OFFSET 0x02000000
-
/*
* Get frambuffer memory size.
* phase5 didn't provide the bit in CR36,
* so we have to do it this way.
* Return 0 for 2MB, 1 for 4MB
*/
-
static int
-cv_has_4mb (volatile char *fb)
+cv_has_4mb(fb)
+ volatile caddr_t fb;
{
volatile unsigned long *testfbw, *testfbr;
/* write patterns in memory and test if they can be read */
- testfbw = (volatile unsigned long *) fb;
+ testfbw = (volatile unsigned long *)fb;
+ testfbr = (volatile unsigned long *)(fb + 0x02000000);
*testfbw = 0x87654321;
- testfbr = (volatile unsigned long *)(fb + READ_OFFSET);
if (*testfbr != 0x87654321)
return (0);
+
/* upper memory region */
testfbw = (volatile unsigned long *)(fb + 0x00200000);
- testfbr = (volatile unsigned long *)(fb + 0x00200000 + READ_OFFSET);
+ testfbr = (volatile unsigned long *)(fb + 0x02200000);
*testfbw = 0x87654321;
if (*testfbr != 0x87654321)
return (0);
void *auxp;
{
struct zbus_args *zap;
+ static int cvcons_unit = -1;
zap = auxp;
-#ifndef CV64CONSOLE
if (amiga_realconfig == 0)
- return (0);
+#ifdef CV64CONSOLE
+ if (cvcons_unit != -1)
#endif
+ return (0);
- /* Lets be Paranoid: Test man and prod id */
+ /* Lets be Paranoid: Test man and prod id */
if (zap->manid != 8512 || zap->prodid != 34)
return (0);
#ifdef CV64CONSOLE
if (amiga_realconfig == 0) {
+ cvcons_unit = cfp->cf_unit;
cfdata = cfp;
}
#endif
struct device *pdp, *dp;
void *auxp;
{
+ static struct grf_softc congrf;
struct zbus_args *zap;
struct grf_softc *gp;
+ static char attachflag = 0;
zap = auxp;
- printf("\n");
+ /*
+ * This function is called twice, once on console init (dp == NULL)
+ * and once on "normal" grf5 init.
+ */
+
+ if (dp == NULL) /* console init */
+ gp = &congrf;
+ else
+ gp = (struct grf_softc *)dp;
- gp = (struct grf_softc *)dp;
+ if (dp != NULL && congrf.g_regkva != 0) {
+ /*
+ * inited earlier, just copy (not device struct)
+ */
- gp->g_regkva = (volatile caddr_t)cv_boardaddr + READ_OFFSET;
- gp->g_fbkva = (volatile caddr_t)cv_boardaddr + 0x01400000;
+ printf("\n");
+#ifdef CV64CONSOLE
+ bcopy(&congrf.g_display, &gp->g_display,
+ (char *) &gp[1] - (char *) &gp->g_display);
+#else
+ gp->g_regkva = (volatile caddr_t)cv_boardaddr + 0x02000000;
+ gp->g_fbkva = (volatile caddr_t)cv_boardaddr + 0x01400000;
- gp->g_unit = GRF_CV64_UNIT;
- gp->g_mode = cv_mode;
- gp->g_conpri = grfcv_cnprobe();
- gp->g_flags = GF_ALIVE;
+ gp->g_unit = GRF_CV64_UNIT;
+ gp->g_mode = cv_mode;
+ gp->g_conpri = grfcv_cnprobe();
+ gp->g_flags = GF_ALIVE;
+#endif
+ } else {
+ gp->g_regkva = (volatile caddr_t)cv_boardaddr + 0x02000000;
+ gp->g_fbkva = (volatile caddr_t)cv_boardaddr + 0x01400000;
+
+ gp->g_unit = GRF_CV64_UNIT;
+ gp->g_mode = cv_mode;
+ gp->g_conpri = grfcv_cnprobe();
+ gp->g_flags = GF_ALIVE;
- /* wakeup the board */
- cv_boardinit(gp);
+ /* wakeup the board */
+ cv_boardinit(gp);
#ifdef CV64CONSOLE
- grfcv_iteinit(gp);
- (void)cv_load_mon(gp, &cvconsole_mode);
+ grfcv_iteinit(gp);
+ (void)cv_load_mon(gp, &cvconsole_mode);
#endif
+ }
/*
* attach grf
*/
- if (amiga_config_found(cfdata, &gp->g_device, gp, grfcvprint))
- printf("grfcv: CyberVision64 with %dMB being used\n", cv_fbsize/0x100000);
+ if (amiga_config_found(cfdata, &gp->g_device, gp, grfcvprint)) {
+ if (dp != NULL)
+ printf("grfcv: CyberVision64 with %dMB being used\n", cv_fbsize/0x100000);
+ attachflag = 1;
+ } else {
+ if (!attachflag)
+ /*printf("grfcv unattached!!\n")*/;
+ }
}
int
compute_clock(freq)
unsigned long freq;
{
-
static unsigned char *mnr, *save; /* M, N + R vals */
unsigned long work_freq, r;
unsigned short erg;
long diff, d2;
- /* 0xBEBC20 = 12.5M */
- /* 0x080BEFC0 = 135M */
- if (freq < 0x00BEBC20 || freq > 0x080BEFC0) {
- printf("grfcv: Wrong clock frequency: %dMHz", freq/1000000);
- printf("grfcv: Using default frequency: 25MHz");
- freq = 0x017D7840;
+ if (freq < 12500000 || freq > MAXPIXELCLOCK) {
+ printf("grfcv: Illegal clock frequency: %ldMHz\n", freq/1000000);
+ printf("grfcv: Using default frequency: 25MHz\n");
+ printf("grfcv: See the manpage of grfconfig for more informations.\n");
+ freq = 25000000;
}
mnr = clocks; /* there the vals are stored */
work_freq = (0x37EE * (mnr[0] + 2)) / ((mnr[1] & 0x1F) + 2);
r = (mnr[1] >> 5) & 0x03;
- if (r != 0)
+ if (r != 0)
work_freq=work_freq >> r; /* r is the freq divider */
work_freq *= 0x3E8; /* 2nd part of OSC */
cv_boardinit(gp)
struct grf_softc *gp;
{
- volatile caddr_t ba = gp->g_regkva;
+ volatile caddr_t ba;
unsigned char test;
unsigned int clockpar;
int i;
struct grfinfo *gi;
+ ba = gp->g_regkva;
/* Reset board */
for (i = 0; i < 6; i++)
- cv_write_port (0xff, ba - READ_OFFSET); /* Clear all bits */
+ cv_write_port (0xff, ba - 0x02000000); /* Clear all bits */
/* Return to operational Mode */
- cv_write_port(0x8004, ba - READ_OFFSET);
+ cv_write_port(0x8004, ba - 0x02000000);
/* Wakeup Chip */
vgaw(ba, SREG_VIDEO_SUBS_ENABLE, 0x10);
/*
* bit 1=1: enable enhanced mode functions
* bit 4=1: enable linear adressing
+ * bit 5=1: enable MMIO
*/
- vgaw(ba, ECR_ADV_FUNC_CNTL, 0x11);
+ vgaw(ba, ECR_ADV_FUNC_CNTL, 0x31);
/* enable cpu acess, color mode, high 64k page */
vgaw(ba, GREG_MISC_OUTPUT_W, 0x23);
test = test | 1 << 6;
WSeq(ba, SEQ_ID_BUS_REQ_CNTL, test);
/* faster LUT write */
- WSeq(ba, SEQ_ID_RAMDAC_CNTL, 0x40);
+ WSeq(ba, SEQ_ID_RAMDAC_CNTL, 0xC0);
test = RSeq(ba, SEQ_ID_CLKSYN_CNTL_2); /* Clksyn2 read */
/* immediately Clkload bit clear */
test = test & 0xDF;
+
+ /* 2 MCLK Memory Write.... */
+ if (cv_memclk >= 55000000)
+ test |= 0x80;
+
WSeq(ba, SEQ_ID_CLKSYN_CNTL_2, test);
- clockpar = compute_clock(0x3473BC0);
+ /* Memory CLK */
+ clockpar = compute_clock(cv_memclk);
test = (clockpar & 0xFF00) >> 8;
-
- if (RCrt(ba, CRT_ID_REVISION) == 0x10) {
- WSeq(ba, SEQ_ID_MCLK_HI, test); /* PLL N-Divider Value */
-
- test = clockpar & 0xFF;
- WSeq(ba, SEQ_ID_MCLK_LO, test); /* PLL M-Divider Value */
-
- test = (clockpar & 0xFF00) >> 8;
+ WSeq(ba, SEQ_ID_MCLK_HI, test); /* PLL N-Divider Value */
+ if (RCrt(ba, CRT_ID_REVISION) == 0x10) /* bugfix for new S3 chips */
WSeq(ba, SEQ_ID_MORE_MAGIC, test);
- } else {
- WSeq(ba, SEQ_ID_MCLK_HI, test); /* PLL N-Divider Value */
- test = clockpar & 0xFF;
- WSeq(ba, SEQ_ID_MCLK_LO, test); /* PLL M-Divider Value */
- }
+ test = clockpar & 0xFF;
+ WSeq(ba, SEQ_ID_MCLK_LO, test); /* PLL M-Divider Value */
/* We now load an 25 MHz, 31 kHz, 640x480 standard VGA Mode. */
/* DCLK */
WCrt(ba, CRT_ID_LAW_CNTL, 0x13);
/* find *correct* fbsize of z3 board */
- if (cv_has_4mb((volatile char *)cv_boardaddr + 0x01400000)) {
+ if (cv_has_4mb((volatile caddr_t)cv_boardaddr + 0x01400000)) {
cv_fbsize = 1024 * 1024 * 4;
WCrt(ba, CRT_ID_LAW_CNTL, 0x13); /* 4 MB */
} else {
WCrt(ba, CRT_ID_LAW_CNTL, 0x12); /* 2 MB */
}
- /* If I knew what this really does... but it _is_ necessary
- to get any gfx on the screen!! Undocumented register? */
+ /* Enable Video Display (Set Bit 5) */
WAttr(ba, 0x33, 0);
- gi = &gp->g_display;
- gi->gd_regaddr = (caddr_t) kvtop (ba);
- gi->gd_regsize = 64 * 1024;
- gi->gd_fbaddr = (caddr_t) kvtop (gp->g_fbkva);
- gi->gd_fbsize = cv_fbsize;
+ gi = &gp->g_display;
+ gi->gd_regaddr = (caddr_t) kvtop (ba);
+ gi->gd_regsize = 64 * 1024;
+ gi->gd_fbaddr = (caddr_t) kvtop (gp->g_fbkva);
+ gi->gd_fbsize = cv_fbsize;
}
struct grf_softc *gp;
unsigned mode;
{
+
if (!mode || (mode > monitor_def_max) ||
monitor_def[mode - 1].mode_num == 0)
return (EINVAL);
struct grf_softc *gp;
int *on;
{
- volatile caddr_t ba = gp->g_regkva;
+ volatile caddr_t ba;
- gfx_on_off(*on ? 1 : 0, ba);
+ ba = gp->g_regkva;
+ gfx_on_off(*on ? 0 : 1, ba);
return (0);
}
(void)cv_toggle(gp);
#else
cv_load_mon(gp, &cvconsole_mode);
+ ite_reinit(gp->g_itedev);
#endif
return (0);
short x;
int error;
+ ba = gfp->g_regkva;
if (cmap->count == 0 || cmap->index >= 256)
return (0);
if (cmap->index + cmap->count > 256)
cmap->count = 256 - cmap->index;
- ba = gfp->g_regkva;
/* first read colors out of the chip, then copyout to userspace */
vgaw (ba, VDAC_ADDRESS_W, cmap->index);
x = cmap->count - 1;
short x;
int error;
+ ba = gfp->g_regkva;
if (cmap->count == 0 || cmap->index >= 256)
return (0);
if (!(error = copyin (cmap->red, red + cmap->index, cmap->count))
&& !(error = copyin (cmap->green, green + cmap->index, cmap->count))
&& !(error = copyin (cmap->blue, blue + cmap->index, cmap->count))) {
- ba = gfp->g_regkva;
vgaw (ba, VDAC_ADDRESS_W, cmap->index);
x = cmap->count - 1;
volatile caddr_t ba;
ba = gp->g_regkva;
- cvscreen(1, ba - READ_OFFSET);
+ cvscreen(1, ba - 0x02000000);
return (0);
}
struct grfvideo_mode *gv;
{
unsigned long maxpix;
+ int widthok = 0;
- if (gv->mode_num < 1 || gv->mode_num > monitor_def_max)
- if (gv->mode_num != 255 || gv->depth != 4)
+ if (gv->mode_num < 1 || gv->mode_num > monitor_def_max) {
+ if (gv->mode_num != 255 || (gv->depth != 4 && gv->depth != 8))
return (0);
+ else
+ /*
+ * We have 8 bit console modes. This _is_
+ * a hack but necessary to be compatible.
+ */
+ gv->depth = 8;
+ }
switch(gv->depth) {
case 1:
case 4:
- /* Remove this comment when ite5 is ready */
- /* if (gv->mode_num != 255) */
- return (0);
+ return (0);
case 8:
maxpix = MAXPIXELCLOCK;
break;
case 15:
case 16:
+#ifdef CV_AGGRESSIVE_TIMING
+ maxpix = MAXPIXELCLOCK - 35000000;
+#else
maxpix = MAXPIXELCLOCK - 55000000;
+#endif
break;
case 24:
+ case 32:
+#ifdef CV_AGGRESSIVE_TIMING
+ maxpix = MAXPIXELCLOCK - 75000000;
+#else
maxpix = MAXPIXELCLOCK - 85000000;
+#endif
break;
default:
return (0);
if (gv->pixel_clock > maxpix)
return (0);
+
+ /*
+ * These are the supported witdh values for the
+ * graphics engine. To Support other widths, one
+ * has to use one of these widths for memory alignment, i.e.
+ * one has to set CRT_ID_SCREEN_OFFSET to one of these values and
+ * CRT_ID_HOR_DISP_ENA_END to the desired width.
+ * Since a working graphics engine is essential
+ * for the console, console modes of other width are not supported.
+ * We could do that, though, but then you have to tell the Xserver
+ * about this strange configuration and I don't know how at the moment :-)
+ */
+
+ switch (gv->disp_width) {
+ case 1024:
+ case 640:
+ case 800:
+ case 1280:
+ case 1152:
+ case 1600:
+ widthok = 1;
+ break;
+ default: /* XXX*/
+ widthok = 0;
+ break;
+ }
+
+ if (widthok) return (1);
+ else {
+ if (gv->mode_num == 255) { /* console mode */
+ printf ("This display width is not supported by the CV64 console.\n");
+ printf ("Use one of 640 800 1024 1152 1280 1600!\n");
+ return (0);
+ } else {
+ printf ("Warning for mode %d:\n", (int) gv->mode_num);
+ printf ("Don't use a blitter-suporting Xserver with this display width\n");
+ printf ("Use one of 640 800 1024 1152 1280 1600!\n");
+ return (1);
+ }
+ }
return (1);
}
unsigned short mnr;
unsigned short HT, HDE, HBS, HBE, HSS, HSE, VDE, VBS, VBE, VSS,
VSE, VT;
- char LACE, DBLSCAN, TEXT;
+ char LACE, DBLSCAN, TEXT, CONSOLE;
int uplim, lowlim;
- int cr33, sr15, sr18, clock_mode, test;
- int m, n, clock, i; /* For calc'ing display FIFO */
-
+ int cr50, cr33, sr15, sr18, clock_mode, test;
+ int m, n; /* For calc'ing display FIFO */
+ int tfillm, temptym; /* FIFO fill and empty mclk's */
+ int hmul; /* Multiplier for hor. Values */
/* identity */
gv = &md->gv;
- TEXT = (gv->depth == 4);
+
+ /*
+ * No way to get text modes to work.
+ * Blame phase5, not me!
+ */
+ TEXT = 0; /* (gv->depth == 4); */
+ CONSOLE = (gv->mode_num == 255);
if (!cv_mondefok(gv)) {
- printf("mondef not ok\n");
+ printf("grfcv: The monitor definition is not okay.\n");
+ printf("grfcv: See the manpage of grfconfig for more informations\n");
return (0);
}
ba = gp->g_regkva;
gi->gd_fbheight = gv->disp_height;
gi->gd_fbx = 0;
gi->gd_fby = 0;
- if (TEXT) {
+ if (CONSOLE) {
gi->gd_dwidth = md->fx * md->cols;
gi->gd_dheight = md->fy * md->rows;
} else {
gi->gd_dy = 0;
/* get display mode parameters */
+ switch (gv->depth) {
+ case 15:
+ case 16:
+ hmul = 2;
+ break;
+ default:
+ hmul = 1;
+ break;
+ }
- HBS = gv->hblank_start;
- HBE = gv->hblank_stop;
- HSS = gv->hsync_start;
- HSE = gv->hsync_stop;
- HT = gv->htotal - 5;
+ HBS = gv->hblank_start * hmul;
+ HBE = gv->hblank_stop * hmul;
+ HSS = gv->hsync_start * hmul;
+ HSE = gv->hsync_stop * hmul;
+ HT = gv->htotal*hmul - 5;
VBS = gv->vblank_start - 1;
VSS = gv->vsync_start;
VSE = gv->vsync_stop;
if (TEXT)
HDE = ((gv->disp_width + md->fx - 1) / md->fx) - 1;
else
- HDE = (gv->disp_width + 3) / 8 - 1; /*HBS;*/
+ HDE = (gv->disp_width + 3) * hmul / 8 - 1; /*HBS;*/
VDE = gv->disp_height - 1;
/* figure out whether lace or dblscan is needed */
/* Set clock */
- switch (gv->depth) {
- case 15:
- case 16:
- mnr = compute_clock(gv->pixel_clock * 2);
- break;
- case 24:
- mnr = compute_clock(gv->pixel_clock * 3);
- break;
- default:
- mnr = compute_clock(gv->pixel_clock);
- break;
- }
-
+ mnr = compute_clock(gv->pixel_clock);
WSeq(ba, SEQ_ID_DCLK_HI, ((mnr & 0xFF00) >> 8) );
WSeq(ba, SEQ_ID_DCLK_LO, (mnr & 0xFF));
WGfx(ba, GCT_ID_MISC, (TEXT ? 0x04 : 0x01));
WSeq (ba, SEQ_ID_MEMORY_MODE,
- ((TEXT || (gv->depth == 1)) ? 0x6 : 0x02));
+ ((TEXT || (gv->depth == 1)) ? 0x06 : 0x02));
vgaw(ba, VDAC_MASK, 0xff);
cr33 = RCrt(ba, CRT_ID_BACKWAD_COMP_2);
cr33 &= 0xdf;
clock_mode = 0x00;
+ cr50 = 0x00;
test = RCrt(ba, CRT_ID_EXT_MISC_CNTL_2);
test &= 0xd;
+ /* clear roxxler byte-swapping... */
+ cv_write_port(0x0040, cv_boardaddr);
+ cv_write_port(0x0020, cv_boardaddr);
+
switch (gv->depth) {
case 1:
case 4: /* text */
cr33 |= 0x20;
}
HDE = gv->disp_width / 8;
+ cr50 |= 0x00;
break;
case 15:
+ cv_write_port (0x8020, cv_boardaddr);
clock_mode = 0x30;
HDE = gv->disp_width / 4;
+ cr50 |= 0x10;
break;
case 16:
+ cv_write_port (0x8020, cv_boardaddr);
clock_mode = 0x50;
HDE = gv->disp_width / 4;
+ cr50 |= 0x10;
break;
- case 24:
+ case 24: /* this is really 32 Bit on CV64 */
+ case 32:
+ cv_write_port(0x8040, cv_boardaddr);
clock_mode = 0xd0;
- HDE = (gv->disp_width / 8) * 3;
+ HDE = (gv->disp_width / 2);
+ cr50 |= 0x30;
break;
}
WCrt(ba, CRT_ID_SCREEN_OFFSET, HDE);
test = RCrt(ba, CRT_ID_EXT_SYS_CNTL_2);
+ test &= ~0x30;
/* HDE Overflow in bits 4-5 */
test |= (HDE >> 4) & 0x30;
WCrt(ba, CRT_ID_EXT_SYS_CNTL_2, test);
+ /* Set up graphics engine */
+ switch (gv->disp_width) {
+ case 1024:
+ cr50 |= 0x00;
+ break;
+ case 640:
+ cr50 |= 0x40;
+ break;
+ case 800:
+ cr50 |= 0x80;
+ break;
+ case 1280:
+ cr50 |= 0xc0;
+ break;
+ case 1152:
+ cr50 |= 0x01;
+ break;
+ case 1600:
+ cr50 |= 0x81;
+ break;
+ default: /* XXX*/
+ break;
+ }
+
+ WCrt(ba, CRT_ID_EXT_SYS_CNTL_1, cr50);
+
delay(100000);
WAttr(ba, ACT_ID_ATTR_MODE_CNTL, (TEXT ? 0x0a : 0x41));
delay(100000);
delay(100000);
/*
- * Calc. display fifo m and n parameters
- * Dont't ask me what the hell these values mean.
+ * M-Parameter of Display FIFO
+ * This is dependant on the pixel clock and the memory clock.
+ * The FIFO filling bandwidth is 240 MHz and the FIFO is 96 Byte wide.
+ * Then the time to fill the FIFO is tfill = (96/240000000) sec, the
+ * time to empty the FIFO is tempty = (96/pixelclock) sec.
+ * Then the M parameter maximum is ((tempty-tfill)*cv_memclk-9)/2.
+ * This seems to be logical, ain't it?
+ * Remember: We have to use integer arithmetics :(
+ * Divide by 1000 to prevent overflows.
*/
- n = 0xff;
- if (gv->depth < 9)
- clock = gv->pixel_clock / 500000;
- else if (gv->depth == 15)
- clock = gv->pixel_clock / 250000;
- else
- clock = (gv->pixel_clock * (gv->depth / 8)) / 500000;
-#if 0
- /*
- * Note: if you change this you should change it in
- * gen_cvtab.c and regenerate the conversion table
- * rerun gen_cvtab
- */
- m = (int)((55 * .72 + 16.867) * 89.736 / (clock + 39) - 21.1543)
- m = (m / 2) - 1;
- if (m > 31)
- m = 31;
- else if (m <= 0) {
- m = 0;
- n = 16;
+ tfillm = (96 * (cv_memclk/1000))/240000;
+
+ switch(gv->depth) {
+ case 32:
+ case 24:
+ temptym = (24 * (cv_memclk/1000)) / (gv->pixel_clock/1000);
+ break;
+ case 15:
+ case 16:
+ temptym = (48 * (cv_memclk/1000)) / (gv->pixel_clock/1000);
+ break;
+ default:
+ temptym = (96 * (cv_memclk/1000)) / (gv->pixel_clock/1000);
+ break;
}
-#endif
- for (m = 0; m < 31; ++m)
- if (clock >= cv_convtab[m])
- break;
- if (m == 0)
- n = 16;
- m = m << 3;
+ m = (temptym - tfillm - 9) / 2;
+ m = (m & 0x1f) << 3;
+ if (m < 0x18)
+ m = 0x18;
+ n = 0xff;
+
WCrt(ba, CRT_ID_EXT_MEM_CNTL_2, m);
WCrt(ba, CRT_ID_EXT_MEM_CNTL_3, n);
delay(10000);
cv_inittextmode(gp);
}
+ if (CONSOLE) {
+ int i;
+ vgaw(ba, VDAC_ADDRESS_W, 0);
+ for (i = 0; i < 4; i++) {
+ vgaw(ba, VDAC_DATA, cvconscolors[i][0]);
+ vgaw(ba, VDAC_DATA, cvconscolors[i][1]);
+ vgaw(ba, VDAC_DATA, cvconscolors[i][2]);
+ }
+ }
+
/* Some kind of Magic */
WAttr(ba, 0x33, 0);
gfx_on_off(0, ba);
/* Pass-through */
- cvscreen(0, ba - READ_OFFSET);
+ cvscreen(0, ba - 0x02000000);
return (1);
}
struct grf_softc *gp;
{
struct grfcvtext_mode *tm = (struct grfcvtext_mode *)gp->g_data;
- volatile caddr_t ba = gp->g_regkva;
- volatile caddr_t fb = gp->g_fbkva;
+ volatile caddr_t ba, fb;
unsigned char *c, *f, y;
unsigned short z;
+ ba = gp->g_regkva;
+ fb = gp->g_fbkva;
/* load text font into beginning of display memory.
* Each character cell is 32 bytes long (enough for 4 planes)
*d++ = c;
}
+
+static inline void
+cv_write_port(bits, BoardAddr)
+ unsigned short bits;
+ volatile caddr_t BoardAddr;
+{
+ volatile caddr_t addr;
+ static unsigned char CVPortBits = 0; /* mirror port bits here */
+
+ addr = BoardAddr + 0x40001;
+ if (bits & 0x8000)
+ CVPortBits |= bits & 0xFF; /* Set bits */
+ else {
+ bits = bits & 0xFF;
+ bits = (~bits) & 0xFF ;
+ CVPortBits &= bits; /* Clear bits */
+ }
+
+ *addr = CVPortBits;
+}
+
+
+/*
+ * Monitor Switch
+ * 0 = CyberVision Signal
+ * 1 = Amiga Signal,
+ * ba = boardaddr
+ */
+static inline void
+cvscreen(toggle, ba)
+ int toggle;
+ volatile caddr_t ba;
+{
+
+ if (toggle == 1)
+ cv_write_port (0x10, ba);
+ else
+ cv_write_port (0x8010, ba);
+}
+
+/* 0 = on, 1= off */
+/* ba= registerbase */
+static inline void
+gfx_on_off(toggle, ba)
+ int toggle;
+ volatile caddr_t ba;
+{
+ int r;
+
+ toggle &= 0x1;
+ toggle = toggle << 5;
+
+ r = RSeq(ba, SEQ_ID_CLOCKING_MODE);
+ r &= 0xdf; /* set Bit 5 to 0 */
+
+ WSeq(ba, SEQ_ID_CLOCKING_MODE, r | toggle);
+}
+
#endif /* NGRFCV */
-/* $NetBSD: grf_cvreg.h,v 1.3 1995/12/27 07:15:55 chopps Exp $ */
+/* $OpenBSD: grf_cvreg.h,v 1.5 1996/03/30 22:18:17 niklas Exp $ */
+/* $NetBSD: grf_cvreg.h,v 1.4 1996/03/02 14:02:58 veego Exp $ */
/*
* Copyright (c) 1995 Michael Teske
#define vgaw(ba, reg, val) \
*(((volatile caddr_t)ba)+reg) = ((val) & 0xff)
+
+/* read 32 Bit VGA register */
+#define vgar32(ba, reg) ( *((unsigned long *) (((volatile caddr_t)ba)+reg)) )
+
+/* write 32 Bit VGA register */
+#define vgaw32(ba, reg, val) \
+ *((unsigned long *) (((volatile caddr_t)ba)+reg)) = val
+
+/* read 16 Bit VGA register */
+#define vgar16(ba, reg) ( *((unsigned short *) (((volatile caddr_t)ba)+reg)) )
+
+/* write 16 Bit VGA register */
+#define vgaw16(ba, reg, val) \
+ *((unsigned short *) (((volatile caddr_t)ba)+reg)) = val
+
+int grfcv_cnprobe __P((void));
+void grfcv_iteinit __P((struct grf_softc *));
+static inline void GfxBusyWait __P((volatile caddr_t));
+static inline void GfxFifoWait __P((volatile caddr_t));
+static inline unsigned char RAttr __P((volatile caddr_t, short));
+static inline unsigned char RSeq __P((volatile caddr_t, short));
+static inline unsigned char RCrt __P((volatile caddr_t, short));
+static inline unsigned char RGfx __P((volatile caddr_t, short));
+
+
/*
* defines for the used register addresses (mw)
*
WSeq(ba, SEQ_ID_MAP_MASK, (1 << (m & 3)));\
} while (0)
+
+/* Gfx engine busy wait */
+
+static inline void
+GfxBusyWait (ba)
+ volatile caddr_t ba;
+{
+ int test;
+
+ do {
+ test = vgar16 (ba, ECR_GP_STAT);
+ asm volatile ("nop");
+ } while (test & (1 << 9));
+}
+
+
+static inline void
+GfxFifoWait(ba)
+ volatile caddr_t ba;
+{
+ int test;
+
+ do {
+ test = vgar16 (ba, ECR_GP_STAT);
+ } while (test & 0x0f);
+}
+
+
/* Special wakeup/passthrough registers on graphics boards
*
* The methods have diverged a bit for each board, so
return vgar(ba, GCT_ADDRESS_R);
}
-
-static inline void
-cv_write_port(bits, BoardAddr)
- unsigned short bits;
- volatile caddr_t BoardAddr;
-{
- volatile char *addr;
- static unsigned char CVPortBits = 0; /* mirror port bits here */
-
- addr = BoardAddr + 0x40001;
- if (bits & 0x8000)
- CVPortBits |= bits&0xFF; /* Set bits */
- else {
- bits = bits & 0xFF;
- bits = (~bits) & 0xFF ;
- CVPortBits &= bits; /* Clear bits */
- }
-
- *addr = CVPortBits;
-}
-
-#define set_port_bits(b, ba) cv_write_port((unsigned short )b | 0x8000,ba)
-#define clear_port_bits(b, ba) cv_write_port((unsigned short )b & 0xff,ba)
-
-
-/*
- * Monitor Switch
- * 0 = CyberVision Signal
- * 1 = Amiga Signal,
- * ba = boardaddr
- */
-
-static inline void
-cvscreen(toggle, ba)
- char *toggle;
- volatile caddr_t ba;
-{
-
- if (toggle)
- cv_write_port (0x10, ba);
- else
- cv_write_port (0x8010, ba);
-}
-
-/* 0 = on, 1= off */
-/* ba= registerbase */
-static inline void
-gfx_on_off(toggle, ba)
- int toggle;
- volatile caddr_t ba;
-{
- int r;
-
- toggle &= 0x1;
- toggle = toggle << 5;
-
- r = RSeq(ba, SEQ_ID_CLOCKING_MODE);
- r &= 0xdf; /* set Bit 5 to 0 */
-
- WSeq(ba, SEQ_ID_CLOCKING_MODE, r | toggle);
-}
-
-#if 0
-int grfcv_cnprobe __P((void));
-void grfcv_iteinit __P((struct grf_softc *gp));
-#endif
-
-static unsigned char clocks[]={
-0x13, 0x61, 0x6b, 0x6d, 0x51, 0x69, 0x54, 0x69,
-0x4f, 0x68, 0x6b, 0x6b, 0x18, 0x61, 0x7b, 0x6c,
-0x51, 0x67, 0x24, 0x62, 0x56, 0x67, 0x77, 0x6a,
-0x1d, 0x61, 0x53, 0x66, 0x6b, 0x68, 0x79, 0x69,
-0x7c, 0x69, 0x7f, 0x69, 0x22, 0x61, 0x54, 0x65,
-0x56, 0x65, 0x58, 0x65, 0x67, 0x66, 0x41, 0x63,
-0x27, 0x61, 0x13, 0x41, 0x37, 0x62, 0x6b, 0x4d,
-0x23, 0x43, 0x51, 0x49, 0x79, 0x66, 0x54, 0x49,
-0x7d, 0x66, 0x34, 0x56, 0x4f, 0x63, 0x1f, 0x42,
-0x6b, 0x4b, 0x7e, 0x4d, 0x18, 0x41, 0x2a, 0x43,
-0x7b, 0x4c, 0x74, 0x4b, 0x51, 0x47, 0x65, 0x49,
-0x24, 0x42, 0x68, 0x49, 0x56, 0x47, 0x75, 0x4a,
-0x77, 0x4a, 0x31, 0x43, 0x1d, 0x41, 0x71, 0x49,
-0x53, 0x46, 0x29, 0x42, 0x6b, 0x48, 0x1f, 0x41,
-0x79, 0x49, 0x6f, 0x48, 0x7c, 0x49, 0x38, 0x43,
-0x7f, 0x49, 0x5d, 0x46, 0x22, 0x41, 0x53, 0x45,
-0x54, 0x45, 0x55, 0x45, 0x56, 0x45, 0x57, 0x45,
-0x58, 0x45, 0x25, 0x41, 0x67, 0x46, 0x5b, 0x45,
-0x41, 0x43, 0x78, 0x47, 0x27, 0x41, 0x51, 0x44,
-0x13, 0x21, 0x7d, 0x47, 0x37, 0x42, 0x71, 0x46,
-0x6b, 0x2d, 0x14, 0x21, 0x23, 0x23, 0x7d, 0x2f,
-0x51, 0x29, 0x61, 0x2b, 0x79, 0x46, 0x1d, 0x22,
-0x54, 0x29, 0x45, 0x27, 0x7d, 0x46, 0x7f, 0x46,
-0x4f, 0x43, 0x2f, 0x41, 0x1f, 0x22, 0x6a, 0x2b,
-0x6b, 0x2b, 0x5b, 0x29, 0x7e, 0x2d, 0x65, 0x44,
-0x18, 0x21, 0x5e, 0x29, 0x2a, 0x23, 0x45, 0x26,
-0x7b, 0x2c, 0x19, 0x21, 0x74, 0x2b, 0x75, 0x2b,
-0x51, 0x27, 0x3f, 0x25, 0x65, 0x29, 0x40, 0x25,
-0x24, 0x22, 0x41, 0x25, 0x68, 0x29, 0x42, 0x25,
-0x56, 0x27, 0x7e, 0x2b, 0x75, 0x2a, 0x1c, 0x21,
-0x77, 0x2a, 0x4f, 0x26, 0x31, 0x23, 0x6f, 0x29,
-0x1d, 0x21, 0x32, 0x23, 0x71, 0x29, 0x72, 0x29,
-0x53, 0x26, 0x69, 0x28, 0x29, 0x22, 0x75, 0x29,
-0x6b, 0x28, 0x1f, 0x21, 0x1f, 0x21, 0x6d, 0x28,
-0x79, 0x29, 0x2b, 0x22, 0x6f, 0x28, 0x59, 0x26,
-0x7c, 0x29, 0x7d, 0x29, 0x38, 0x23, 0x21, 0x21,
-0x7f, 0x29, 0x39, 0x23, 0x5d, 0x26, 0x75, 0x28,
-0x22, 0x21, 0x77, 0x28, 0x53, 0x25, 0x6c, 0x27,
-0x54, 0x25, 0x61, 0x26, 0x55, 0x25, 0x30, 0x22,
-0x56, 0x25, 0x63, 0x26, 0x57, 0x25, 0x71, 0x27,
-0x58, 0x25, 0x7f, 0x28, 0x25, 0x21, 0x74, 0x27,
-0x67, 0x26, 0x40, 0x23, 0x5b, 0x25, 0x26, 0x21,
-0x41, 0x23, 0x34, 0x22, 0x78, 0x27, 0x6b, 0x26,
-0x27, 0x21, 0x35, 0x22, 0x51, 0x24, 0x7b, 0x27,
-0x13, 0x1, 0x13, 0x1, 0x7d, 0x27, 0x4c, 0x9,
-0x37, 0x22, 0x5b, 0xb, 0x71, 0x26, 0x5c, 0xb,
-0x6b, 0xd, 0x47, 0x23, 0x14, 0x1, 0x4f, 0x9,
-0x23, 0x3, 0x75, 0x26, 0x7d, 0xf, 0x1c, 0x2,
-0x51, 0x9, 0x59, 0x24, 0x61, 0xb, 0x69, 0x25,
-0x79, 0x26, 0x34, 0x5, 0x1d, 0x2, 0x6b, 0x25,
-0x54, 0x9, 0x35, 0x5, 0x45, 0x7, 0x6d, 0x25,
-0x7d, 0x26, 0x16, 0x1, 0x7f, 0x26, 0x77, 0xd,
-0x4f, 0x23, 0x78, 0xd, 0x2f, 0x21, 0x27, 0x3,
-0x1f, 0x2, 0x59, 0x9, 0x6a, 0xb, 0x73, 0x25,
-0x6b, 0xb, 0x63, 0x24, 0x5b, 0x9, 0x20, 0x2,
-0x7e, 0xd, 0x4b, 0x7, 0x65, 0x24, 0x43, 0x22,
-0x18, 0x1, 0x6f, 0xb, 0x5e, 0x9, 0x70, 0xb,
-0x2a, 0x3, 0x33, 0x4, 0x45, 0x6, 0x60, 0x9,
-0x7b, 0xc, 0x19, 0x1, 0x19, 0x1, 0x7d, 0xc,
-0x74, 0xb, 0x50, 0x7, 0x75, 0xb, 0x63, 0x9,
-0x51, 0x7, 0x23, 0x2, 0x3f, 0x5, 0x1a, 0x1,
-0x65, 0x9, 0x2d, 0x3, 0x40, 0x5, 0x0, 0x0,
-};
-
#endif /* _GRF_RHREG_H */
-/* $NetBSD: grf_rh.c,v 1.10 1996/01/28 19:19:05 chopps Exp $ */
+/* $OpenBSD: grf_rh.c,v 1.3 1996/03/30 22:18:18 niklas Exp $ */
+/* $NetBSD: grf_rh.c,v 1.11 1996/03/06 20:13:28 is Exp $ */
/*
* Copyright (c) 1994 Markus Wild
*/
/*
* This code offers low-level routines to access the Retina BLT Z3
- * graphics-board manufactured by MS MacroSystem GmbH from within NetBSD
+ * graphics-board manufactured by MS MacroSystem GmbH from within OpenBSD
* for the Amiga.
*
* Thanks to MacroSystem for providing me with the neccessary information
if (rhconunit != -1)
#endif
return(0);
- if (zap->manid != 18260 || zap->prodid != 16)
+ if (zap->manid != 18260 ||
+ (zap->prodid != 16) && (zap->prodid != 19))
return(0);
#ifdef RETINACONSOLE
if (amiga_realconfig == 0 || rhconunit != cfp->cf_unit) {
-/* $NetBSD: grf_ul.c,v 1.11 1996/01/28 20:06:15 chopps Exp $ */
+/* $OpenBSD: grf_ul.c,v 1.5 1996/03/30 22:18:19 niklas Exp $ */
+/* $NetBSD: grf_ul.c,v 1.12 1996/03/04 19:49:11 is Exp $ */
+
#define UL_DEBUG
/*
/*
* Unflush cache, unhalt cpu -> nmi starts to run. This MUST NOT BE
* DONE before the image color map initialization above, to guarantee
- * the index register in the bt478 is not used by more than one CPU
+ * the index register in the BT458 is not used by more than one CPU
* at once.
*
* XXX For the same reason, we'll have to rething ul_putcmap(). For
/*
* XXX This is a bad thing to do.
* We should always use the gsp call, or have a means to arbitrate
- * the usage of the BT478 index register. Else there might be a
+ * the usage of the BT458 index register. Else there might be a
* race condition (when writing both colormaps at nearly the same
* time), where one CPU changes the index register when the other
* one has not finished using it.
-/* $OpenBSD: ite.c,v 1.3 1996/02/26 21:18:49 niklas Exp $ */
-/* $NetBSD: ite.c,v 1.35 1996/02/24 07:44:06 chopps Exp $ */
+/* $OpenBSD: ite.c,v 1.4 1996/03/30 22:18:20 niklas Exp $ */
+/* $NetBSD: ite.c,v 1.36 1996/03/16 08:19:43 mhitch Exp $ */
/*
* Copyright (c) 1988 University of Utah.
return;
#ifdef DDB
} else if (key_mod == (KBD_MOD_LALT | KBD_MOD_LMETA) && c == 0x59) {
- extern int Debugger();
Debugger();
splx(s);
return;
--- /dev/null
+/* $OpenBSD: ite_cv.c,v 1.1 1996/03/30 22:18:21 niklas Exp $ */
+/* $NetBSD: ite_cv.c,v 1.1 1996/03/02 14:28:51 veego Exp $ */
+
+/*
+ * Copyright (c) 1995 Michael Teske
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by Christian E. Hopps
+ * and Michael Teske.
+ * 4. The name of the author may not be used to endorse or promote products
+ * derived from this software without specific prior written permission
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * This code is based on ite_cc.c from Christian E. Hopps.
+ */
+
+#include "grfcv.h"
+#if NGRFCV > 0
+
+#include <sys/param.h>
+#include <sys/conf.h>
+#include <sys/proc.h>
+#include <sys/device.h>
+#include <sys/ioctl.h>
+#include <sys/tty.h>
+#include <sys/systm.h>
+#include <sys/queue.h>
+#include <sys/termios.h>
+#include <sys/malloc.h>
+#include <dev/cons.h>
+#include <machine/cpu.h>
+#include <amiga/dev/itevar.h>
+#include <amiga/dev/iteioctl.h>
+#include <amiga/amiga/device.h>
+#include <amiga/dev/grfioctl.h>
+#include <amiga/dev/grfvar.h>
+#include <amiga/dev/grf_cvreg.h>
+
+
+#ifndef KFONT_CUSTOM
+#ifdef KFONT_8X11
+#define kernel_font_width kernel_font_width_8x11
+#define kernel_font_height kernel_font_height_8x11
+#define kernel_font_baseline kernel_font_baseline_8x11
+#define kernel_font_boldsmear kernel_font_boldsmear_8x11
+#define kernel_font_lo kernel_font_lo_8x11
+#define kernel_font_hi kernel_font_hi_8x11
+#define kernel_font kernel_font_8x11
+#define kernel_cursor kernel_cursor_8x11
+#else
+#define kernel_font_width kernel_font_width_8x8
+#define kernel_font_height kernel_font_height_8x8
+#define kernel_font_baseline kernel_font_baseline_8x8
+#define kernel_font_boldsmear kernel_font_boldsmear_8x8
+#define kernel_font_lo kernel_font_lo_8x8
+#define kernel_font_hi kernel_font_hi_8x8
+#define kernel_font kernel_font_8x8
+#define kernel_cursor kernel_cursor_8x8
+#endif
+#endif
+
+extern u_char kernel_font_width, kernel_font_height, kernel_font_baseline;
+extern short kernel_font_boldsmear;
+extern u_char kernel_font_lo, kernel_font_hi;
+extern u_char kernel_font[], kernel_cursor[];
+
+
+/*
+ * This is what ip->priv points to;
+ * it contains local variables for CV64 ite in gfx mode.
+ */
+#define MAXCOLS 200 /* Does someone use more than this? */
+#define MAXROWS 200
+
+struct ite_priv {
+ u_int rowc[MAXROWS]; /* row coordinates */
+ u_int colc[MAXCOLS]; /* column coods */
+ u_long row_bytes;
+ u_long cursor_opt;
+ u_int row_offset; /* the row offset */
+ u_short width; /* the framebuffer width */
+ u_short height;
+ u_short underline; /* where the underline goes */
+ u_short ft_x; /* the font width */
+ u_short ft_y; /* the font height */
+ u_short font_srcx[256]; /* the font source */
+ u_short font_srcy[256];
+};
+typedef struct ite_priv ipriv_t;
+
+void cv_load_font __P((struct ite_softc *));
+void cv_ite_init __P((struct ite_softc *));
+void cv_ite_deinit __P((struct ite_softc *));
+void cv_inv_rect __P((volatile caddr_t, u_short, u_short, u_short, u_short));
+static void cv_cursor __P((struct ite_softc *, int));
+static inline void cv_blt_font __P((volatile caddr_t, int, int, int,
+ int, int, int, int, int, int, int));
+void cv_uline __P((volatile caddr_t, int, int, int, int));
+void cv_putc_nm __P((struct ite_softc *, int, int, int));
+void cv_putc_ul __P((struct ite_softc *, int, int, int));
+void cv_putc_bd __P((struct ite_softc *, int, int, int));
+void cv_putc_bd_ul __P((struct ite_softc *, int, int, int));
+void cv_putc_in __P((struct ite_softc *, int, int, int));
+void cv_putc_ul_in __P((struct ite_softc *, int, int, int));
+void cv_putc_bd_in __P((struct ite_softc *, int, int, int));
+void cv_putc_bd_ul_in __P((struct ite_softc *, int, int, int));
+static void cv_putc __P((struct ite_softc *, int, int, int, int));
+void cv_clr_rect __P((volatile caddr_t, u_short, u_short, u_short, u_short));
+static void cv_clear __P((struct ite_softc *, int, int, int, int));
+void cv_bitblt __P((volatile caddr_t, int, int, int, int, int, int));
+static void cv_scroll __P((struct ite_softc *, int, int, int, int));
+
+
+/*
+ * called from grf_cv to return console priority
+ */
+int
+grfcv_cnprobe()
+{
+ static int done;
+ int rv;
+
+ if (done == 0)
+#ifdef CV64CONSOLE
+ rv = CN_INTERNAL;
+#else
+ rv = CN_DEAD;
+#endif
+ else
+#ifdef CV64CONSOLE
+ rv = CN_NORMAL;
+#else
+ rv = CN_DEAD;
+#endif
+ done = 1;
+ return(rv);
+}
+
+
+/*
+ * called from grf_cv to init ite portion of
+ * grf_softc struct
+ */
+void
+grfcv_iteinit(gp)
+ struct grf_softc *gp;
+{
+ gp->g_itecursor = cv_cursor;
+ gp->g_iteputc = cv_putc;
+ gp->g_iteclear = cv_clear;
+ gp->g_itescroll = cv_scroll;
+ gp->g_iteinit = cv_ite_init;
+ gp->g_itedeinit = cv_ite_deinit;
+}
+
+
+/*
+ * Load font into display memory (behind visible area!)
+ * Could be faster, but it's called only on ite init, so who cares?
+ */
+void
+cv_load_font(ip)
+ register struct ite_softc *ip;
+{
+ int w, h;
+ int i,j,k,l;
+ int ncol;
+ volatile caddr_t a, font_loc, ba, fb;
+ ipriv_t *cvi;
+
+ ba = (volatile caddr_t)ip->grf->g_regkva;
+ fb = (volatile caddr_t)ip->grf->g_fbkva;
+
+ cvi = ip->priv;
+ w = cvi->width;
+ h = cvi->height + 30; /* 30 lines space, to be sure:-) */
+
+ font_loc = (volatile caddr_t)ip->grf->g_fbkva + w*h;
+ ncol = ip->cols;
+
+ if (ncol == 0)
+ return;
+ a = font_loc;
+ j=0;
+ for (i = 0 ;i <= ip->font_hi - ip->font_lo; i++) {
+
+ /* Font location in memory */
+ a = font_loc+(i%ncol)*ip->ftwidth+(i/ncol)*w*ip->ftheight;
+
+ /* P2C conversion */
+ for (k=0; k < ip->ftheight; k++) {
+ for (l = ip->ftwidth - 1; l >= 0; l--) {
+ /* XXX depends on fwidth = 8 !!!!! */
+ if (ip->font[i*ip->ftheight+k] & (1 << l))
+ *a++ = 1;
+ else
+ *a++ = 0;
+ }
+ a += w - ip->ftwidth; /* next line */
+ }
+ }
+
+ /* set up the font source */
+ for (i = 0; i <= ip->font_hi; i++) {
+ j = i - ip->font_lo;
+ if (i < ip->font_lo) {
+ cvi->font_srcx[i] = 0;
+ cvi->font_srcy[i] = h ;
+ } else {
+ cvi->font_srcx[i] = (j%ncol) * ip->ftwidth;
+ cvi->font_srcy[i] = h + (j/ncol)*ip->ftheight;
+ }
+ }
+
+ /* set up column and row coordinates */
+
+ if (ip->cols > MAXCOLS)
+ panic ("ite_cv: too many columns");
+ if (ip->rows > MAXROWS)
+ panic ("ite_cv: too many rows");
+
+ for (i = 0; i <= ip->cols; i++)
+ cvi->colc[i] = i * ip->ftwidth;
+ for (i = 0; i <= ip->rows; i++)
+ cvi->rowc[i] = i * ip->ftheight;
+}
+
+
+void
+cv_ite_init(ip)
+ register struct ite_softc *ip;
+{
+ struct grfcvtext_mode *md;
+ static ipriv_t cv_priv;
+ volatile caddr_t vgaba, fb;
+
+ ipriv_t *cvi;
+ int i;
+
+ cvi = ip->priv ;
+ if (cvi == NULL) { /* first time */
+ cvi = &cv_priv;
+ ip->priv = cvi;
+ }
+
+ md = (struct grfcvtext_mode *) ip->grf->g_data;
+
+ ip->font = md->fdata; /*kernel_font;*/
+ ip->font_lo = md->fdstart; /*kernel_font_lo;*/
+ ip->font_hi = md->fdend; /* kernel_font_hi;*/
+ ip->ftwidth = md->fx; /*kernel_font_width;*/
+ ip->ftheight = md->fy; /*kernel_font_height;*/
+
+ ip->ftbaseline = kernel_font_baseline;
+ ip->ftboldsmear = kernel_font_boldsmear;
+
+ /* Find the correct set of rendering routines for this font. */
+ if (ip->ftwidth > 8)
+ panic("kernel font size not supported");
+
+ cvi->cursor_opt = 0;
+
+ ip->cols = md->cols;
+ ip->rows = md->rows;
+
+ cvi->width = md->gv.disp_width;
+ cvi->height = md->gv.disp_height;
+ cvi->underline = ip->ftbaseline + 1;
+ cvi->row_offset = md->gv.disp_width;
+ cvi->ft_x = ip->ftwidth;
+ cvi->ft_y = ip->ftheight;
+ cvi->row_bytes = cvi->row_offset * ip->ftheight;
+
+ vgaba = (volatile caddr_t)ip->grf->g_regkva;
+
+ vgaw16(vgaba, ECR_READ_REG_DATA, 0x1000);
+ delay(200000);
+ vgaw16(vgaba, ECR_READ_REG_DATA, 0x2000);
+ GfxBusyWait(vgaba);
+ vgaw16(vgaba, ECR_READ_REG_DATA, 0x3fff);
+ GfxBusyWait(vgaba);
+ delay(200000);
+ vgaw16(vgaba, ECR_READ_REG_DATA, 0x4fff);
+ vgaw16(vgaba, ECR_READ_REG_DATA, 0xe000);
+ vgaw16(vgaba, ECR_CURRENT_Y_POS2, 0x0);
+ vgaw16(vgaba, ECR_CURRENT_X_POS2, 0x0);
+ vgaw16(vgaba, ECR_DEST_Y__AX_STEP, 0x0);
+ vgaw16(vgaba, ECR_DEST_Y2__AX_STEP2, 0x0);
+ vgaw16(vgaba, ECR_DEST_X__DIA_STEP, 0x0);
+ vgaw16(vgaba, ECR_DEST_X2__DIA_STEP2, 0x0);
+ vgaw16(vgaba, ECR_SHORT_STROKE, 0x0);
+ vgaw16(vgaba, ECR_DRAW_CMD, 0x01);
+
+ /* It ain't easy to write here, so let's do it again */
+ vgaw16(vgaba, ECR_READ_REG_DATA, 0x4fff);
+
+ /* Clear with brute force... */
+ fb = (volatile caddr_t) ip->grf->g_fbkva;
+ for (i = 0; i < cvi->width * cvi->height; i++)
+ *fb++=0;
+ cv_clr_rect (vgaba, 0, 0, cvi->width, cvi->height);
+ cv_load_font(ip);
+}
+
+
+void
+cv_ite_deinit(ip)
+ struct ite_softc *ip;
+{
+ ip->flags &= ~ITE_INITED;
+}
+
+
+/* Draws inverted rectangle (cursor) */
+void
+cv_inv_rect(vgaba, x, y, w, h)
+ volatile caddr_t vgaba;
+ u_short x, y, w, h;
+{
+ GfxBusyWait(vgaba);
+ vgaw16 (vgaba, ECR_FRGD_MIX, 0x0025);
+ vgaw32 (vgaba, ECR_FRGD_COLOR, 0x02);
+
+ vgaw16 (vgaba, ECR_READ_REG_DATA, 0xA000);
+ vgaw16 (vgaba, ECR_CURRENT_Y_POS , y);
+ vgaw16 (vgaba, ECR_CURRENT_X_POS , x);
+ vgaw16 (vgaba, ECR_READ_REG_DATA, h - 1);
+ vgaw16 (vgaba, ECR_MAJ_AXIS_PIX_CNT, w - 1);
+ vgaw16 (vgaba, ECR_DRAW_CMD, 0x40B1);
+
+}
+
+
+/*** (M<8)-by-N routines ***/
+static void
+cv_cursor(ip, flag)
+ struct ite_softc *ip;
+ int flag;
+{
+ int cend, cstart;
+ struct grfcvtext_mode *md;
+ volatile caddr_t ba, fb;
+ ipriv_t *cvi;
+
+ ba = ip->grf->g_regkva;
+ fb = ip->grf->g_fbkva;
+
+ md = (struct grfcvtext_mode *) ip->grf->g_data;
+
+ cvi = ip->priv;
+
+ if (flag == END_CURSOROPT)
+ cvi->cursor_opt--;
+ else if (flag == START_CURSOROPT) {
+ if (!cvi->cursor_opt)
+ cv_cursor (ip, ERASE_CURSOR);
+ cvi->cursor_opt++;
+ return; /* if we are already opted. */
+ }
+
+ if (cvi->cursor_opt)
+ return; /* if we are still nested. */
+ /* else we draw the cursor. */
+ cstart = 0;
+ cend = ip->ftheight;
+
+ if (flag != DRAW_CURSOR && flag != END_CURSOROPT) {
+ /*
+ * erase the cursor by drawing again
+ */
+ cv_inv_rect (ba, ip->cursorx * ip->ftwidth,
+ ip->cursory * ip->ftheight + cstart,
+ ip->ftwidth, cend);
+ }
+
+ if (flag != DRAW_CURSOR && flag != MOVE_CURSOR &&
+ flag != END_CURSOROPT)
+ return;
+
+ /*
+ * draw the cursor
+ */
+
+ ip->cursorx = min(ip->curx, ip->cols-1);
+ ip->cursory = ip->cury;
+ cstart = 0;
+ cend = ip->ftheight;
+
+ cv_inv_rect (ba, ip->cursorx * ip->ftwidth,
+ ip->cursory * ip->ftheight + cstart,
+ ip->ftwidth, cend);
+
+}
+
+
+static inline void
+cv_blt_font(vgaba, sx, sy, dx, dy, fw, fh, fg, bg, fmix, bmix)
+ register volatile caddr_t vgaba;
+ register int sx, sy, dx, dy, fw, fh;
+ int fg, bg, fmix, bmix;
+{
+
+ GfxBusyWait(vgaba);
+
+ vgaw16 (vgaba, ECR_READ_REG_DATA, 0xA0C0);
+ vgaw16 (vgaba, ECR_BKGD_MIX, bmix);
+ vgaw16 (vgaba, ECR_FRGD_MIX, fmix);
+ vgaw16 (vgaba, ECR_BKGD_COLOR, bg);
+ vgaw16 (vgaba, ECR_FRGD_COLOR, fg);
+ vgaw16 (vgaba, ECR_BITPLANE_READ_MASK, 0x1);
+ vgaw16 (vgaba, ECR_BITPLANE_WRITE_MASK, 0xfff);
+ vgaw16 (vgaba, ECR_CURRENT_Y_POS , sy);
+ vgaw16 (vgaba, ECR_CURRENT_X_POS , sx);
+ vgaw16 (vgaba, ECR_DEST_Y__AX_STEP, dy);
+ vgaw16 (vgaba, ECR_DEST_X__DIA_STEP, dx);
+ vgaw16 (vgaba, ECR_READ_REG_DATA, fh);
+ vgaw16 (vgaba, ECR_MAJ_AXIS_PIX_CNT, fw);
+ vgaw16 (vgaba, ECR_DRAW_CMD, 0xc0f1);
+}
+
+
+/* Draws horizontal line */
+void
+cv_uline(vgaba, x, y, x2, fgcol)
+ volatile caddr_t vgaba;
+ int x, y, x2, fgcol;
+{
+
+ GfxBusyWait(vgaba);
+ vgaw16 (vgaba, ECR_FRGD_MIX, 0x27);
+ vgaw16 (vgaba, ECR_FRGD_COLOR, fgcol);
+ vgaw16 (vgaba, ECR_READ_REG_DATA, 0xA000);
+ vgaw16 (vgaba, ECR_CURRENT_Y_POS , y);
+ vgaw16 (vgaba, ECR_CURRENT_X_POS , x);
+ vgaw16 (vgaba, ECR_DEST_Y__AX_STEP, y);
+ vgaw16 (vgaba, ECR_DEST_X__DIA_STEP, x2);
+ GfxBusyWait(vgaba);
+ vgaw16 (vgaba, ECR_DRAW_CMD, 0x2811);
+}
+
+
+void
+cv_putc_nm(ip, c, dy, dx)
+ struct ite_softc *ip;
+ int c, dy, dx;
+{
+ ipriv_t *cvi = (ipriv_t *)ip->priv;
+
+ cv_blt_font (ip->grf->g_regkva, cvi->font_srcx[c],
+ cvi->font_srcy[c], cvi->colc[dx], cvi->rowc[dy],
+ cvi->ft_x-1, cvi->ft_y-1, 1, 0, 0x27, 0x7);
+}
+
+
+void
+cv_putc_ul(ip, c, dy, dx)
+ struct ite_softc *ip;
+ int c, dy, dx;
+{
+ ipriv_t *cvi = (ipriv_t *)ip->priv;
+
+ cv_blt_font (ip->grf->g_regkva, cvi->font_srcx[c],
+ cvi->font_srcy[c], cvi->colc[dx], cvi->rowc[dy],
+ cvi->ft_x-1, cvi->ft_y-1, 1, 0, 0x27, 0x7);
+
+ cv_uline (ip->grf->g_regkva,cvi->colc[dx], cvi->rowc[dy] +
+ cvi->underline, cvi->colc[dx] + cvi->ft_x-1, 1);
+}
+
+
+void
+cv_putc_bd(ip, c, dy, dx)
+ struct ite_softc *ip;
+ int c, dy, dx;
+{
+ ipriv_t *cvi = (ipriv_t *)ip->priv;
+
+ cv_blt_font (ip->grf->g_regkva, cvi->font_srcx[c],
+ cvi->font_srcy[c], cvi->colc[dx], cvi->rowc[dy],
+ cvi->ft_x-1, cvi->ft_y-1, 1, 0, 0x27,0x7);
+ /* smear bold with OR mix */
+ cv_blt_font (ip->grf->g_regkva, cvi->font_srcx[c],
+ cvi->font_srcy[c], cvi->colc[dx]+1, cvi->rowc[dy],
+ cvi->ft_x-2, cvi->ft_y-1, 1, 0, 0x2b,0x5);
+}
+
+
+void
+cv_putc_bd_ul(ip, c, dy, dx)
+ struct ite_softc *ip;
+ int c, dy, dx;
+{
+ ipriv_t *cvi = (ipriv_t *)ip->priv;
+
+ cv_putc_bd(ip, c, dy, dx);
+ cv_uline (ip->grf->g_regkva,cvi->colc[dx], cvi->rowc[dy] +
+ cvi->underline, cvi->colc[dx] + cvi->ft_x-1, 1);
+}
+
+
+void
+cv_putc_in(ip, c, dy, dx)
+ struct ite_softc *ip;
+ int c, dy, dx;
+{
+ ipriv_t *cvi = (ipriv_t *)ip->priv;
+
+ cv_blt_font (ip->grf->g_regkva, cvi->font_srcx[c],
+ cvi->font_srcy[c], cvi->colc[dx], cvi->rowc[dy],
+ cvi->ft_x-1, cvi->ft_y-1, 0, 1, 0x27,0x7);
+}
+
+
+void
+cv_putc_ul_in(ip, c, dy, dx)
+ struct ite_softc *ip;
+ int c, dy, dx;
+{
+ ipriv_t *cvi = (ipriv_t *)ip->priv;
+
+ cv_blt_font (ip->grf->g_regkva, cvi->font_srcx[c],
+ cvi->font_srcy[c], cvi->colc[dx], cvi->rowc[dy],
+ cvi->ft_x-1, cvi->ft_y-1, 0, 1, 0x27,0x7);
+
+ cv_uline (ip->grf->g_regkva,cvi->colc[dx], cvi->rowc[dy] +
+ cvi->underline, cvi->colc[dx] + cvi->ft_x-1, 0);
+}
+
+
+void
+cv_putc_bd_in(ip, c, dy, dx)
+ struct ite_softc *ip;
+ int c, dy, dx;
+{
+ ipriv_t *cvi = (ipriv_t *)ip->priv;
+
+ cv_blt_font (ip->grf->g_regkva, cvi->font_srcx[c],
+ cvi->font_srcy[c], cvi->colc[dx], cvi->rowc[dy],
+ cvi->ft_x-1, cvi->ft_y-1, 0, 1, 0x27,0x7);
+
+ /* smear bold with AND mix */
+ cv_blt_font (ip->grf->g_regkva, cvi->font_srcx[c],
+ cvi->font_srcy[c], cvi->colc[dx]+1, cvi->rowc[dy],
+ cvi->ft_x-2, cvi->ft_y-1, 0, 1, 0x27, 0xc);
+}
+
+
+void
+cv_putc_bd_ul_in(ip, c, dy, dx)
+ struct ite_softc *ip;
+ int c, dy, dx;
+{
+ ipriv_t *cvi = (ipriv_t *)ip->priv;
+
+ cv_putc_bd_in(ip, c, dy, dx);
+
+ cv_uline(ip->grf->g_regkva,cvi->colc[dx], cvi->rowc[dy] +
+ cvi->underline, cvi->colc[dx] + cvi->ft_x-1, 0);
+}
+
+
+typedef void cv_putc_func ();
+
+cv_putc_func *cv_put_func[ATTR_ALL+1] = {
+ cv_putc_nm,
+ cv_putc_in,
+ cv_putc_ul,
+ cv_putc_ul_in,
+ cv_putc_bd,
+ cv_putc_bd_in,
+ cv_putc_bd_ul,
+ cv_putc_bd_ul_in,
+/* no support for blink */
+ cv_putc_nm,
+ cv_putc_in,
+ cv_putc_ul,
+ cv_putc_ul_in,
+ cv_putc_bd,
+ cv_putc_bd_in,
+ cv_putc_bd_ul,
+ cv_putc_bd_ul_in
+};
+
+
+static void
+cv_putc(ip, c, dy, dx, mode)
+ struct ite_softc *ip;
+ int c, dy, dx, mode;
+{
+
+ c = (u_char)c;
+ if (c < ip->font_lo || c > ip->font_hi)
+ c = ip->font_hi;
+ cv_put_func[mode](ip, c, dy, dx);
+}
+
+
+void
+cv_clr_rect (vgaba, x, y, w, h)
+ volatile caddr_t vgaba;
+ u_short x, y, w, h;
+{
+
+ GfxBusyWait(vgaba);
+ vgaw16 (vgaba, ECR_FRGD_MIX, 0x0027);
+ vgaw32 (vgaba, ECR_FRGD_COLOR, 0x00);
+ vgaw16 (vgaba, ECR_READ_REG_DATA, 0xA000);
+ vgaw16 (vgaba, ECR_CURRENT_Y_POS , y);
+ vgaw16 (vgaba, ECR_CURRENT_X_POS , x);
+ vgaw16 (vgaba, ECR_READ_REG_DATA, h - 1);
+ vgaw16 (vgaba, ECR_MAJ_AXIS_PIX_CNT, w - 1);
+ vgaw16 (vgaba, ECR_DRAW_CMD, 0x40B1);
+}
+
+
+static void
+cv_clear(ip, sy, sx, h, w)
+ struct ite_softc *ip;
+ int sy, sx, h, w;
+{
+
+ cv_clr_rect (ip->grf->g_regkva, sx*ip->ftwidth,
+ sy*ip->ftheight, w*ip->ftwidth,
+ h*ip->ftheight);
+}
+
+
+void
+cv_bitblt(vgaba, sx, sy, dx, dy, fw, fh)
+ volatile caddr_t vgaba;
+ int sx, sy, dx, dy, fw, fh;
+{
+ unsigned short drawdir = 0;
+
+ /* Assume overlap */
+ if (sx > dx)
+ drawdir |=1<<5; /* X positive */
+ else {
+ sx += fw -1;
+ dx += fw -1;
+ }
+ if (sy > dy)
+ drawdir |=1<<7; /* Y positive */
+ else {
+ sy += fh - 1;
+ dy += fh - 1;
+ }
+ GfxBusyWait (vgaba);
+ vgaw16 (vgaba, ECR_READ_REG_DATA, 0xA000);
+ vgaw16 (vgaba, ECR_BKGD_MIX, 0x7);
+ vgaw16 (vgaba, ECR_FRGD_MIX, 0x67);
+ vgaw16 (vgaba, ECR_BKGD_COLOR, 0x0);
+ vgaw16 (vgaba, ECR_FRGD_COLOR, 0x1);
+
+ vgaw16 (vgaba, ECR_BITPLANE_READ_MASK, 0x1);
+ vgaw16 (vgaba, ECR_BITPLANE_WRITE_MASK, 0xfff);
+ vgaw16 (vgaba, ECR_CURRENT_Y_POS , sy);
+ vgaw16 (vgaba, ECR_CURRENT_X_POS , sx);
+ vgaw16 (vgaba, ECR_DEST_Y__AX_STEP, dy);
+ vgaw16 (vgaba, ECR_DEST_X__DIA_STEP, dx);
+ vgaw16 (vgaba, ECR_READ_REG_DATA, fh - 1);
+ vgaw16 (vgaba, ECR_MAJ_AXIS_PIX_CNT, fw - 1);
+ vgaw16 (vgaba, ECR_DRAW_CMD, 0xc051 | drawdir);
+}
+
+
+/* Note: sx is only relevant for SCROLL_LEFT or SCROLL_RIGHT. */
+static void
+cv_scroll(ip, sy, sx, count, dir)
+ register struct ite_softc *ip;
+ register int sy;
+ int dir, sx, count;
+
+{
+ int dy, dx;
+ ipriv_t *cvi = (ipriv_t *) ip->priv;
+
+ cv_cursor(ip, ERASE_CURSOR);
+ switch (dir) {
+ case SCROLL_UP:
+ dy = sy - count;
+
+ cv_bitblt(ip->grf->g_regkva,
+ 0,sy*ip->ftheight,
+ 0, dy*ip->ftheight,
+ cvi->width,
+ (ip->bottom_margin-dy+1)*ip->ftheight);
+
+ break;
+ case SCROLL_DOWN:
+ dy = sy + count;
+
+ cv_bitblt(ip->grf->g_regkva,
+ 0,sy*ip->ftheight,
+ 0, dy*ip->ftheight,
+ cvi->width,
+ (ip->bottom_margin-dy+1)*ip->ftheight);
+ break;
+ case SCROLL_RIGHT: /* one line */
+ dx = sx + count;
+ cv_bitblt(ip->grf->g_regkva,
+ sx*ip->ftwidth, sy*ip->ftheight,
+ dx*ip->ftwidth, sy*ip->ftheight,
+ (ip->cols-dx-1)*ip->ftwidth,
+ ip->ftheight);
+ break;
+ case SCROLL_LEFT:
+ dx = sx - count;
+ cv_bitblt(ip->grf->g_regkva,
+ sx*ip->ftwidth, sy*ip->ftheight,
+ dx*ip->ftwidth, sy*ip->ftheight,
+ (ip->cols-dx-1)*ip->ftwidth,
+ ip->ftheight);
+ break;
+ }
+}
+
+#endif /* NGRFCV */
-/* $NetBSD: mgnsc.c,v 1.15 1995/10/09 15:20:36 chopps Exp $ */
+/* $OpenBSD: mgnsc.c,v 1.4 1996/03/30 22:18:22 niklas Exp $ */
+/* $NetBSD: mgnsc.c,v 1.16 1996/03/15 22:11:12 mhitch Exp $ */
/*
* Copyright (c) 1994 Michael L. Hitch
* CTEST7 = TT1
*/
sc->sc_clock_freq = 33; /* Clock = 33Mhz */
- sc->sc_ctest7 = 0x02; /* TT1 */
+ sc->sc_ctest7 = SIOP_CTEST7_TT1;
+ sc->sc_dcntl = 0x00;
alloc_sicallback();
-/* $NetBSD: siop.c,v 1.27 1996/01/07 22:01:58 thorpej Exp $ */
+/* $OpenBSD: siop.c,v 1.6 1996/03/30 22:18:23 niklas Exp $ */
+/* $NetBSD: siop.c,v 1.29 1996/03/15 22:11:15 mhitch Exp $ */
/*
* Copyright (c) 1994 Michael L. Hitch
int siop_data_wait = SCSI_DATA_WAIT;
int siop_init_wait = SCSI_INIT_WAIT;
-#ifdef DEBUG
+#ifdef DEBUG_SYNC
/*
* sync period transfer lookup - only valid for 66Mhz clock
*/
struct siop_acb *acb;
int stat;
{
- struct scsi_xfer *xs = acb->xs;
- struct scsi_link *slp = xs->sc_link;
- struct siop_softc *sc = slp->adapter_softc;
+ struct scsi_xfer *xs;
+ struct scsi_link *slp;
+ struct siop_softc *sc;
int s, dosched = 0;
#ifdef DIAGNOSTIC
- if (acb == NULL || xs == NULL)
- panic("siop_scsidone");
+ if (acb == NULL || (xs = acb->xs) == NULL) {
+/* panic("siop_scsidone"); */
+ printf("siop_scsidone: sc_nexus NULL\n");
+ Debugger();
+ return;
+ }
#endif
+ slp = xs->sc_link;
+ sc = slp->adapter_softc;
/*
* XXX Support old-style instrumentation for now.
* IS THIS REALLY THE RIGHT PLACE FOR THIS? --thorpej
if (sc->sc_minsync < 25)
sc->sc_minsync = 25;
if (sc->sc_clock_freq <= 25) {
- sc->sc_dcntl = 0x80; /* SCLK/1 */
+ sc->sc_dcntl |= 0x80; /* SCLK/1 */
sc->sc_tcp[0] = sc->sc_tcp[1];
} else if (sc->sc_clock_freq <= 37) {
- sc->sc_dcntl = 0x40; /* SCLK/1.5 */
+ sc->sc_dcntl |= 0x40; /* SCLK/1.5 */
sc->sc_tcp[0] = sc->sc_tcp[2];
} else if (sc->sc_clock_freq <= 50) {
- sc->sc_dcntl = 0x00; /* SCLK/2 */
+ sc->sc_dcntl |= 0x00; /* SCLK/2 */
sc->sc_tcp[0] = sc->sc_tcp[3];
} else {
- sc->sc_dcntl = 0xc0; /* SCLK/3 */
+ sc->sc_dcntl |= 0xc0; /* SCLK/3 */
sc->sc_tcp[0] = 3000 / sc->sc_clock_freq;
}
*status = STS_BUSY;
if (sc->nexus_list.tqh_first)
rp->siop_dsp = sc->sc_scriptspa + Ent_wait_reselect;
- return 1;
+ return (acb != NULL);
}
if (dstat & SIOP_DSTAT_SIR && (rp->siop_dsps == 0xff01 ||
rp->siop_dsps == 0xff02)) {
acb->ds.chain[i].datalen))
break;
}
- if (i >= DMAMAXIO || acb->ds.chain[i].datalen == 0)
- printf("couldn't find saved data pointer\n");
+ if (i >= DMAMAXIO || acb->ds.chain[i].datalen == 0) {
+ printf("couldn't find saved data pointer: ");
+ printf("curbuf %x curlen %x i %d\n",
+ acb->iob_curbuf, acb->iob_curlen, i);
+#ifdef DDB
+ Debugger();
+#endif
+ }
#ifdef DEBUG
if (siop_debug & 0x100)
printf(" chain[0]: %x/%x -> %x/%x\n",
printf ("%s: intr istat %x dstat %x sstat0 %x\n",
sc->sc_dev.dv_xname, istat, dstat, sstat0);
if (!sc->sc_active) {
- printf ("%s: spurious interrupt? istat %x dstat %x sstat0 %x status %x\n",
- sc->sc_dev.dv_xname, istat, dstat, sstat0, sc->sc_nexus->stat[0]);
+ printf ("%s: spurious interrupt? istat %x dstat %x sstat0 %x nexus %x status %x\n",
+ sc->sc_dev.dv_xname, istat, dstat, sstat0,
+ sc->sc_nexus, sc->sc_nexus ? sc->sc_nexus->stat[0] : 0);
}
#endif
rp->siop_dsp - sc->sc_scriptspa);
}
#endif
- siop_scsidone(sc->sc_nexus, sc->sc_nexus->stat[0]);
+ siop_scsidone(sc->sc_nexus, sc->sc_nexus ?
+ sc->sc_nexus->stat[0] : -1);
}
}
splx(s);
period = sc->sc_nexus->msg[4];
offset = sc->sc_nexus->msg[5];
-#ifdef DEBUG
+#ifdef DEBUG_SYNC
sxfer = 0;
if (offset <= SIOP_MAX_OFFSET)
sxfer = offset;
} else {
sxfer = (sxfer << 4) | ((offset <= SIOP_MAX_OFFSET) ?
offset : SIOP_MAX_OFFSET);
+#ifdef DEBUG_SYNC
printf("siop sync: params for period %dns: sxfer %x sbcl %x",
period * 4, sxfer, sbcl);
printf(" actual period %dns\n",
sc->sc_tcp[sbcl] * ((sxfer >> 4) + 4));
+#endif
}
sc->sc_sync[target].sxfer = sxfer;
sc->sc_sync[target].sbcl = sbcl;
-#ifdef DEBUG
+#ifdef DEBUG_SYNC
printf ("siop sync: siop_sxfr %02x, siop_sbcl %02x\n", sxfer, sbcl);
#endif
}
-/* $NetBSD: wesc.c,v 1.10 1995/09/16 16:11:32 chopps Exp $ */
+/* $OpenBSD: wesc.c,v 1.2 1996/03/30 22:18:24 niklas Exp $ */
+/* $NetBSD: wesc.c,v 1.11 1996/03/15 22:11:19 mhitch Exp $ */
/*
* Copyright (c) 1994 Michael L. Hitch
* CTEST7 = SC0, TT1
*/
sc->sc_clock_freq = 50; /* Clock = 50Mhz */
- sc->sc_ctest7 = 0x22; /* SC0 + TT1 */
+ sc->sc_ctest7 = SIOP_CTEST7_SC0 | SIOP_CTEST7_TT1;
+ sc->sc_dcntl = 0x00;
sc->sc_link.adapter_softc = sc;
sc->sc_link.adapter_target = 7;
-/* $NetBSD: zbus.c,v 1.13 1995/12/27 07:31:58 chopps Exp $ */
+/* $OpenBSD: zbus.c,v 1.3 1996/03/30 22:18:25 niklas Exp $ */
+/* $NetBSD: zbus.c,v 1.15 1996/03/06 20:13:32 is Exp $ */
/*
* Copyright (c) 1994 Christian E. Hopps
*/
#include <sys/param.h>
#include <sys/device.h>
+#include <sys/systm.h>
#include <machine/cpu.h>
#include <machine/pte.h>
#include <amiga/amiga/cfdev.h>
/* Macrosystems */
{ "grfrt", 18260, 6 },
{ "grfrh", 18260, 16}, /* Retina BLT Z3 */
+ { "grfrh", 18260, 19}, /* Altais */
/* Greater valley products */
{ "gvpbus", 2017, 2 },
{ "gvpbus", 2017, 11 },
* the Zorro III device.
*/
static struct preconfdata preconftab[] = {
- { 18260, 6, 0 },
- /* Retina BLT Z3 */
- { 18260, 16, 0},
+ {18260, 6, 0 }, /* Retina Z2 */
+ {18260, 16, 0}, /* Retina BLT Z3 */
+ {18260, 19, 0}, /* Altais */
{2167, 11, 0}, /* Picasso-II mem*/
{2167, 12, 0}, /* regs */
{2193, 2, 0}, /* Spectrum mem */
{2193, 1, 0}, /* Spectrum regs */
{2195, 5, 0}, /* Piccolo mem */
{2195, 6, 0}, /* Piccolo regs */
- {1030, 0, 0} /* Ulwl board */
+ {1030, 0, 0}, /* Ulwl board */
+ {8512, 34, 0} /* Cybervison 64 */
};
static int npreconfent = sizeof(preconftab) / sizeof(struct preconfdata);
ecdp = &cfdev[ncfdev];
if (amiga_realconfig) {
if (ZTWOMEMADDR)
- printf(": mem 0x%08x-0x%08x",
+ printf(": mem 0x%08lx-0x%08lx",
ZTWOMEMADDR, ZTWOMEMADDR + NBPG * NZTWOMEMPG - 1);
if (ZBUSAVAIL)
printf (": i/o size 0x%08x", ZBUSAVAIL);
if (zap->manid == -1)
rv = UNSUPP;
}
- printf(" rom 0x%x man/pro %d/%d", zap->pa, zap->manid, zap->prodid);
+ printf(" rom %p man/pro %d/%d", zap->pa, zap->manid, zap->prodid);
return(rv);
}
-/* $NetBSD: zssc.c,v 1.13 1995/10/09 15:20:38 chopps Exp $ */
+/* $OpenBSD: zssc.c,v 1.4 1996/03/30 22:18:25 niklas Exp $ */
+/* $NetBSD: zssc.c,v 1.14 1996/03/15 22:11:22 mhitch Exp $ */
/*
* Copyright (c) 1994 Michael L. Hitch
*/
sc->sc_clock_freq = 66; /* Clock = 66Mhz */
sc->sc_ctest7 = 0x00;
+ sc->sc_dcntl = 0x00;
alloc_sicallback();
-/* $NetBSD: cpu.h,v 1.25 1995/12/21 05:01:48 mycroft Exp $ */
+/* $OpenBSD: cpu.h,v 1.4 1996/03/30 22:18:27 niklas Exp $ */
+/* $NetBSD: cpu.h,v 1.26 1996/03/15 19:47:48 is Exp $ */
/*
* Copyright (c) 1988 University of Utah.
#define AMIGA_68881 (1L<<4)
#define AMIGA_68882 (1L<<5)
#define AMIGA_FPU40 (1L<<6)
+#define AMIGA_68060 (1L<<7)
/* values for fputype */
#define FPU_NONE 0
-/* $NetBSD: param.h,v 1.26 1996/01/28 19:12:46 chopps Exp $ */
+/* $OpenBSD: param.h,v 1.5 1996/03/30 22:18:27 niklas Exp $ */
+/* $NetBSD: param.h,v 1.28 1996/03/04 05:04:14 cgd Exp $ */
/*
* Copyright (c) 1988 University of Utah.
/*
* Machine dependent constants for amiga
*/
+#define _MACHINE amiga
#define MACHINE "amiga"
-#define MACHINE_ARCH "m68k"
-#define MID_MACHINE MID_M68K
+#define _MACHINE_ARCH m68k
+#define MACHINE_ARCH "m68k"
+#define MID_MACHINE MID_M68K
/*
* Round p (pointer or byte index) up to a correctly-aligned value
projects / openbsd / commitdiff