-/* $OpenBSD: r92creg.h,v 1.28 2022/08/21 07:56:31 kevlo Exp $ */
+/* $OpenBSD: r92creg.h,v 1.29 2023/04/27 03:19:45 kevlo Exp $ */
/*-
* Copyright (c) 2010 Damien Bergamini <damien.bergamini@free.fr>
#define R92C_SECCFG_RXBCKEY_DEF 0x0080
/* IMR */
-
+
/*Beacon DMA interrupt 6 */
#define R92C_IMR_BCNDMAINT6 0x80000000
/*Beacon DMA interrupt 5 */
/*Beacon DMA interrupt 2 */
#define R92C_IMR_BCNDMAINT2 0x08000000
/*Beacon DMA interrupt 1 */
-#define R92C_IMR_BCNDMAINT1 0x04000000
+#define R92C_IMR_BCNDMAINT1 0x04000000
/*Beacon Queue DMA OK interrupt 8 */
#define R92C_IMR_BCNDOK8 0x02000000
/*Beacon Queue DMA OK interrupt 7 */
-/* $OpenBSD: rtwn.c,v 1.54 2022/12/27 20:13:03 patrick Exp $ */
+/* $OpenBSD: rtwn.c,v 1.55 2023/04/27 03:19:45 kevlo Exp $ */
/*-
* Copyright (c) 2010 Damien Bergamini <damien.bergamini@free.fr>
#define RTWN_POWER_OFDM18 7
#define RTWN_POWER_OFDM24 8
#define RTWN_POWER_OFDM36 9
-#define RTWN_POWER_OFDM48 10
+#define RTWN_POWER_OFDM48 10
#define RTWN_POWER_OFDM54 11
#define RTWN_POWER_MCS(mcs) (12 + (mcs))
#define RTWN_POWER_COUNT 28
#define rtwn_bb_write rtwn_write_4
#define rtwn_bb_read rtwn_read_4
-/*
+/*
* Macro to convert 4-bit signed integer to 8-bit signed integer.
*/
#define RTWN_SIGN4TO8(val) (((val) & 0x08) ? (val) | 0xf0 : (val))
error = sc->sc_newstate(ic, nstate, arg);
splx(s);
-
+
return (error);
}
{
struct rtwn_softc *sc = ic->ic_softc;
int s;
-
+
s = splnet();
if (ic->ic_flags & IEEE80211_F_SHSLOT)
rtwn_write_1(sc, R92C_SLOT, IEEE80211_DUR_DS_SHSLOT);
rtwn_write_2(sc, R92C_SYS_FUNC_EN, reg & ~R92C_SYS_FUNC_EN_CPUEN);
sleep:
if (sc->chip & RTWN_CHIP_PCI) {
- /*
+ /*
* We must sleep for one second to let the firmware settle.
* Accessing registers too early will hang the whole system.
*/
/* Enable FW download. */
rtwn_write_1(sc, R92C_MCUFWDL,
rtwn_read_1(sc, R92C_MCUFWDL) | R92C_MCUFWDL_EN);
- rtwn_write_4(sc, R92C_MCUFWDL,
+ rtwn_write_4(sc, R92C_MCUFWDL,
rtwn_read_4(sc, R92C_MCUFWDL) & ~R92C_MCUFWDL_ROM_DLEN);
/* Reset the FWDL checksum. */
if (sc->chip & RTWN_CHIP_PCI) {
/* linux magic */
- rtwn_write_4(sc, R92C_FAST_EDCA_CTRL, 0x086666);
+ rtwn_write_4(sc, R92C_FAST_EDCA_CTRL, 0x086666);
}
rtwn_write_4(sc, R92C_EDCA_RANDOM_GEN, arc4random());
R88E_ROM_TXPWR_OFDM_DIFF));
ofdmpow = htpow + diff;
for (ridx = RTWN_RIDX_OFDM6; ridx <= RTWN_RIDX_OFDM54; ridx++) {
- power[ridx] = ofdmpow;
+ power[ridx] = ofdmpow;
if (power[ridx] > R92C_MAX_TX_PWR)
power[ridx] = R92C_MAX_TX_PWR;
}
if (tx[0] == 0xff || tx[1] == 0xff)
return;
- reg = rtwn_bb_read(sc, R92C_OFDM0_TXIQIMBALANCE(chain));
+ reg = rtwn_bb_read(sc, R92C_OFDM0_TXIQIMBALANCE(chain));
val = ((reg >> 22) & 0x3ff);
x = tx[0];
if (x & 0x00000200)
reg |= ((tx_c & 0x3c0) << 22);
rtwn_bb_write(sc, R92C_OFDM0_TXAFE(chain), reg);
- reg = rtwn_bb_read(sc, R92C_OFDM0_TXIQIMBALANCE(chain));
+ reg = rtwn_bb_read(sc, R92C_OFDM0_TXIQIMBALANCE(chain));
reg &= ~0x003f0000;
reg |= ((tx_c & 0x3f) << 16);
rtwn_bb_write(sc, R92C_OFDM0_TXIQIMBALANCE(chain), reg);
-/* $OpenBSD: if_urtwn.c,v 1.105 2023/03/08 04:43:08 guenther Exp $ */
+/* $OpenBSD: if_urtwn.c,v 1.106 2023/04/27 03:19:45 kevlo Exp $ */
/*-
* Copyright (c) 2010 Damien Bergamini <damien.bergamini@free.fr>
void urtwn_task(void *);
void urtwn_do_async(struct urtwn_softc *,
void (*)(struct urtwn_softc *, void *), void *, int);
-void urtwn_wait_async(void *);
+void urtwn_wait_async(void *);
int urtwn_write_region_1(struct urtwn_softc *, uint16_t, uint8_t *,
int);
void urtwn_write_1(void *, uint16_t, uint8_t);
#endif
if (k != NULL && k->k_cipher == IEEE80211_CIPHER_CCMP) {
- xferlen = (txdp - data->buf) + m->m_pkthdr.len +
+ xferlen = (txdp - data->buf) + m->m_pkthdr.len +
IEEE80211_CCMP_HDRLEN;
headerlen = ieee80211_get_hdrlen(wh);
else
urtwn_write_1(sc, R92C_RXDMA_AGG_PG_TH + 1, dmatiming);
- /* Drop incorrect bulk out. */
+ /* Drop incorrect bulk out. */
urtwn_write_4(sc, R92C_TXDMA_OFFSET_CHK,
urtwn_read_4(sc, R92C_TXDMA_OFFSET_CHK) |
R92C_TXDMA_OFFSET_CHK_DROP_DATA_EN);
urtwn_is_oactive(void *cookie)
{
struct urtwn_softc *sc = cookie;
-
+
return (TAILQ_EMPTY(&sc->tx_free_list));
}