-/* $OpenBSD: if_iwm.c,v 1.44 2015/06/15 07:50:44 stsp Exp $ */
+/* $OpenBSD: if_iwm.c,v 1.45 2015/06/15 08:06:11 stsp Exp $ */
/*
* Copyright (c) 2014 genua mbh <info@genua.de>
return 0;
}
-/* iwlwifi: iwl-drv.c */
struct iwm_tlv_calib_data {
uint32_t ucode_type;
struct iwm_tlv_calib_ctrl calib;
IWM_WRITE(sc, IWM_HBUS_TARG_PRPH_WDAT, val);
}
-/* iwlwifi: pcie/trans.c */
int
iwm_read_mem(struct iwm_softc *sc, uint32_t addr, void *buf, int dwords)
{
return ret;
}
-/* iwlwifi: pcie/trans.c */
int
iwm_write_mem(struct iwm_softc *sc, uint32_t addr, const void *buf, int dwords)
{
return error;
}
-/* iwlwifi/pcie/trans.c */
void
iwm_apm_stop(struct iwm_softc *sc)
{
DPRINTF(("iwm apm stop\n"));
}
-/* iwlwifi pcie/trans.c */
int
iwm_start_hw(struct iwm_softc *sc)
{
return 0;
}
-/* iwlwifi pcie/trans.c */
void
iwm_stop_device(struct iwm_softc *sc)
iwm_check_rfkill(sc);
}
-/* iwlwifi pcie/trans.c (always main power) */
void
iwm_set_pwr(struct iwm_softc *sc)
{
IWM_APMG_PS_CTRL_VAL_PWR_SRC_VMAIN, ~IWM_APMG_PS_CTRL_MSK_PWR_SRC);
}
-/* iwlwifi: mvm/ops.c */
void
iwm_mvm_nic_config(struct iwm_softc *sc)
{
/*
* PHY db
- * iwlwifi/iwl-phy-db.c
- */
-
-/*
- * BEGIN iwl-phy-db.c
*/
enum iwm_phy_db_section_type {
return 0;
}
-/*
- * END iwl-phy-db.c
- */
-
-/*
- * BEGIN iwlwifi/mvm/time-event.c
- */
-
/*
* For the high priority TE use a time event type that has similar priority to
* the FW's action scan priority.
iwm_mvm_time_event_send_add(sc, in, /*te_data*/NULL, &time_cmd);
}
-/*
- * END iwlwifi/mvm/time-event.c
- */
-
/*
* NVM read access and content parsing. We do not support
* external NVM or writing NVM.
- * iwlwifi/mvm/nvm.c
*/
/* list of NVM sections we are allowed/need to read */
* BEGIN IWM_NVM_PARSE
*/
-/* iwlwifi/iwl-nvm-parse.c */
-
/* NVM offsets (in words) definitions */
enum wkp_nvm_offsets {
/* NVM HW-Section offset (in words) definitions */
return error;
}
-/* iwlwifi: pcie/trans.c */
int
iwm_start_fw(struct iwm_softc *sc, enum iwm_ucode_type ucode_type)
{
IWM_CMD_SYNC, sizeof(tx_ant_cmd), &tx_ant_cmd);
}
-/* iwlwifi: mvm/fw.c */
int
iwm_send_phy_cfg_cmd(struct iwm_softc *sc)
{
* mvm misc bits
*/
-/*
- * follows iwlwifi/fw.c
- */
int
iwm_run_init_mvm_ucode(struct iwm_softc *sc, int justnvm)
{
return 0;
}
-/* iwlwifi: mvm/rx.c */
#define IWM_RSSI_OFFSET 50
int
iwm_mvm_calc_rssi(struct iwm_softc *sc, struct iwm_rx_phy_info *phy_info)
return max_rssi_dbm;
}
-/* iwlwifi: mvm/rx.c */
/*
* iwm_mvm_get_signal_strength - use new rx PHY INFO API
* values are reported by the fw as positive values - need to negate
}
}
-/*
- * BEGIN iwlwifi/mvm/binding.c
- */
-
int
iwm_mvm_binding_cmd(struct iwm_softc *sc, struct iwm_node *in, uint32_t action)
{
return iwm_mvm_binding_update(sc, in, IWM_FW_CTXT_ACTION_ADD);
}
-/*
- * END iwlwifi/mvm/binding.c
- */
-
-/*
- * BEGIN iwlwifi/mvm/phy-ctxt.c
- */
-
/*
* Construct the generic fields of the PHY context command
*/
chains_static, chains_dynamic, IWM_FW_CTXT_ACTION_MODIFY, 0);
}
-/*
- * END iwlwifi/mvm/phy-ctxt.c
- */
-
/*
* transmit side
*/
return error;
}
-/* iwlwifi: mvm/utils.c */
int
iwm_mvm_send_cmd_pdu(struct iwm_softc *sc, uint8_t id,
uint32_t flags, uint16_t len, const void *data)
return iwm_send_cmd(sc, &cmd);
}
-/* iwlwifi: mvm/utils.c */
int
iwm_mvm_send_cmd_status(struct iwm_softc *sc,
struct iwm_host_cmd *cmd, uint32_t *status)
return error;
}
-/* iwlwifi/mvm/utils.c */
int
iwm_mvm_send_cmd_pdu_status(struct iwm_softc *sc, uint8_t id,
uint16_t len, const void *data, uint32_t *status)
}
#endif
-/*
- * BEGIN mvm/led.c
- */
-
/* Set led register on */
void
iwm_mvm_led_enable(struct iwm_softc *sc)
IWM_WRITE(sc, IWM_CSR_LED_REG, IWM_CSR_LED_REG_TURN_OFF);
}
-/*
- * END mvm/led.c
- */
-
int
iwm_mvm_led_is_enabled(struct iwm_softc *sc)
{
iwm_mvm_led_disable(sc);
}
-/*
- * BEGIN mvm/power.c
- */
-
#define IWM_POWER_KEEP_ALIVE_PERIOD_SEC 25
int
}
#endif
-/*
- * END mvm/power.c
- */
-
-/*
- * BEGIN mvm/sta.c
- */
-
void
iwm_mvm_add_sta_cmd_v6_to_v5(struct iwm_mvm_add_sta_cmd_v6 *cmd_v6,
struct iwm_mvm_add_sta_cmd_v5 *cmd_v5)
return ret;
}
-/*
- * END mvm/sta.c
- */
-
-/*
- * BEGIN mvm/scan.c
- */
-
#define IWM_PLCP_QUIET_THRESH 1
#define IWM_ACTIVE_QUIET_TIME 10
#define LONG_OUT_TIME_PERIOD 600
return ret;
}
-/*
- * END mvm/scan.c
- */
-
-/*
- * BEGIN mvm/mac-ctxt.c
- */
-
void
iwm_mvm_ack_rates(struct iwm_softc *sc, struct iwm_node *in,
int *cck_rates, int *ofdm_rates)
}
#endif
-/*
- * END mvm/mac-ctxt.c
- */
-
-/*
- * BEGIN mvm/quota.c
- */
-
int
iwm_mvm_update_quotas(struct iwm_softc *sc, struct iwm_node *in)
{
return ret;
}
-/*
- * END mvm/quota.c
- */
-
/*
* aieee80211 routines
*/
* The interrupt side of things
*/
-/*
- * error dumping routines are from iwlwifi/mvm/utils.c
- */
-
/*
* Note: This structure is read from the device with IO accesses,
* and the reading already does the endian conversion. As it is
break;
/* ignore */
- case 0x6c: /* IWM_PHY_DB_CMD, no idea why it's not in fw-api.h */
+ case 0x6c: /* IWM_PHY_DB_CMD */
break;
case IWM_INIT_COMPLETE_NOTIF:
-/* $OpenBSD: if_iwmreg.h,v 1.3 2015/02/23 10:25:20 stsp Exp $ */
+/* $OpenBSD: if_iwmreg.h,v 1.4 2015/06/15 08:06:11 stsp Exp $ */
/******************************************************************************
*
*
*****************************************************************************/
-/*
- * BEGIN iwl-csr.h
- */
-
/*
* CSR (control and status registers)
*
IWM_DTS_DIODE_REG_FLAGS_PASS_ONCE = 0x00000080, /* bits [7:7] */
};
-/*
- * END iwl-csr.h
- */
-
-/*
- * BEGIN iwl-fw.h
- */
-
/**
* enum iwl_ucode_tlv_flag - ucode API flags
* @IWM_UCODE_TLV_FLAGS_PAN: This is PAN capable microcode; this previously
struct iwm_fw_cipher_scheme cs[];
} __packed;
-/*
- * END iwl-fw.h
- */
-
-/*
- * BEGIN iwl-fw-file.h
- */
-
/* v1/v2 uCode file layout */
struct iwm_ucode_header {
uint32_t ver; /* major/minor/API/serial */
uint8_t data[0];
};
-/*
- * END iwl-fw-file.h
- */
-
-/*
- * BEGIN iwl-prph.h
- */
-
/*
* Registers in this file are internal, not PCI bus memory mapped.
* Driver accesses these via IWM_HBUS_TARG_PRPH_* registers.
#define IWM_OSC_CLK (0xa04068)
#define IWM_OSC_CLK_FORCE_CONTROL (0x8)
-/*
- * END iwl-prph.h
- */
-
-/*
- * BEGIN iwl-fh.h
- */
-
/****************************/
/* Flow Handler Definitions */
/****************************/
uint16_t tfd_offset[IWM_TFD_QUEUE_BC_SIZE];
} __packed;
-/*
- * END iwl-fh.h
- */
-
-/*
- * BEGIN mvm/fw-api.h
- */
-
/* maximal number of Tx queues in any platform */
#define IWM_MVM_MAX_QUEUES 20
uint32_t full_on_timeouts[IWM_SF_NUM_SCENARIO][IWM_SF_NUM_TIMEOUT_TYPES];
} __packed; /* IWM_SF_CFG_API_S_VER_2 */
-/*
- * END mvm/fw-api.h
- */
-
-/*
- * BEGIN mvm/fw-api-mac.h
- */
-
/*
* The first MAC indices (starting from 0)
* are available to the driver, AUX follows
uint16_t reserved;
} __packed; /* IWM_NON_QOS_TX_COUNTER_GET_SET_API_S_VER_1 */
-/*
- * END mvm/fw-api-mac.h
- */
-
-/*
- * BEGIN mvm/fw-api-power.h
- */
-
/* Power Management Commands, Responses, Notifications */
/* Radio LP RX Energy Threshold measured in dBm */
.bf_escape_timer = htole32(IWM_BF_ESCAPE_TIMER_DEFAULT), \
.ba_escape_timer = htole32(IWM_BA_ESCAPE_TIMER_DEFAULT)
-/*
- * END mvm/fw-api-power.h
- */
-
-/*
- * BEGIN mvm/fw-api-rs.h
- */
-
/*
* These serve as indexes into
* struct iwm_rate_info fw_rate_idx_to_plcp[IWM_RATE_COUNT];
uint32_t bf_params;
}; /* LINK_QUALITY_CMD_API_S_VER_1 */
-/*
- * END mvm/fw-api-rs.h
- */
-
-/*
- * BEGIN mvm/fw-api-tx.h
- */
-
/**
* enum iwm_tx_flags - bitmasks for tx_flags in TX command
* @IWM_TX_CMD_FLG_PROT_REQUIRE: use RTS or CTS-to-self to protect the frame
tx_resp->frame_count) & 0xfff;
}
-/*
- * END mvm/fw-api-tx.h
- */
-
-/*
- * BEGIN mvm/fw-api-scan.h
- */
-
/* Scan Commands, Responses, Notifications */
/* Masks for iwm_scan_channel.type flags */
uint8_t reserved;
};
-/*
- * END mvm/fw-api-scan.h
- */
-
-/*
- * BEGIN mvm/fw-api-sta.h
- */
-
/**
* enum iwm_sta_flags - flags for the ADD_STA host command
* @IWM_STA_FLG_REDUCED_TX_PWR_CTRL:
} __packed; /* SEC_CURR_WEP_KEY_CMD_API_S_VER_2 */
-/*
- * END mvm/fw-api-sta.h
- */
-
/*
* Some cherry-picked definitions
*/
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